CMX Final Assembly and Initial Power Up -------------------------------------------- Original Rev. 5-Dec-2013 Current Rev. 26-Jan-2015 This note describes the "Final Assembly" steps that are required for each CMX card. This final assembly work is done here at MSU. A separate later section of this note describes the procedure for the "Initial Power Up" of each CMX card. All work on the CMX cards should be done at an anti-static work station while wearing a grounding wrist strap. Do not unnecessarily flex the CMX circuit board. This is especially important before the front panel and stiffener bars have been installed. CMX Final Assembly: ------------------- 1. Write the Serial Number on the CMX card. Serial numbers will start with SN #00 for the initial CMX card without either of the Virtex FPGAs on it. Serial numbers are expected to run through SN #23. The intent is that all cards with serial number => 1 will be available for Physics use. 2. Start an entry in the CMX Trailer Sheet file for the CMX card that you are now starting final assembly on. 3. Inspection before starting the Mechanical Final Assembly: - The purpose of this examination is to verify that this CMX card is in good physical condition and thus it is OK to proceed with this Mechanical Final Assembly. - Verify that the edges and corners of the card are not damaged. - Verify that the CMX card look flat when it is not under stress. We do not want a card that is warped to be flattened by the front panel and stiffener bars. - Verify that the upper and lower card edges have been milled, from the back side, to the nominal 62 mil thickness. - Verify that the connectors, SFP Cages and LEDs along the front panel edge of the card look straight and in the correct positions to fit with the front panel. - Verify that 8 press in backplane connectors look fully inserted and correctly aligned. Verify that the 3 pin backplane power connector looks correctly installed. - Check the back side of the card for damaged components. Specifically check the tallest back side components which are the 0805 ceramic capacitors. None of these should be cracked or broken off. - Check the top side of the card for damaged components. Carefully examine the tallest components and the components nearest the edges. Look for folded over pins on the TSSOP packages. Look for contamination under the BGA packages. Verify that the various connectors on the top side of the card are in the correct orientation (2mm HM connectors, Meg Array connectors for the MiniPODs, TTCDec Samtec connectors, and CAN-Bus CPU connectors). 4. Mechanical Final Assembly: - Attach the Rear Guide Pin Receptacle Block: . Press the two splined pins of the Guide Pin Receptacle into the CMX card using our small arbor press. Clean the flashing from the milled section of the drill hole before installing the Guide Pin Receptacle. The splined pins stick out of the bottom side of the card so you must use a platen under the card to support it. . Verify that this guide pin receptacle is fully pressed into the card and then lock it in place by applying one or two drops of super glue to the splines on these pins from the back side of the card. . Let this glue cure with the back side of the card facing up in a well ventilated area. - Attach the Front Panel and Stiffener Bars: . Loosely screw the Upper and Lower Brackets to the CMX card using 10 mm M2.5 Cheese Head screws. . Very loosely attach the Upper and Rear Stiffener Bards to the circuit board using 3/8" 4-40 Button Head screws. . Attach the Rear Stiffener Bar to the Upper Stiffener Bar using a 7/16" 4-40 Flat Head screw. Fully tighten this screw. This screw head fits down behind the Guide Pin Receptacle and you will not be able to access it once the stiffener bars are screwed down against the circuit board. . Loosely attach the Lower Stiffener Bar using 3/8" 4-40 Button Head screws in all locations except for the screw that runs through into the Rear Stiffener Bar. In that location use a 5/8" 4-40 Button Head screw. . Loosely attach the Upper and Lower Stiffener Bars to the Upper and Lower Brackets using 5/16" 4-40 Flat Head screws. . Loosely attach the front panel to the CMX card via the J10 and J11 connectors using 1/4" 4-40 Button Head screws. . Slip the VME Insert/Eject Handles into place. Note that the Upper and Lower Handles are different. Loosely attach each handle to the circuit board with a 6 mm M2.5 Cheese head screw. Loosely attach each handle through the front panel to its bracket using a 12 mm M2.5 Cheese Head screw. Note that the threaded area in the handle for this screw has been drilled to an M2.5 body drill size. . All of the Front Panel and Stiffener Bar mechanical parts have now been mounted on the circuit board. Now in multiple passes begin tightening all of these screws. Verify that the circuit board remains flat and does not warp as all of these screws are slowly tightened pass after pass. Verify the the VME Insert/Eject Handles are square to the pcb as these screws are tightened. Recall that the screw that holds the Rear Stiffener Bar to the Upper Stiffener Bar must have already been fully tightened. . The final step in the front panel assembly is to install the two MTP feedthrough optical connectors. They snap into the front panel when inserted from the exterior surface. Typically the corners of these feedthrough connectors need to be scraped clean with an exacto-knife to allow them to fit into the hole in the front panel. We are mounting these feedthrough connectors with their metal clip up away from the circuit board. - Attach the Flash Card Socket: . Install two M2 x 10mm screws and nuts to hold the Flash Card socket in place. Tighten these far enough so that the compression of the FC socket plastic will keep them from coming loose. There are pockets on the top side of the FC socket to receive these M2 hex nuts. - Attach the Virtex Heat Sinks: . Before starting the steps to attach the Base Function FPGA Heat Sink (and possibly the Topological FPGA Heat Sink) make a final careful examination of the whole area that will be covered by these heat sinks. Many bypass capacitors and other components will be "permanently" hidden once these heat sinks are in place. Carefully examine the FPGAs themselves and the BGA area under the FPGA. Verify that the FPGA is mounted flat and parallel to the surface of the pcb and that no foreign matter is trapped in the BGA pins under the FPGA. . Install the four 3/4" 4-40 Button Head screws and three 1/2" 4-40 Button Head screws that are used to attach each Virtex Heat Sink to the circuit board. The 3/4" screws must have already been ground down in length by 65 mils. These shortened 3/4" screws are used in the positions with the compression springs. The 1/2" length screws are used in three corners for motion limit control These screws are installed using special thin nuts with a nylon lock collar (McMaster 90101A004). The screw threads MUST be lubricated with 50 wt oil before these nuts are installed. These stainless screws will gall if they are not lubricated before installing these lock nuts. No washers are used under these screw heads or nuts because there is no space for such washers. Tighten these screws enough so that the nuts will hold them in place. Be careful not to over-tighten these screws or to let the screw head or nut cut into the circuit board. To provide something like a washer, there is copper on the circuit board where the screw head and nut will press together. Check for burrs on the screw heads and nuts before using them. Carefully tighten these parts using a nut driver while holding the screw head with a nut driver. . Test fit the heat sink to verify that it will fit over the 7 screws and rest squarely on the FPGA heat spreader. Note the area on the bottom of the heat sink that will actually be in contact with the heat spreader on top of the FPGA. . Clean the top of the FPGA and the bottom of the heat sink. Any foreign material in this area will interfere with good heat transfer. . Apply the heat sink compound. There are at least 2 theories on the best way to do this. 1) one blob in the dead center with no trapped air but will take a long time to squish down 2) try to spread on a thin even layer which will without doubt trap some air when the heat sink and FPGA are clamped together. Trapped air --> almost no heat transfer. Large excess amounts of heat sink compound do nothing to transfer heat, are a mess, and can leak out. On these parts the scheme that appears to work best is to apply 5 small blobs to to the top of the FPGA; one in the center and 4 nearer the corners. Note that the fancy heat sink compound that we obtained for this application makes a good enough seal between the FPGA and its heat sink that it is difficult to remove the heat sinks once it is installed. It is easy to rotate the heat sink but it will not pull off from the FPGA. Don't try pulling hard or the FPGA may pull off from the circuit board. A synthetic heat sink thermal compound is used in CMX card assembly. It is Wakefield Part Number: 126-2. . Assembly the heat sink down over its 7 screws and onto the FPGA. The 4 clamping screws closest to the FPGA each receive a compressing spring (currently a Jones Spring Part Number: C06-026-010 which will provide about 4.8 lbs of clamp force each at a 5.4 mm compressed height) and a thin nut with a nylon lock collar. Again there is no vertical space available for washers. One must hold the screw heat with an allen key when tightening these lock nuts over the springs with a nut driver. Obviously these nuts must be tightened in a series of small steps to keep the pressure event, the heat sink flat against the FPGA, and not to warp or flex the circuit board. The current target is that the tops of these 4 nuts should be just even with the top of the heat sink fins when they are tightened far enough. It may take some time for the heat sink compound to evenly squeeze out from between the heat sink and the top of the FPGA. Thus the apparent compressed height of the springs may change for some time. . Once the 4 clamping screws are in place then the 3 movement limit control nuts may be installed. Again we are using a thin nut with a nylon lock collar for this application. These nuts are installed with a nut driver while holding the screw head with an allen key. Run these nuts down on their screws until they are about 0.5 mm short of touching the top surface of the heat sink. Their purpose is to limit the movement of the heat sink if it gets banged and thus give some protection to the FPGA and its BGA connections. . A post assembly inspection of a Virtex heat sink should verify that it is flat and parallel to the circuit board, that the circuit board is still flat and not warped, and that no foreign material is trapped under the heat sink. Both the upper and lower nuts on the 3 movement limit control screws should be just short of actually touching the surface of the heat sink. - Attach the MiniPODs with their Heat Sinks: . Assume that the MiniPOD Heat Sinks have already been attached to the MiniPODs with thermo epoxy (Wakefield part number #155). . Make a final inspection of the area of the CMX circuit board where this MiniPOD is going to be installed. Once this MiniPOD and its Heat Sink are installed this area of the circuit board will be "permanently" covered. Check that the Meg Array connector on the CMX looks straight and that nothing is trapped under its BGA foot print. Check for damaged capacitors bypass and DC-Blocking in the area that will be covered. Check the small 0201 capacitors that are around each of the Receiver MiniPODs. . Remove the covers on the CMX and MiniPOD Meg Array connectors. Verify that everything is clean and free of foreign material in these connectors before they are put together. . The Meg Array document fci_specification_gs-20-033.pdf describes how to rock these connectors as they are being pressed together. Do not put force on the heat sink. Do not flex the CMX card. Do not allow the optical cover on the MiniPOD to open. The two Meg-Array connectors should fit fully together with the application of a rational force. . Install two M1.6 x 8mm screws into each MiniPOD from the bottom of the circuit board to hold the MiniPOD in place. - Attach a "Pig Tail" optical cable to the MiniPOD and run it to the Front Panel MTP Connector Housing . Practice making both of these connections with test/demo parts before working with the real production parts. . We want to do this optical assembly work in a clean room area. . Clean the top area of the MiniPOD and the MTP connector housings with compressed air before removing any of the dust covers. . Remove the dust cover (rubber optical cover) from the top of the MiniPOD. Install the MiniPOD end of the optical pig tail cable and then replace the rubber dust cover verifying that it is full pressed into the MiniPOD. The sealing flaps on the rubber dust cover need to be directed outward to allow it to fit fully down in place. The optical cable routes out through the center area of the Heat Sink where a fin has been removed for this purpose. . Route and clamp the optical cable in the path on the CMX card that has been designed for it. Once the optical ribbon cable is plugged into the MTP connector then attach optical ribbon cable to the circuit board at places along this route using RTV. . Remove the dust covers from the MTP end of the optical pig tail cable. Install the MTP cable connector into the MTP feedthrough housing. Do not remove the MTP housing dust cover from the exterior side of the CMX Front Panel. 5. Electrical Final Assembly: - The exact set of steps to be performed during the Electrical Final Assembly depend on a number of things, e.g. does this CMX card have a Topological FPGA installed on it. One needs to be familiar with the contents of the file: cmx_ab_board_jumpers.txt and understand what jumpers have been installed by default during the CMX card assembly process. At the time of this writing there are some aspects of Electrical Final Assembly that are still questions, e.g. the desired dynamic range of the various voltage and current monitor readout circuits. In general the following notes apply to the standard type of CMX circuit board without a Topological FPGA. Much of the Electrical Final Assembly work consists of installing 0805 size SMD resistors. The resistors that are now being installed were not installed during the production process either because their value was not known at that time or because they are a one of a kind part and we wanted to limit the number of spools in use during the main assembly process. To make these resistors easy to install, in most cases, their SMD land pattern has only one solder blob on it from the production process. The installation of these resistors is facilitated if the various required resistor values are available in a labeled tray. - Install the Hi/Low Voltage Monitor Power OK Resistors . There are 24 of these resistors. Note that these parts have been called Res_x.yzk_Ohm_0805 in the Mentor comps file and raw Mentor BOM file. The SMD pattern for these 24 resistors has only one solder blob. . Install the following parts all of which are on the back side of the circuit board immediately under U1861 & U1862. Rx Ry Rz ----- ----- ----- BULK_2V5 OK Lim R1861 R1862 R1863 2000 Ohm 49.9 Ohm 475 Ohm BULK_3V3 OK Lim R1864 R1865 R1866 2800 Ohm 49.9 Ohm 475 Ohm TP_Core OK Lim R1867 R1868 R1869 475 Ohm 49.9 Ohm 475 Ohm GTX_AVCC OK Lim R1870 R1871 R1872 887 Ohm 49.9 Ohm 825 Ohm GTX_AVTT OK Lim R1873 R1874 R1875 680 Ohm 49.9 Ohm 475 Ohm BF_Core OK Lim R1876 R1877 R1878 475 Ohm 49.9 Ohm 475 Ohm BSPT_Core OK Lim R1879 R1880 R1881 680 Ohm 49.9 Ohm 475 Ohm BULK_5V0 OK Lim R1882 R1883 R1884 4530 Ohm 100 Ohm 475 Ohm . These resistor values in the voltage dividers will result in the following nominal Hi/Low Voltage Monitor trip points: Center of Voltage OK Range Low Trip Hi Trip Tolerance -------- -------- ------- --------- BULK_2V5 OK Lim 2.531 V 2.405 V 2.658 V +- 5.0 % BULK_3V3 OK Lim 3.334 3.167 3.500 +- 5.0 % TP_Core OK Lim 1.002 0.952 1.053 +- 5.0 % GTX_AVCC OK Lim 1.037 1.007 1.068 +- 2.9 % GTX_AVTT OK Lim 1.208 1.148 1.268 +- 5.0 % BF_Core OK Lim 1.002 0.952 1.053 +- 5.0 % BSPT_Core OK Lim 1.208 1.148 1.268 +- 5.0 % BULK_5V0 OK Lim 4.906 4.439 5.374 +- 9.5 % . This set of resistors provides about 1.0 mA of standing current in all dividers except for the GTX_AVCC supply which has about 0.59 mA standing current in its divider. . This setup of the Hi/Low Voltage Monitor dividers requires a total of 9 resistor values. . The most critical supply on the CMX card is the GTX_AVCC bus. This 1.030 Volt bus has a +- 30 mV tolerance, i.e. +- 2.9%. Base Function FPGA GTX_AVCC feed resistance: We anticipate a load of about 1.68 Amps on this supply from the Base Function FPGA. The resistance of the fill routing and filter inductor to the BF FPGA should be about 2.6 mOhm + 6.4 mOhm = 9 mOhm --> 15 mV drop. Topological FPGA GTX_AVCC feed resistance: We anticipate a load of about 2.13 Amps on this supply from the Topological FPGA. The resistance of the fill routing and filter inductor to the BF FPGA should be about 5.3 mOhm + 6.4 mOhm = 12 mOhm --> 25 mV drop. Thus we will probably tune the output of the GTX_AVCC supply to about 1.040 Volts. From the data sheet the Virtex 6 GTX_AVCC Absolute Maximum is 1.100 Volts. . A special connection is needed when the TP_CORE supply is not going to be used. Even without the TP_CORE DC/DC running we need to have the Hi/Low Voltage Monitor provide an all supplies are OK signal (for all 8 monitored voltages). The cleanest way to obtain this is: do not install R1867, R1868, R1869 jumper the R1867-R1868 node to the R1864-R1865 node jumper the R1868-R1869 node to the R1865-R1866 node i.e. have the TP_CORE monitor watch the BULK_3V3 supply. - Install the DC/DC Converter Output Voltage Set Resistors . There are 7 of these resistors. The SMD pattern for these 7 resistors has only one solder blob. . Install the following 7 parts all of which are on the back side of the circuit board under the associated DC/DC Converter. . These resistors together with the variable trim pot that is associated with each converter control the output voltage from that converter. Install Expected Resistor Adjstmt Range Nominal ------------- ------------- Trim Output Refer Value Low High Pot Converter Voltage Desig Ohms Limit Limit Ohms ----------------- ------- ----- ----- ----- ----- ---- DCDC1 BULK_2V5 2.500 R1504 2.10k 2.402 2.645 500 DCDC2 BULK_3V3 3.300 R1554 953 3.083 3.586 500 DCDC3 TP_Core 1.000 R1604 53.6k 0.963 1.051 20k DCDC4 GTX_AVCC 1.030 R1654 16.5k 0.991 1.075 5k DCDC5 GTX_AVTT 1.200 R1704 9.76k 1.116 1.307 5k DCDC6 BF_Core 1.000 R1754 53.6k 0.963 1.051 20k DCDC7 BSPT_Core 1.200 R1804 9.76k 1.116 1.307 5k . For details see page 7 of the CMX schematics. . For details about the output voltage Rset control resistor in these TI DCDC Converters: see the PTH04T240 data sheet page 12. see the PTH04T220 data sheet page 11. see the PTH05T210 data sheet page 8. - Install the DCDC Converter Input Current Monitor Scale Set Resistors . These 14 resistors control the scale of the output voltage from the Hi-Side Current Monitors that watch the input current to each of the DC/DC Converts. LT6105 Vout Install Resistors Volts =1.5V ------------------- Sense Out --> Reference Value Resistor per F.S. Converter Designators Ohms mOhms Amp In Amps ----------------- ----------- ----- ----- ------ ----- DCDC1 BULK_2V5 R1502 R1503 115 5 0.200V 7.5 A DCDC2 BULK_3V3 R1552 R1553 115 5 0.200 7.5 DCDC3 TP_Core R1602 R1603 115 5 0.200 7.5 DCDC4 GTX_AVCC R1652 R1653 115 10 0.400 3.75 DCDC5 GTX_AVTT R1702 R1703 115 10 0.400 3.75 DCDC6 BF_Core R1752 R1753 115 5 0.200 7.5 DCDC7 BSPT_Core R1802 R1803 115 10 0.400 3.75 . See the Linear Technology LT6105 data sheet for details about the current sense amplifier output voltage vs series sense resistor voltage drop relationship. See pages 1 and 11. Basically, Vout = sense drop * (Rout / Rin) with a 1 mA max on Vout. It is not absolutely clear how hi of a voltage the LT6105's Vout pin can pull to. It appears that in all of the modes that we will use this part that its Vout will pull to at least + 1.5 Volts. The Rout/Rin gain of 40.00 indicated above assumes that the 4.7k Rout resistor is shunted by about 216.2k Ohm in the voltage divider that feeds the Virtex System Monitor. Without this 216.2k Ohm shunt the Rout/Rin gain gain is about 40.87 . For all 7 DCDC Converts we have installed an Rout e.g. R1507 that is 4.70k Ohm (not 4.99k). . Recall that the full scale input to the CAN-Bus uProcessor is 4.096 Volts and that it is an 8 bit converter, i.e. only the upper 8 bits of this converters 10 bit output have any significance. The LSBit of this 8 bit value represents about either 80 mA or 40 mA depending on the scale indicated in the table above. . Recall that the full scale input to the Virtex System Monitor is 1.000 Volts and that you basically have a 10 bit converter. These Current Monitor voltage signals go through a resistor divider attenuation of 0.5 before they go into the to the Virtex System Monitor Analog Inputs. The LSBit of this 10 bit value represents about either 9.8 mA or 4.9 mA depending on the scale indicated in the table above. . For details see pages 4, 5, and 35 of the CMX schematics. - Install the one of a kind resistors in the Select I/O VRef_P supply . There are 3 of these resistors. The Select I/O VRef_P supply is located just above the Base Function MiniPODs. These 3 resistors are located on the back side of the circuit board. . Install the following 0805 1% resistors: R1922 3.74k Ohm Select I/O VRef_P Voltage Set Range R1923 11.8k Ohm Select I/O VRef_P OpAmp Gain Set R1925 10 Ohm Select I/O VRef_P Series Isolate . With these resistor values the range of the VRef_P Supply output voltage should be adjustable via trim pot R1921 from +0.75 Volts up to +1.75 Volts. In any case the output of the VRef_P supply is clamped at about 2.4 Volts by zener diode U1923. . The 400 Backplane Processor Input signals are 2.5 Volt CMOS signal levels. The intent is to have a VRef_P supply for these Processor Input signals that is adjustable by +- 0.500 Volt either side of their nominal 1.250 Volt center threshold. . For details see page 6 of the CMX schematics. - Install the 2 EDS Strip Resistors. . These resistors are located on the Top side of the circuit board. Both of them are right next to the EDS Strips. R631 is located just East of the Can-Bus uProcessor R632 is located just East of Converter DCDC7 . Install the following 0805 1% resistors: R631 1 Meg Ohm EDS Strip Ground Resistor R632 1 Meg Ohm EDS Strip Ground Resistor - Install the Scale Setting Resistors for the Virtex System Monitor Readout . There are 24 resistors that are used to scale the analog signals that are sent to the Base Function Virtex System Monitor ADC Mux Inputs. These are 0805 SMD resistors R1941 through R1964. . Install the following 0805 1% or 0.1% resistors. They are located on the top and bottom sides of the circuit board just under the J13 monitor connector. Refer Monitored SysMon LSB Desig Value Quantity Gain Input Scale ----- -------- ---------- ---- ------ -------- R1941 100k Ohm BF_Core V 0.50 4 1.955 mV R1942 100k Ohm R1943 100k Ohm BF_Core I 0.50 3 9.775 mA R1944 100k Ohm R1945 100k Ohm GTX_AVTT V 0.50 1 1.955 mV R1946 100k Ohm R1947 100k Ohm GTX_AVTT I 0.50 7 4.888 mA R1948 100k Ohm R1949 100k Ohm GTX_AVCC V 0.50 11 1.955 mV R1950 100k Ohm R1951 100k Ohm GTX_AVCC I 0.50 8 4.888 mA R1952 100k Ohm R1953 100k Ohm TP_Core I 0.50 14 9.775 mA R1954 100k Ohm R1955 300k Ohm BULK_3V3 V 0.25 12 3.910 mV R1956 100k Ohm R1957 100k Ohm BULK_3V3 I 0.50 10 9.775 mA R1958 100k Ohm R1959 300k Ohm BULK_2V5 V 0.25 9 3.910 mV R1960 100k Ohm R1961 100k Ohm BULK_2V5 I 0.50 13 9.775 mA R1962 100k Ohm R1963 100k Ohm Select I/O 0.50 15 1.955 mV R1964 100k Ohm VRef_P V . The LSB Scale is based on assuming that the System Monitor ADC has a 1 Volt Full Scale Input and will be used to produce 10 bit outputs, i.e. the LBS of the raw converter is about 1 Volt / 1023 = 0.978 mV per LSB. - Install resistors to scale the BULK_5V0 CAN-Bus monitor signal: . The BULK_5V0 input to the CAN-Bus uProcessor ADC is by default above the 4.096 Volt level that this ADC can correctly digitize. The solution is to attenuate this BULK_5V0 monitor signal before it enters the CAN-Bus ADC. This will be accomplished by: . Remove the 100 Ohm resistor that is installed at location R1915 just above the J13 monitor connector on the top side of the circuit board. Install a 1.00k Ohm resistor. . Install a 2.80k Ohm resistor parallel to C1885 on the top side of the circuit board just under connector J13. . The BULK_5V0 monitor signal to both the J13 connector and to the Channel #7 input to the Can-Bus ADC is now attenuated by a factor of 0.7368 When read by the CAN-Bus ADC the BULK_5V0 monitor signal will now have a scaler factor of about 1/0.7368 x 4.096 Volts divided by 255 counts = 21.80 mV per count (assuming an 8 bit ADC value from the CAN-Bus uProcessor). That is, every LSB from the ADC implies 21.80 mV of BULK_5V0 supply. . Pin #29 on connector J13 still allows monitoring of the BULK_5V0 supply but it now has a scale factor of 0.7368 built into what you read there with a DVM. E.G. if the DVM reads 3.684 Volts on J13 pin 29 it means that BULK_5V0 supply is 5.000 Volts. - Install the Main Power Input Fuse - F1 . Because it may need to carry up to 20 Amps under normal operating conditions a standard (i.e. large) 1/4" x 1 1/4" ceramic cartridge type fuse and holder are used for the F1 - Main Power Input Fuse on the CMX circuit board. . The holder for the F1- Main Power Input fuse is mechanically attached to the Rear Stiffener Bar about 3.7" up from the lower end of this bar. . The backplane +5V power enters the CMX card via the bottom pin on the backplane J9 connector and arrives at 4 vias labeled WRP1:WRP4 in the SE corner of the circuit board just inside the stiffener bars. Wires are installed to connect these 4 vias to the lower terminal on the F1 Fuse Holder. Use the specified #22 AWG wire with halogen free mPPE insulation to make these connections. The full starting length of these 4 wires is: 2.700", 2.857", 3.015", 3.172" Tin the end that is to be soldered into the via. Use liquid flux in the via tunnel. Use an appropriate soldering iron to properly solder these high heat load connections. Tuck the slack in these wires down against the Rear Stiffener Bar and glue it to the circuit board if necessary. . The power from the F1 fuse is routed up to the BULK_5V0 bus along the top edge of the circuit board via 4x #22 AWG wires that have the special halogen free mPPE insulation. Along the top edge these wires are soldered into vias: WRP5:WRP8. These wires should be tinned and soldered into these vias before they are routed down to the F1 fuse. These vias should be fluxed and the wire soldered into them with an appropriate Wattage iron. The full starting length of these 4 wires is about: 16.00", 17.25", 19.75", and 22.75" long. . Once these 4 wires have been soldered into the vias route them vertically across the top of the card in a way that minimize the air flow restriction. Glue these 4 wires in place along this path. The path takes these wires under the MSU silkscreen as they run across to the Rear Stiffener Bar. Do not glue these wires to the Rear Stiffener Bar because we may need to remove this bar for some future card repair. Only after these wires are routed and glued in place should they be trimmed to length and soldered into the top of the F1 fuse holder. - Clock Generator and Crystal Oscillator Final Setup: . Remove 12 terminator / pull-down resistors: R455, R456, R459, R460, R461, R462, R463, R464, R465, R466, R469, and R470. . Install a 200 Ohm 1206 resistor on the bottom side of the circuit board from R459 pin 2 to R460 pin 2. . Install a 200 Ohm 1206 resistor on the bottom side of the circuit board from R463 pin 2 to R464 pin 2. . Install a 120 MHz crystal Oscillator in location U371 aka Crystal #1. This is a ConWin PGF123 series LVPECL oscillator. This oscillator is for the G-Link output from the Base Function FPGA. . Install 200 Ohm 0603 resistors in locations R455 and R456, i.e. the pull downs for the 120 MHz Crystal #1 oscillator. . Crystal Oscillator location U373 aka Crystal #2 is left open at this time. - Setup the correct TTCDec Chip-ID Jumpers . For correct operation of the TTCDec Mezzanine card its CHIP_ID(2) must be set HI. At the time of main assembly all TTCDec CHIP_ID Jumpers are set LOW. See drawing 12 in the CMX web circuit diagrams. . Remove the 4.7k Ohm jumper resistor from locations JMP14. . Install a 4.7k Ohm 0603 resistor in location JMP15. - Setup the CMX Card Serial Number Jumpers . This set of jumpers is on the back side of the card up near the BSPT FPGA. These jumpers must be set on each CMX card to match that card's actual Serial Number, i.e. the serial number that you write on the card during final assembly. . Install as required zero Ohm jumpers JMP101 through JMP105 to match the card's serial number. Install a zero Ohm jumper to pull that bit LOW. If a jumper is not installed then that bit is pulled HI by a Pull-Up in the BSPT FPGA. - Setup the 82C250 Can-Bus Interface Chip Drive Level . The CAN-Bus interface chip is a Philips NXP 82C250. It is Reference Designator U272. Pin #8 on the 82C250 CAN-Bus interface chip controls its mode and transmitter output current. . On the CMX card R501 pulls 82C250 pin #8 towards Ground. R502 pull this pin towards +5 Volt. Both R501 and R502 are on the back side of the CMX card. They are located near the Backplane Power connector. . To allow the 82C250 CAN-Bus interface chip to actually talk to the backplane CAN-Bus connection: Remove both the R501 and R502 resistors. Install a Zero Ohm Jumper in location R501 to pull the 82C250 pin #8 to Ground. Leave location R502 open with nothing installed. . Doing this will put the 82C250 in the same mode that is used by the other L1Calo cards. - Setup the Front-Panel Access Signal Select Jumpers . During main assembly jumpers are installed so that the two Front Panel Access Signals both come from the BSPT FPGA. If Front Panel Access signal are wanted from the BF or TP FPGAs them the correct jumpers in the range R365 through R370 must be installed to make this selection. These are 47 Ohm 0603 resistors. For the Production CMX cards we want both Front-Panel Access Signals to come from the BF FPGA. To set this up: Remove the resistors: R365 and R367 Install 47 Ohm resistors: R366 and R368 - Setup the External Analog Multiplexer for the CANBus Monitoring so that it is controlled from the CANBus uProcessor and not just defaulted to Voltage Monitoring. To set this up: Install the zero Ohm jumper JMP85 - From the normal production CMX cards remove jumper JMP49. JMP49 is the jumper that indicates that the Topological Processor FPGA is installed on this card. 6. Inspection Before Initial Power Up: - Shorts checks: . Short check to ground the 5 Volt input bus to the card by probing one of the labeled Ground Vias, e.g. WRP35 or WRP 36, to the 5 Volt input F1 Fuse Block. . Shorts check to ground the output of all 7 of the DC/DC Converters across the top side of the card. Do this by probing across the Tantalum output capacitors at the lower side of each DC/DC Converter. - Set all power supply output voltage trim pots to full CCW. This is to set them at their minimum output voltage. These are 5 turn trim pots located to the East of each DC/DC Converter and one in the VREF_P supply just above the Transmitter MiniPODs. 8 trim pots total to set CCW. Reference Notes for CMX Final Assembly and Testing: --------------------------------------------------- Jumper Differences on TP Equipped CMX Cards: -------------------------------------------- As completed during Final Assembly at MSU there are the follow Jumper differences between TP equipped CMX cards and Standard CMX cards. On TP equipped cards: - Config JTAG TP Pull off "N" JMP74 Install "Y" JMP73 - TP INIT_B to System-ACE CFGINIT_B Install JMP76 - TP Installed Leave JMP49 Installed - Enable TP Core Supply DCDC3 Pull off JMP78 Install JMP79 Official MSU Tests: ------------------ - Checking and recording all power supply voltages and currents. This has been done for all cards before their trim pots are sealed. - Verify that the 40.08 MHz and 320.64 MHz CMX Clocks lock to the TTCDec DeSkew_1 and DeSkew_2 signals. For the last few batches of cards I have been measuring and recording the re-lock frequency limits. - Verify that 120 MHz crystal clock is present and looks clean - Check that the JTAG access is working - VME random register test to registers in both the BSPT and BF FPGAs on the card under test while also targeting registers in the BSPT on the "reference" CMX card. - LEDs tested using Andrew's program. - MiniPOD data recorded using Andrew's program. This now includes also recording the light level on the "reference" CMX card that receives the signals from the card under test. - SFP optical module data recorded using Andrew's program. - At power up verify the automatic Configuration of the BSPT from its Config PROM and verify automatic Configuration of the Base Function FPGA from the Compact Flash. - Base Function SFP optic link loop tests at 960 Mbps based on the 120.000 MHz crystal. On some cards, getting this test to start running sometimes requires a single Reset of the GTX Transceiver that is transmitting the signal. - Base Function transmitter MiniPOD 1 and 2 optic link tested at 6.4 Gbps sending their Fiber Optic links to the TP equipped SN-02 "reference" CMX card. - The 400 backplane processor input lines were tested using the IO_Delay test setup from last February with patterns: 0, 1, and 51. - Test the 3 Backplane and 2 Front-Panel LVDS Connections. See the detailed note below. Items not tested at MSU: ------------------------ - CANBus Monitoring has not been tested - no test setup for this at MSU. - Virtex System Monitoring has not been tested - no FW. Additional Test for the TP Equipped CMX Cards: ---------------------------------------------- - Does the TP FPGA Configure from the Compact Flash at power up and when a Compact Flash is inserted ? - Does the JTAG connection work OK to the TP FPGA for things like ChipScope ? - Does the TP FPGA correctly receive data from the 3 Receiver MiniPODs MP3, MP4, and MP5 ? - Check if there is any indication that the TP FPGA, configured with its sit there and do nothing FW, does anything to bother the Base Function FPGA or other parts of the CMX ? Handling PreCautions for CMX Cards: ----------------------------------- - As always please be careful of ESD. This includes when you reach into the anti-static sack and first touch the card. Please touch first either the chrome parts of the front-panel handles or the ground cover over the top surface of the backplane connectors. The point is to bring you and the card to the same potential by flowing charge through the card's ground or power structure and not by flowing charge through any of its signal traces. - Use an ESD wrist strap. When you can't use a wrist strap then touch a ground structure first, e.g. the unpainted mechanical part of a rack or crate. - When starting work on a card touch its ground structure first. Don't touch a signal pin or trace first. - Please don't set the bottom of the card directly on a hard surface, e.g. directly on an ESD mat on a work bench. Please use something soft under the card, e.g. a layer of pink anti-static bubble wrap. The issue is the tall ceramic bypass caps on the back side of the card. A hard surface will break off these caps, e.g. when you are installing the TTCDec. - Please don't set the top surface of the card directly on a flat surface, e.g. directly on an ESD mat on a work bench. The issue is that the Virtex Heat Sink and the MiniPODs are the tallest parts. Setting the top surface of the card directly on a flat surface will put all of the force on these delicate SMD components. When working on the bottom surface of the card, I use spacers about 10 cm long and 1 cm tall placed diagonally under each corner of the card to support the card by its stiffening bars in 8 places. I use this when for example working to change a jumper on the back side of the card. - Use caution when installing CMX cards in a crate. CMX has tall components on both sides. Installation and extraction order matters. It may be best to install CMX first and then its neighbours - reverse for extraction. The edge of the front panel of the card to the left of the CMX is a danger point for ripping parts off of the back side of the CMX. - Please use the fiber optic dust caps and keep the fiber optic connections clean. Not Installed SMD Components: ----------------------------- . When Final Assembly is finished, for a standard application CMX card we currently expect to see the following SMD component locations still open Side Ref Num (1=top X Y Rotate 2=bot) (mm) (mm) (degree) JMP4 2 263.00 323.00 0 Jumpers that JMP11 2 298.00 43.00 90 are not JMP13 2 301.00 43.00 90 Normally JMP14 2 304.00 43.00 90 Installed JMP17 2 307.00 43.00 90 JMP19 2 310.00 43.00 90 JMP21 2 313.00 43.00 90 JMP23 2 316.00 43.00 90 JMP25 2 319.00 43.00 90 JMP27 2 322.00 43.00 90 JMP31 2 183.00 196.00 0 JMP34 2 187.00 188.00 0 JMP35 2 183.00 192.00 0 JMP38 2 187.00 208.00 0 JMP41 2 134.00 91.00 0 JMP44 2 138.00 83.00 0 JMP45 2 134.00 87.00 0 JMP48 2 138.00 103.00 0 JMP52 2 263.00 301.40 0 JMP54 2 263.00 311.40 0 JMP56 2 263.00 306.40 0 JMP59 2 322.00 346.50 0 JMP62 2 45.00 74.00 90 JMP63 2 309.00 20.50 90 JMP66 2 262.00 278.00 0 JMP68 2 268.00 278.00 0 JMP72 2 53.50 74.00 90 JMP73 2 61.00 80.00 90 JMP76 2 59.00 73.50 0 JMP79 2 121.90 294.00 90 JMP81 2 42.00 74.00 90 R256 1 272.00 44.50 0 TTCDec Clk Sel R365 2 258.00 84.00 0 BSPT Access 1 R367 2 277.00 84.00 0 BSPT Access 2 R369 2 258.00 95.00 0 TP Access 1 R370 2 277.00 95.00 0 TP Access 2 R455 1 162.90 26.00 0 U371 Term R456 1 167.20 26.00 180 R459 2 196.90 36.10 180 U375 Term R460 2 202.10 36.10 0 R461 1 196.90 35.90 0 R462 1 202.10 35.90 180 R463 2 221.90 36.10 180 U377 Term R464 2 227.10 36.10 0 R465 1 221.90 35.90 0 R466 1 227.10 35.90 180 R469 1 247.90 37.00 0 U379 Term R470 1 252.20 37.00 180 SR1 1 112.00 208.05 0 Connections to SR2 1 112.00 205.85 0 Spare IC Foot SR3 1 118.00 208.05 0 Print SU1 SR4 1 118.00 205.85 0 SR5 1 112.00 188.05 0 SR6 1 112.00 185.85 0 SR7 1 118.00 188.05 0 SR8 1 118.00 185.85 0 SR10 1 107.00 204.65 0 SR11 1 107.00 202.45 0 SR12 1 107.00 200.25 0 SR13 1 107.00 198.05 0 SR14 1 107.00 195.85 0 SR15 1 107.00 193.65 0 SR16 1 107.00 191.45 0 SR17 1 107.00 189.25 0 SR20 1 123.00 204.65 0 SR21 1 123.00 202.45 0 SR22 1 123.00 200.25 0 SR23 1 123.00 198.05 0 SR24 1 123.00 195.85 0 SR25 1 123.00 193.65 0 SR26 1 123.00 191.45 0 SR27 1 123.00 189.25 0 SR31 1 263.00 312.00 0 Spare SR32 1 267.80 327.50 90 Connections SR33 1 277.10 327.50 90 to BSPT SR34 1 263.00 309.30 0 FPGA U351 SR35 1 263.00 306.60 0 SR36 1 263.00 303.90 0 SR37 1 287.00 327.50 90 SR41 1 137.00 25.00 0 Spare SR42 1 137.00 22.50 0 Connections SR43 1 151.00 27.50 0 to CAN-Bus SR44 1 151.00 25.00 0 uProcessor SR45 1 151.00 22.50 0 Connector SR46 1 151.00 20.00 0 J16 SR51 1 258.00 113.00 0 Auxillary SR52 1 258.00 110.00 0 Connections SR53 1 258.00 104.00 0 to the SR54 1 258.00 100.00 0 FPGA Access SR55 1 258.00 92.00 0 Connector SR56 1 258.00 89.00 0 J14 SR57 1 258.00 82.00 0 SR58 1 277.00 82.00 0 SR59 1 277.00 89.00 0 SR60 1 277.00 92.00 0 SR61 1 277.00 100.00 0 SR62 1 277.00 104.00 0 SR63 1 277.00 110.00 0 SR64 1 277.00 116.00 0 SR71 1 89.00 250.00 90 Spare SR72 1 87.00 246.00 90 Connections SR73 1 85.00 250.00 90 to Monitor SR74 1 83.00 246.00 90 Conn J13 SU1 1 115.00 196.95 0 Spare IC U373 1 180.00 20.00 0 Crystal Osc.