CMX  LEDs  on the Front Panel
            ---------------------------------


                                       Original Rev. 18-Feb-2013
                                        Current Rev. 27-Apr-2014


The large number of front panel connectors on the CMX card
leaves space for only 5 Dual LED components.  This is less
than the 24 LEDs on the CMM card.  A circuit diagram showing
the CMX card's front panel LEDs is available:

  30_front_panel_leds.pdf


The 5 Dual LED components used on the CMX card are bi-color
Red/Green LEDs, Dialight Part No 592-3030-313F.  These LED
components are referred to in the CMX documentation as number
1 through 5  (top to bottom)  and  Left/Right as viewed from
the Front Panel.

One of these 10 bi-color LEDs,  Number 1 Left,  is hardwired
to illuminate Green when the CMX BOARD_POWER_OK signal is
asserted.

The other 9 bi-color LEDs are all controlled by Select I/O
pins on the BSPT FPGA.

   3 of these bi-color LEDs,  Number 1 Right, and Number 2
   Left and Right can only have their Green LED illuminated
   under control of the BSPT FPGA.

   6 of these bi-color LEDs,  Numbers 3, 4, 5  Left and
   Right can have either their Red or Green LED illuminated
   under control of the BSPT FPGA.


The Cathodes of the LEDs that are controlled by the BSPT FPGA
are tied to Select I/O pins in the 3.3 Volt I/O Bank #3 of
the BSPT FPGA.  Thus the FPGA I/O pin must be set Low to cause
the associated LED to illuminate.  Using a Low FPGA output to
cause the LED to illuminate is done  (vs FPGA Hi output to
cause LED to illuminate)  because of the lower resulting
voltage drop in the FPGAs I/O block when its pulling current
to ground.

The value of the LED anode resistors installed on the CMX
card results in a LED current of about 2 mA which is plenty
for this front panel application.  In the BSPT FPGA firmware
the Drive Level on these LED drive pins should be set high
enough so that their output pull down transistors will
saturate.  These FPGA outputs should be setup as Open-Drain
to eliminate potential noise generation from a fast turn OFF
transition.  To minimize noise, the FPGA I/O Blocks driving
the front panel LEDs should have a slow output signal speed.

Both the Red and the Green LED in each of these 10 bi-color
LEDs has its Anode pulled up to the  BULK_3V3  rail by a
680 Ohm resistor.  These resistors are reference designators
R271 through R290.  They are located near the front panel
just under the LEDs on the top side of the circuit board.
The high speed MTP fiber optic cables will run over these
resistors.


Although all 9 of the FPGA controlled LEDs are driven by the
BSPT FPGA,  traces have been provided on the CMX card to
carry LED Control Signals from the Base Function FPGA and from
the Topological FPGA to the BSPT FPGA.  These are 2.5V signals
which are defined to be Hi when the BF or TP  "Requests"  that
the associated LED be illuminated.  The net names of these LED
Control signals are:  BF_LED_REQ_0 ,..., BF_LED_REQ_4  and
TP_LED_REQ_0 ,..., TP_LED_REQ_4.  The mapping of which Front
Panel LED is illuminated in response to one of these LED
control signals is contained in the BSPT firmware.


The CMM card used 74123 one-shots to "stretch" LED drive
signals that otherwise might persist for such a short period
of time that one would not see the LED illuminate.  This same
function,  i.e. stretching the LED drive signal so that
whenever it goes ON,  it will remain ON long enough to be
visible to the eye,  will be performed on the CMX card with
simple logic in the BSPT FPGA.  A counter can stretch the
LED drive signal to a minimum of 100 msec (or more) to help
guarantee that the eye can see it flash ON.


There is not enough space on the CMX Front Panel to provide
descriptive labels for each of the 10 LEDs.  In any case the
meaning of 9 of them is under control of the FPGA firmware.
The Board Power OK LED will be labeled.  The other 9 LEDs
will have labels of the form:  2L ,..., 5L  and  1R ,..., 5R.


Some of the potential uses for the Front Panel LEDs on the
CMX card  (many copied from the CMM card)  may include:

  - There are 6 LEDs that do  not  require a control signal
    from either the BF or TP FPGAs:

      Board_Power_OK
      VME_Access
      All_FPGAs_Are_Configured
      TTCDec_Ready
      CAN-Bus_Active
      L1_Accept
      Status of the Xilinx System-ACE

  - There are 5 LED that  do  require a control signal
    from either the BF or TP FPGAs:

      FIFO_Full
      FIFO_Empty
      Trigger_Hit
      Parity_Error
      G-Link_Active