Overall Flow of Processing the CMX Cards at MSU ------------------------------------------------- Revision Date: 15-Dec-2014 1. Incoming inspection. This is visual and Ohm meter inspection looking for: damaged PCBs (e.g. knocked off corners, de-lamination, surface damage, scratched or broken traces), parts placement problems (e.g. wrong part in a given location, missing parts, wrong part orientation, bad part alignment, bent pins on a part), soldering problems (e.g. cold joints, solder bridges, missing solder paste, solder balls on the card's surface, Ohm meter checks (to look for shorted buses or missing distribution planes and such). Incoming inspection takes about one hour per card. If all is OK then the card is assigned a serial number. If there is a problem then the card is returned to the assembly house. We returned 9 of the 24 CMX cards to the assembly house for "re-work". 2. Mechanical Final Assembly. This is the installation of about 90 mechanical parts (counting all of the screws and such). The intent is get the stiffening bars and front panel on the card early in the MSU process. This makes the card easier to handle and reduces the risk of flexing the card and thus breaking solder connections to SMD components. Getting these mechanical parts on also reduces the risk of ESD damage to the card because they provide a natural place to pickup the card that is connected to the card's ground structure. 3. Electrical Final Assembly. This is the installation of about 110 electrical components. This is mostly SMD resistors that set monitoring scale values and other cases where only one instance of a given resistor value is used on the CMX card. About 30 different resistor values are installed during this work. Doing this at MSU reduced the "spool count" at the assembly house and thus let CMX have only one pass through pick-and-place at the assembly house and thus reduced the risk of assembly problems. The "high current" backplane power entry fuse and cables are also installed at this time. 4. Initial Power Up and Clock Checks. Note that the TTCDec, MiniPODs, and SFP optical modules are still not on the card nor are some mechanical parts like the Virtex heat-sink(s). During initial power up one verifies that the 7 DC/DC Converters and the 4 Reference Supplies are all running OK. The output voltage from the 7 DC/DC Converters is trimmed. 16 values of voltage and current are recorded in the written "trailer sheet" for each card. If the power supplies look OK then the 3 clock distribution nets are checked. Measure and record the range over which the 3 PLL will re-lock to the LHC reference clock (which is supplied by and HP signal generator for this test). Verify that both sides of all of the differential clock signals look OK 5. If the power supplies and clock look OK then install: SFP optical devices, MiniPOD optical devices, Fiber Optic stub cables, MTP connectors, TTCDec mezzanine card, and the Virtex heat-sink(s) without thermal bonding compound. Also replace the 5 Amp main fuse that was used during the initial power up with a final type 20 Amp fuse. In step #4 we did the initial power up test without the MiniPOD, SFP, and TTCDec components installed so that this $1000 worth of parts would not be at risk. 6. Now the card goes to the Test Crate for the first time. Power it up and use Xilinx Impact over JTAG to program the BSPT FPGA Configuration PROM with the current version of firmware from Yuri. Record what version of BSPT firmware is programmed into this card. Now that the BSPT is configured the card's Hardwired Oversight Logic can supply a level of supervision over what the card is allowed to do (supervision of bus type function that could fight each other or hang the VME bus). Programming the BSPT Config PROM via JTAG is also the first check that the card's JTAG system is working. 7. Return the card to the work bench to install the "safe for bus operations" jumper JMP-59. This enables the functions that are now being supervised by the BSPT FPGA which just received its firmware in the step above. The card is upside down for this work and must be properly supported so that pressure is not put on the Virtex heat-sink(s). 8. Now back to the Test Crate for the "Quick Initial Test". This is a quick run through the: SFP, VME, and MiniPOD tests. This includes checking that the on board clocks are locked to the LHC reference and a more detailed implicit test of the cards JTAG circuits to its Virtex FPGA(s). If the Quick Initial tests look OK then it makes sense to finish the processing of this card. Otherwise it may be best to set this card aside for repair at a latter time. 9. Back to the bench to glue down the backplane power input cables and the fiber optic stub cables. This requires removing the BF Virtex Heat Sink but that is OK because we now need to attach it with thermal bonding compound anyway. Note, it is not currently clear how the fiber optic stub cables will be setup on the dual Virtex cards so we may not be gluing them down on SN-22 at this time. We did not glue down the cables or bond the heat-sink until now because if there had been a major problem with this card we may have needed access to parts that are partially covered in this process. That's why one does the Quick Initial test before this gluing and bonding. 10. Now back to the Test Crate for this card's official MSU Tests. You already know all about this for the "standard" Base Function FPGA only CMX cards. We are still working out what set of additional test we should run on the 4 dual FPGA type cards during their official MSU Tests. If a problem is found during the official MSU Test then we try to fix it. 11. If the card is not going to be shipped immediately, then after its MSU Test, whenever possible, it is kept running some test in the Test Crate just to put more operating hours on it before it is shipped. In fact, from step #8 onwards, whenever possible, the cards are kept running some test in the Test Crate. The intent is to give things a chance to fail before the card is shipped and to give us a chance to catch a rare type of failure. All cards shipped so far have typically had at least a week of running in the MSU Test Crate before shipping. 12. The day before shipping, the card is put back on the bench and its power supplies are checked again and their voltages and currents are recorded. These numbers are checked against those recorded in step #4. If all looks OK then the 7 DC/DC Converter trim pots are sealed. 13. Back to the Test Crate for a final over night run. This stint in the Test Crate includes operating the card with the Compact Flash Module that will be shipped with it. Prove that the CMX card will Configure at power up from this Compact Flash and that it will Configure any time that this Compact Flash is plugged into the CMX. This Compact Flash is considered to be a part of this card - that's why we need to test it. 14. For shipping, the CMX is put in an anti-static bag, then into its padded individual shipping/storage box, and then into the large overall shipping box. Prepare the FedEx and Customs documents and drop off the box for FedEx pickup.