############################################################################################ # # CMX Net-to-Resource File for the # Base Function FPGA IO signals used for the System Monitor IO signals # -=============-------------------------------------------------------- # # # Original Rev. 21-Nov-2012 Collect System Monitor signals freed from backplane input resources # Most Recent Rev: 11-Dec-2012 File name changed for uniformity and consistency between Base and TP files # # # Signal Nets referenced in this file: # ------------------------------------ # # 'BF_SYSMON_xx_P' and 'BF_SYSMON_xx_N' form the pair of pins used as system monitor inputs # The "_P" postfix is used for the positive pin and "_N" for the negative pin of the differential input. # The CMX is only able to use 12 of the 16 user inputs on the FPGA. # To help with Firmware, we keep the Virtex 6 channel numbering and end up with a # non-contiguous set of 12 channel numbers, namely xx= 2, 3, 4, 7, 8, 9, 10, 11, 12, 13, 14, 15 # # Note: Trace layer information is appended as comments below. # ----- # # NET 'BF_SYSMON_03_P' U1- #> F06 #> T01 00 H137 # # ^ ^ ^ ^ ^ # | | | | | # Tailored comment flag to help with string searches -----------------+ | | | | # | | | | # Target Trace Layer number to use for this net --------------------------+ | | | # as it exits the FPGA (to reach a via near the perimeter) | | | # F01 is top layer, F02 the first inner layer, etc | | | # | | | # Target Trace Layer number to use for this net ---------------------------------+ | | # for the long haul to the resource being monitored | | # T01 is top layer, T02 the first inner layer, etc | | # | | # Signal number is repeated to help manual entry of Pin Number ---------------------+ | # | # Target Pin Number read from paper study -----------------------------------------------+ # and cross-checked after Match_Res2Pin # ############################################################################################ # 'BF_SYSMON_00_P' This system Monitor user input is unaccessible # 'BF_SYSMON_00_N' as these pins are used for backplane inputs NET 'BF_SYSMON_01_P' U1- #> F10 #> T0 00 D16 NET 'BF_SYSMON_01_N' U1- #> F10 #> T0 00 C16 # 'BF_SYSMON_02_P' This system Monitor user input is unaccessible # 'BF_SYSMON_02_N' as these pins are used for backplane inputs NET 'BF_SYSMON_03_P' U1- #> F06 #> T0 00 H13 NET 'BF_SYSMON_03_N' U1- #> F06 #> T0 00 G12 NET 'BF_SYSMON_04_P' U1- #> F06 #> T0 00 C15 NET 'BF_SYSMON_04_N' U1- #> F06 #> T0 00 D15 # 'BF_SYSMON_05_P' This system Monitor user input is unaccessible # 'BF_SYSMON_05_N' as these pins are used for backplane inputs # 'BF_SYSMON_06_P' This system Monitor user input is unaccessible # 'BF_SYSMON_06_N' as these pins are used for backplane inputs NET 'BF_SYSMON_07_P' U1- #> F10 #> T0 00 C13 NET 'BF_SYSMON_07_N' U1- #> F10 #> T0 00 D12 NET 'BF_SYSMON_08_P' U1- #> F07 #> T0 00 AE33 NET 'BF_SYSMON_08_N' U1- #> F07 #> T0 00 AD33 NET 'BF_SYSMON_09_P' U1- #> F05 #> T0 00 AB39 NET 'BF_SYSMON_09_N' U1- #> F05 #> T0 00 AA40 NET 'BF_SYSMON_10_P' U1- #> F07 #> T0 00 AA41 NET 'BF_SYSMON_10_N' U1- #> F07 #> T0 00 AB41 NET 'BF_SYSMON_11_P' U1- #> F04 #> T0 00 AD38 NET 'BF_SYSMON_11_N' U1- #> F04 #> T0 00 AE38 NET 'BF_SYSMON_12_P' U1- #> F09 #> T0 00 AA42 NET 'BF_SYSMON_12_N' U1- #> F09 #> T0 00 AB42 NET 'BF_SYSMON_13_P' U1- #> F02 #> T0 00 AB32 NET 'BF_SYSMON_13_N' U1- #> F02 #> T0 00 AB33 NET 'BF_SYSMON_14_P' U1- #> F09 #> T0 00 AC40 NET 'BF_SYSMON_14_N' U1- #> F09 #> T0 00 AD40 NET 'BF_SYSMON_15_P' U1- #> F02 #> T0 00 AD42 NET 'BF_SYSMON_15_N' U1- #> F02 #> T0 00 AE42