############################################################################################
#
#                            CMX Net-to-Resource File for the
#              Base Function FPGA IO signals used for the connections to the Board Support FPGA
#             -=============------------------------------------------==========================
#
#
#     Original Rev. 28-Mar-2012
#              Rev. 28-Mar-2013 find location for these 18x signals without interfering with backplane inputs
#  Most Recent Rev: 30-May-2013 BF to BSPT connections were re-arranged after the layout of the backplane inputs
#
#  Signal Nets referenced in this file:
#  ------------------------------------
#
#   BF_REQ_CTP_n_INPUT    (n=1:2)  2x direction request for CTP cable n sent to BSPT FPGA
#
#   BF_REQ_CABLE_n_INPUT  (n=1:3)  3x direction request for Merger Cable n sent to BSPT FPGA
#
#   BF_LED_REQ_n          (n=0:4)  5x LED state request sent to BSPT FPGA
#
#   BF_TO_FROM_BSPT_n     (n=0:7)  8x un-assigned Input or Ouput connections to BSPT FPGA
#
############################################################################################

# 18x signals are going to the Board Support FPGA on layer 7
# These signals are listed in west to east order as they leave the FPGA area on layer 7
# The middle 8 signals first reach a row of vias on layer 1 or 6 and exit on layer 7

NET  'BF_REQ_CTP_1_INPUT'              U1-<IO_L9N_MRCC_38>       #> F07 #> T07        N19
NET  'BF_REQ_CTP_2_INPUT'              U1-<IO_L19N_38>           #> F07 #> T07        N20

NET  'BF_REQ_CABLE_1_INPUT'            U1-<IO_L18P_38>           #> F07 #> T07        P21
NET  'BF_REQ_CABLE_2_INPUT'            U1-<IO_L18N_38>           #> F07 #> T07        P22
NET  'BF_REQ_CABLE_3_INPUT'            U1-<IO_L8N_SRCC_38>       #> F07 #> T07        K23

NET  'BF_LED_REQ_0'                    U1-<IO_L0N_38>            #> F07 #> T07        G24
NET  'BF_LED_REQ_1'                    U1-<IO_L2P_38>            #> F07 #> T07        F25
NET  'BF_LED_REQ_2'                    U1-<IO_L11N_SRCC_38>      #> F01 #> T07        A25
NET  'BF_LED_REQ_3'                    U1-<IO_L15N_38>           #> F01 #> T07        C25
NET  'BF_LED_REQ_4'                    U1-<IO_L2N_38>            #> F01 #> T07        F24

NET  'BF_TO_FROM_BSPT_0'               U1-<IO_L11P_SRCC_38>      #> F06 #> T07        A26
NET  'BF_TO_FROM_BSPT_1'               U1-<IO_L15P_38>           #> F06 #> T07        B26
NET  'BF_TO_FROM_BSPT_2'               U1-<IO_L17P_38>           #> F01 #> T07        D25
NET  'BF_TO_FROM_BSPT_3'               U1-<IO_L7N_38>            #> F01 #> T07        A27
NET  'BF_TO_FROM_BSPT_4'               U1-<IO_L5N_38>            #> F01 #> T07        F26
NET  'BF_TO_FROM_BSPT_5'               U1-<IO_L17N_38>           #> F07 #> T07        E25
NET  'BF_TO_FROM_BSPT_6'               U1-<IO_L13N_38>           #> F07 #> T07        D26
NET  'BF_TO_FROM_BSPT_7'               U1-<IO_L1P_38>            #> F07 #> T07        E27

# note: other Select IO pins on IO Bank 38 are used for connections to the debug connector
#       cf. base_function_26_debug_connections_n2r.txt