############################################################################################ # # CMX Net-to-Resource File for the # Base Function FPGA IO signals for all unused and Not Connected Select IO pins # -=============------------------------------------=======================------- # # # Original Rev. 28-Nov-2012 Initial collection of all unused pins # Rev. 30-Nov-2012 Studying the set of unused pins generated 3 allocation improvements # Rev. 11-Dec-2012 Sort unused pins in alphabetical order # Rev. 16-Jan-2013 Adopt NET naming convention to pre-pend "No_Conn_" for unused pins, # replace pin number with IO signal name to make unique net names # and add "Select IO" to file name: base_function_unconnected_select_io_pins_n2r.txt # 03-Apr-2013 Remove pins now assigned to connections to Board Support FPGA, Debug Connector, # BF to TP S-Link, TTC signals, and adding one Global Clock. # Rev: 17-May-2013 Rearranged P12_18:21 to solve layer 9 boundary conflict (P08:11 vs P12:14) # which also involved putting pin AV23 into use and dropping AY24 # Rev: 30-May-2013 P20 now unused while N19 now used (after BF to BSPT and debug connections rework) # Most Recent Rev: 03-Jun-2013 AE35 is now used and AF41 now unused (swap pin used for cable IO signal 83) # # Signal Nets referenced in this file: # ------------------------------------ # # 'No_Conn_BF_xxxx' are the unique net names assigned to these Select IO signals # where "xxxx" is the fpga Select IO signal name # ############################################################################################ # Unused pins from IO bank 12 ############################# # note: This bank is otherwise used for the CTP output NET 'No_Conn_BF_IO_L9N_MRCC_12' U1- # 12 AN36 NET 'No_Conn_BF_IO_L10N_MRCC_12' U1- # 12 AP35 NET 'No_Conn_BF_IO_L16N_12' U1- # 12 AT34 # Unused pins from IO bank 13 ############################# # note: This bank is otherwise used for the CTP output and On-Card Bus NET 'No_Conn_BF_IO_L9P_MRCC_13' U1- # 13 AL34 # Unused pins from IO bank 14 ############################# # note: This bank is otherwise used for the On-Card Bus NET 'No_Conn_BF_IO_L18P_14' U1- # 14 AF32 # Unused pins from IO bank 15 ############################# # note: This bank is otherwise used for the Cable IO # and System Monitor differential User Inputs NET 'No_Conn_BF_IO_L18N_15' U1- # 15 AC33 NET 'No_Conn_BF_IO_L18P_15' U1- # 15 AC34 NET 'No_Conn_BF_IO_L9P_MRCC_15' U1- # 15 AD32 NET 'No_Conn_BF_IO_L14N_VREF_15' U1- # 15 AD35 NET 'No_Conn_BF_IO_L9N_MRCC_15' U1- # 15 AE32 NET 'No_Conn_BF_IO_L0P_15' U1- # 15 AE34 NET 'No_Conn_BF_IO_L17N_15' U1- # 15 AF41 # Unused pins from IO bank 16 ############################# # note: This bank is otherwise used for the Cable IO NET 'No_Conn_BF_IO_L16P_16' U1- # 16 U32 NET 'No_Conn_BF_IO_L16N_16' U1- # 16 U33 NET 'No_Conn_BF_IO_L10N_MRCC_16' U1- # 16 U34 NET 'No_Conn_BF_IO_L18P_16' U1- # 16 V33 NET 'No_Conn_BF_IO_L10P_MRCC_16' U1- # 16 V34 NET 'No_Conn_BF_IO_L18N_16' U1- # 16 W33 NET 'No_Conn_BF_IO_L12N_VRP_16' U1- # 16 Y32 NET 'No_Conn_BF_IO_L9N_MRCC_16' U1- # 16 Y33 # Unused pins from IO bank 17 ############################# # note: This bank is otherwise used for the Cable IO NET 'No_Conn_BF_IO_L4N_VREF_17' U1- # 17 N34 NET 'No_Conn_BF_IO_L4P_17' U1- # 17 N35 NET 'No_Conn_BF_IO_L9N_MRCC_17' U1- # 17 P35 NET 'No_Conn_BF_IO_L14N_VREF_17' U1- # 17 R34 NET 'No_Conn_BF_IO_L18P_17' U1- # 17 T34 # Unused pins from IO bank 21 ############################# # note: This bank is otherwise used for Backplane Inputs P10 and P11 NET 'No_Conn_BF_IO_L5P_21' U1- # 21 AJ23 NET 'No_Conn_BF_IO_L13N_21' U1- # 21 AL24 # Unused pins from IO bank 22 ############################# # note: This bank is otherwise used for Backplane Inputs P08, P09, P10 and P11 NET 'No_Conn_BF_IO_L9N_MRCC_22' U1- # 22 AL26 # Unused pins from IO bank 23 ############################# # note: This bank is otherwise used for Backplane Inputs P08 and P09 NET 'No_Conn_BF_IO_L14P_23' U1- # 23 AG28 NET 'No_Conn_BF_IO_L10P_MRCC_23' U1- # 23 AH24 NET 'No_Conn_BF_IO_L10N_MRCC_23' U1- # 23 AH25 NET 'No_Conn_BF_IO_L18N_23' U1- # 23 AH26 NET 'No_Conn_BF_IO_L18P_23' U1- # 23 AJ26 NET 'No_Conn_BF_IO_L16N_23' U1- # 23 AJ27 NET 'No_Conn_BF_IO_L9N_MRCC_23' U1- # 23 AK25 NET 'No_Conn_BF_IO_L8P_SRCC_23' U1- # 23 AK28 NET 'No_Conn_BF_IO_L1N_23' U1- # 23 AL31 # Unused pins from IO bank 24 ############################# # This IO bank has not yet been assigned NET 'No_Conn_BF_IO_L5P_D9_24' U1- # 24 N33 NET 'No_Conn_BF_IO_L7P_D5_24' U1- # 24 P32 NET 'No_Conn_BF_IO_L5N_D8_24' U1- # 24 P33 NET 'No_Conn_BF_IO_L3N_D12_24' U1- # 24 R30 NET 'No_Conn_BF_IO_L11P_SRCC_24' U1- # 24 R32 NET 'No_Conn_BF_IO_L7N_D4_24' U1- # 24 R33 NET 'No_Conn_BF_IO_L3P_D13_24' U1- # 24 T30 NET 'No_Conn_BF_IO_L13P_D1_FS1_24' U1- # 24 T31 NET 'No_Conn_BF_IO_L11N_SRCC_24' U1- # 24 T32 NET 'No_Conn_BF_IO_L13N_D0_FS0_24' U1- # 24 U31 NET 'No_Conn_BF_IO_L1N_GC_24' U1- # 24 V30 NET 'No_Conn_BF_IO_L15P_FWE_B_24' U1- # 24 V31 NET 'No_Conn_BF_IO_L1P_GC_24' U1- # 24 W30 NET 'No_Conn_BF_IO_L15N_RS1_24' U1- # 24 W31 NET 'No_Conn_BF_IO_L9P_MRCC_24' U1- # 24 Y30 NET 'No_Conn_BF_IO_L9N_MRCC_24' U1- # 24 AA30 NET 'No_Conn_BF_IO_L10P_MRCC_24' U1- # 24 AA31 NET 'No_Conn_BF_IO_L10N_MRCC_24' U1- # 24 AB31 NET 'No_Conn_BF_IO_L17N_VRP_24' U1- # 24 AC30 NET 'No_Conn_BF_IO_L17P_VRN_24' U1- # 24 AC31 NET 'No_Conn_BF_IO_L19N_24' U1- # 24 AD30 NET 'No_Conn_BF_IO_L19P_24' U1- # 24 AD31 NET 'No_Conn_BF_IO_L0P_GC_24' U1- # 24 AE30 NET 'No_Conn_BF_IO_L0N_GC_24' U1- # 24 AF30 NET 'No_Conn_BF_IO_L2N_D14_24' U1- # 24 AF31 NET 'No_Conn_BF_IO_L18N_24' U1- # 24 AG29 NET 'No_Conn_BF_IO_L4N_VREF_D10_24' U1- # 24 AG31 NET 'No_Conn_BF_IO_L2P_D15_24' U1- # 24 AG32 NET 'No_Conn_BF_IO_L18P_24' U1- # 24 AH29 NET 'No_Conn_BF_IO_L14P_FCS_B_24' U1- # 24 AH30 NET 'No_Conn_BF_IO_L4P_D11_24' U1- # 24 AH31 NET 'No_Conn_BF_IO_L6N_D6_24' U1- # 24 AH33 NET 'No_Conn_BF_IO_L14N_VREF_FOE_B_MOSI_24' U1- # 24 AJ30 NET 'No_Conn_BF_IO_L16P_RS0_24' U1- # 24 AJ31 NET 'No_Conn_BF_IO_L8N_SRCC_24' U1- # 24 AJ32 NET 'No_Conn_BF_IO_L6P_D7_24' U1- # 24 AJ33 NET 'No_Conn_BF_IO_L16N_CSO_B_24' U1- # 24 AK30 NET 'No_Conn_BF_IO_L12P_D3_24' U1- # 24 AK32 NET 'No_Conn_BF_IO_L8P_SRCC_24' U1- # 24 AK33 NET 'No_Conn_BF_IO_L12N_D2_FS2_24' U1- # 24 AL32 # Unused pins from IO bank 25 ############################# # note: This IO bank is otherwise used for one differential global clock input for a 40.08 MHz logic clock # and two differential signals carrying the S-link return channels to the TP FPGA # and two pins are receiving TTC information NET 'No_Conn_BF_IO_L6N_25' U1- # 25 H38 NET 'No_Conn_BF_IO_L4N_VREF_25' U1- # 25 J36 NET 'No_Conn_BF_IO_L4P_25' U1- # 25 J37 NET 'No_Conn_BF_IO_L8N_SRCC_25' U1- # 25 J38 NET 'No_Conn_BF_IO_L0N_25' U1- # 25 K32 NET 'No_Conn_BF_IO_L0P_25' U1- # 25 K33 NET 'No_Conn_BF_IO_L2N_25' U1- # 25 K34 NET 'No_Conn_BF_IO_L2P_25' U1- # 25 K35 NET 'No_Conn_BF_IO_L11P_SRCC_25' U1- # 25 K37 NET 'No_Conn_BF_IO_L8P_SRCC_25' U1- # 25 K38 NET 'No_Conn_BF_IO_L16P_VRN_25' U1- # 25 K39 NET 'No_Conn_BF_IO_L3P_25' U1- # 25 L31 NET 'No_Conn_BF_IO_L3N_25' U1- # 25 L32 NET 'No_Conn_BF_IO_L13P_25' U1- # 25 L34 NET 'No_Conn_BF_IO_L7P_25' U1- # 25 L35 NET 'No_Conn_BF_IO_L7N_25' U1- # 25 L36 NET 'No_Conn_BF_IO_L11N_SRCC_25' U1- # 25 L37 NET 'No_Conn_BF_IO_L17P_25' U1- # 25 M31 NET 'No_Conn_BF_IO_L15N_25' U1- # 25 M32 NET 'No_Conn_BF_IO_L15P_25' U1- # 25 M33 NET 'No_Conn_BF_IO_L13N_25' U1- # 25 M34 NET 'No_Conn_BF_IO_L1P_25' U1- # 25 N28 NET 'No_Conn_BF_IO_L5P_25' U1- # 25 N29 NET 'No_Conn_BF_IO_L5N_25' U1- # 25 N30 NET 'No_Conn_BF_IO_L17N_25' U1- # 25 N31 NET 'No_Conn_BF_IO_L9P_MRCC_25' U1- # 25 P27 NET 'No_Conn_BF_IO_L1N_25' U1- # 25 P28 NET 'No_Conn_BF_IO_L19P_GC_25' U1- # 25 P30 NET 'No_Conn_BF_IO_L19N_GC_25' U1- # 25 P31 NET 'No_Conn_BF_IO_L9N_MRCC_25' U1- # 25 R27 NET 'No_Conn_BF_IO_L10P_MRCC_25' U1- # 25 R28 NET 'No_Conn_BF_IO_L10N_MRCC_25' U1- # 25 R29 # Unused pins from IO bank 26 ############################# # note: This bank is otherwise used for Backplane Inputs P06 and P07 NET 'No_Conn_BF_IO_L2P_26' U1- # 26 J35 # Unused pins from IO bank 27 ############################# # note: This bank is otherwise used for Backplane Inputs P04, P05, P06 and P07 NET 'No_Conn_BF_IO_L16N_27' U1- # 27 J30 NET 'No_Conn_BF_IO_L14P_27' U1- # 27 J32 NET 'No_Conn_BF_IO_L12N_VRP_27' U1- # 27 J33 NET 'No_Conn_BF_IO_L18N_27' U1- # 27 K30 NET 'No_Conn_BF_IO_L9N_MRCC_27' U1- # 27 L30 NET 'No_Conn_BF_IO_L10P_MRCC_27' U1- # 27 M28 # Unused pins from IO bank 28 ############################# # note: This bank is otherwise used for Backplane Inputs P04 and P05 NET 'No_Conn_BF_IO_L3N_28' U1- # 28 F30 NET 'No_Conn_BF_IO_L16P_28' U1- # 28 J28 NET 'No_Conn_BF_IO_L16N_28' U1- # 28 K28 NET 'No_Conn_BF_IO_L19N_28' U1- # 28 M27 NET 'No_Conn_BF_IO_L8P_SRCC_28' U1- # 28 R25 # Unused pins from IO bank 32 ############################# # note: This bank is otherwise used for Backplane Inputs P12 and P13 NET 'No_Conn_BF_IO_L9N_MRCC_32' U1- # 32 AJ20 NET 'No_Conn_BF_IO_L9P_MRCC_32' U1- # 32 AJ21 NET 'No_Conn_BF_IO_L5P_32' U1- # 32 AL20 NET 'No_Conn_BF_IO_L7P_32' U1- # 32 AN20 NET 'No_Conn_BF_IO_L0P_32' U1- # 32 AY24 # Unused pins from IO bank 33 ############################# # note: This bank is otherwise used for Backplane Inputs P12, P13, P14 and P15 NET 'No_Conn_BF_IO_L10N_MRCC_33' U1- # 33 AJ15 NET 'No_Conn_BF_IO_L6P_33' U1- # 33 AJ17 NET 'No_Conn_BF_IO_L18N_33' U1- # 33 AJ18 # Unused pins from IO bank 34 ############################# # note: This bank is otherwise used for Backplane Inputs P14 and P15 # and two differential global clock inputs for 40.08 and 320.64 MHz logic clocks # All pins in this bank are used # Unused pins from IO bank 35 ############################# # note: This bank is otherwise used for Backplane Inputs P00 and P01 # and System Monitor differential User Inputs # All pins in this bank are used # Unused pins from IO bank 36 ############################# # note: This bank is otherwise used for Backplane Inputs P00, P01, P02 and P03 NET 'No_Conn_BF_IO_L10N_MRCC_36' U1- # 36 P16 # Unused pins from IO bank 37 ############################# # note: This bank is otherwise used for Backplane Inputs P02 and P03 NET 'No_Conn_BF_IO_L16P_37' U1- # 37 K20 NET 'No_Conn_BF_IO_L16N_37' U1- # 37 L20 NET 'No_Conn_BF_IO_L9N_MRCC_37' U1- # 37 L21 # Unused pins from IO bank 38 ############################# # note: This IO bank is otherwise used for connections to the Board Support FPGA # and connections to the Debug Connector NET 'No_Conn_BF_IO_L5P_38' U1- # 38 G26 NET 'No_Conn_BF_IO_L0P_38' U1- # 38 H24 NET 'No_Conn_BF_IO_L4N_VREF_38' U1- # 38 H25 NET 'No_Conn_BF_IO_L4P_38' U1- # 38 H26 NET 'No_Conn_BF_IO_L6N_38' U1- # 38 J25 NET 'No_Conn_BF_IO_L12N_VRP_38' U1- # 38 K24 NET 'No_Conn_BF_IO_L6P_38' U1- # 38 K25 NET 'No_Conn_BF_IO_L12P_VRN_38' U1- # 38 L24 NET 'No_Conn_BF_IO_L14N_VREF_38' U1- # 38 M23 NET 'No_Conn_BF_IO_L16N_38' U1- # 38 M24 NET 'No_Conn_BF_IO_L16P_38' U1- # 38 N23 NET 'No_Conn_BF_IO_L19P_38' U1- # 38 P20