# # CMX-0 Nets File # # Hardwired Oversight Logic # ----------------------------- # # # Original Rev. 27-Feb-2013 # Rev. 5-Apr-2013 # Most Recent Rev. 10-Jul-2013 Swap the relative position of BF and TP pins # # # # This file holds all of the nets that connect to the J14 # DeBug Connector. This connector provides 10 signals # to or from each of the 3 FPGAs as well as a number of # Ground connections. The intent of this connector is # to allow external view of signals on a scope of logic # analyzer using the J14 ground pins as reference or # in an "emergency" to allow additional signal connections # between FPGAs. # # All signals on this connector are 2.5V CMOS levels. # All pins can be either inputs or outputs to their FPGA. # # This DeBug, Emergency Connection header is also often # called an Access Connector. # # J14 is a 40 pin SMD header 2mm metric. It's pinout # is setup as follows: The intent is to distribute the # Ground pins. # # # Odd Numbered Pins Even Numbered Pins # --------------------- ---------------------- # # 1 GROUND 2 GROUND # 3 BSPT_DEBUG_0 4 BSPT_DEBUG_1 # 5 BSPT_DEBUG_2 6 BSPT_DEBUG_3 # 7 BSPT_DEBUG_4 8 BSPT_DEBUG_5 # 9 BSPT_DEBUG_6 10 BSPT_DEBUG_7 # 11 GROUND 12 GROUND # 13 BSPT_DEBUG_8 14 BSPT_DEBUG_9 # 15 TP_DEBUG_0 16 TP_DEBUG_1 # 17 TP_DEBUG_2 18 TP_DEBUG_3 # 19 TP_DEBUG_4 20 TP_DEBUG_5 # 21 GROUND 22 GROUND # 23 TP_DEBUG_6 24 TP_DEBUG_7 # 25 TP_DEBUG_8 26 TP_DEBUG_9 # 27 BF_DEBUG_0 28 BF_DEBUG_1 # 29 BF_DEBUG_2 30 BF_DEBUG_3 # 31 GROUND 32 GROUND # 33 BF_DEBUG_4 34 BF_DEBUG_5 # 35 BF_DEBUG_6 36 BF_DEBUG_7 # 37 BF_DEBUG_8 38 BF_DEBUG_9 # 39 GROUND 40 GROUND # # These signals will travel on layer 6 NET 'GROUND' J14-1 # Ground Pin NET 'GROUND' J14-2 # Ground Pin NET 'BSPT_DEBUG_0' J14-3 #> T06 # 2.5V I/O BSPT DeBug Signal 0 NET 'BSPT_DEBUG_1' J14-4 #> T06 # 2.5V I/O BSPT DeBug Signal 1 NET 'BSPT_DEBUG_2' J14-5 #> T06 # 2.5V I/O BSPT DeBug Signal 2 NET 'BSPT_DEBUG_3' J14-6 #> T06 # 2.5V I/O BSPT DeBug Signal 3 NET 'BSPT_DEBUG_4' J14-7 #> T06 # 2.5V I/O BSPT DeBug Signal 4 NET 'BSPT_DEBUG_5' J14-8 #> T06 # 2.5V I/O BSPT DeBug Signal 5 NET 'BSPT_DEBUG_6' J14-9 #> T06 # 2.5V I/O BSPT DeBug Signal 6 NET 'BSPT_DEBUG_7' J14-10 #> T06 # 2.5V I/O BSPT DeBug Signal 7 NET 'GROUND' J14-11 # Ground Pin NET 'GROUND' J14-12 # Ground Pin NET 'BSPT_DEBUG_8' J14-13 #> T06 # 2.5V I/O BSPT DeBug Signal 8 NET 'BSPT_DEBUG_9' J14-14 #> T06 # 2.5V I/O BSPT DeBug Signal 9 NET 'TP_DEBUG_0' J14-15 #> T06 # 2.5V I/O TP DeBug Signal 0 NET 'TP_DEBUG_1' J14-16 #> T06 # 2.5V I/O TP DeBug Signal 1 NET 'TP_DEBUG_2' J14-17 #> T06 # 2.5V I/O TP DeBug Signal 2 NET 'TP_DEBUG_3' J14-18 #> T06 # 2.5V I/O TP DeBug Signal 3 NET 'TP_DEBUG_4' J14-19 #> T06 # 2.5V I/O TP DeBug Signal 4 NET 'TP_DEBUG_5' J14-20 #> T06 # 2.5V I/O TP DeBug Signal 5 NET 'GROUND' J14-21 # Ground Pin NET 'GROUND' J14-22 # Ground Pin NET 'TP_DEBUG_6' J14-23 #> T06 # 2.5V I/O TP DeBug Signal 6 NET 'TP_DEBUG_7' J14-24 #> T06 # 2.5V I/O TP DeBug Signal 7 NET 'TP_DEBUG_8' J14-25 #> T06 # 2.5V I/O TP DeBug Signal 8 NET 'TP_DEBUG_9' J14-26 #> T06 # 2.5V I/O TP DeBug Signal 9 NET 'BF_DEBUG_0' J14-27 #> T06 # 2.5V I/O BF DeBug Signal 0 NET 'BF_DEBUG_1' J14-28 #> T06 # 2.5V I/O BF DeBug Signal 1 NET 'BF_DEBUG_2' J14-29 #> T06 # 2.5V I/O BF DeBug Signal 2 NET 'BF_DEBUG_3' J14-30 #> T06 # 2.5V I/O BF DeBug Signal 3 NET 'GROUND' J14-31 # Ground Pin NET 'GROUND' J14-32 # Ground Pin NET 'BF_DEBUG_4' J14-33 #> T06 # 2.5V I/O BF DeBug Signal 4 NET 'BF_DEBUG_5' J14-34 #> T06 # 2.5V I/O BF DeBug Signal 5 NET 'BF_DEBUG_6' J14-35 #> T06 # 2.5V I/O BF DeBug Signal 6 NET 'BF_DEBUG_7' J14-36 #> T06 # 2.5V I/O BF DeBug Signal 7 NET 'BF_DEBUG_8' J14-37 #> T06 # 2.5V I/O BF DeBug Signal 8 NET 'BF_DEBUG_9' J14-38 #> T06 # 2.5V I/O BF DeBug Signal 9 NET 'GROUND' J14-39 # Ground Pin NET 'GROUND' J14-40 # Ground Pin