# # CMX-0 Nets File # # Hardwired Oversight Logic # ----------------------------- # # # Original Rev. 26-Feb-2013 # Most Recent Rev. 24-Sept-2013 # # # # This file holds all of the nets that are part of the # Hirdwired Oversight Logig. The main function of # this hardwired logic are to prevent the CMX card from # doing certain things before all of its power supplies # are up and running and before its Board Support FPGA # has had a chance to configure so that its logic can # start to manage some of the CMX card's functions. # # - The Hardwired oversight logic required the following # 4 signals to be in the proper state before it will # allow certain functions to take place on the CMX card: # # BOARD_POWER_OK must be asserted HI # BSPT_CONFIG_DONE must be asserted HI # BSPT_RUNNING_OK_B must be asserted LOW # CMX_SAFE_JUMPER_B must be asserted LOW # # Only when all 4 of these signals are in the proper # state does the hardwired oversight logic assert its # ALLOW_BUSSED_IO signal. The ALLOW_BUSSED_IO signal must # be asserted HI for the following types of functions # to be allowed on the CMX. # # - The hardired oversight logic prevents the CMX card from # "hanging" the VME crate bus by blocking the CMX card's # DTACK_B signal from being asserted and by blocking the # CMX card's data bus transceivers from placing data on # the VME data lines. The ALLOW_BUSSED_IO signal must be # asserted for DTACK_B and VME Data Transceivers to be # enabled. # # - The ALLOW_BUSSED_IO signal must be asserted for the # output buffers on the Translators for the Backplane # LVDS signals to be enabled # # - The ALLOW_BUSSED_IO signal must be asserted for the # output buffers on the Translators for the front panel # CTP signals to be enabled. # # - The ALLOW_BUSSED_IO signal must be asserted for the # output buffers on the Translators for the TTCDec # signals to be asserted. # # # # NOTE: As of the 6-May-2013 version of this file we will # use a private driver chip, U358, for the backplane # DTACK_B signal. The Hardwired Oversight Logic # functions that had been on U358 have now been # moved to U366. We will have one spare section in # U366, (which could be used for clean on-board # logic signals) and we have 3 spare sections in # the U358 DTACK_B driver which may be dirty # because it drives the high current backplane # trace. # # 10-Sept-2013 Add "tie downs" for the unused # input pins on the Hardwired Oversight Logic # chips. U358, U365, and U366 have unused input # pins. These connections are at the very end # of this net list file. The unused input pins # are tied to ground where possible and tied # to BULK_3V3 where no easy route to ground was # available. # # 24-Sept-2013 switch to using 2 sections of U358 # to drive the VME DTACK_B signal. Use the original # 4,5,6 section and add in parallel to it the # 1,2,3 section. # # # # First we include the nets for the CMX_SAFE_JUMPER_B signal # and the nets for the logic that makes up the ALLOW_BUSSED_IO # signal. NET 'CMX_SAFE_JUMPER_B' JMP59-1 R328-1 # CMX_SAFE_JUMPER_B signal NET 'GROUND' JMP59-2 # Ground for the jumper NET 'BULK_3V3' R328-2 # BULK_3V3 for R328 pull-up # Now show all of the input signal that are # used to make the ALLOW_BUSSED_IO Signal # Note that there is a pull-up resistor R395 # on the BSPT_RUNNING_OK_B signal. NET 'CMX_SAFE_JUMPER_B' U364-4 U364-5 # CMX_SAFE_JUMPER_B Input NET 'BSPT_RUNNING_OK_B' U364-2 R395-2 # BSPT_RUNNING_OK_B Input NET 'BSPT_RUNNING_OK_B' U364-1 # BSPT_RUNNING_OK_B Input NET 'BOARD_POWER_OK' U364-12 # NAND input NET 'BSPT_CONFIG_DONE' U364-13 # NAND input NET 'BPOK_NAND_BSPTCD' U364-9 U364-10 U364-11 # NET 'BPOK_NAND_BSPTCD' R382-1 # Pull-Up on BPOK_NAND_BSPTCD NET 'BULK_3V3' R382-2 R395-1 # BULK_3V3 for R382 and # R395 pull-up resistors # # Make the ALLOW_BUSSED_IO Signal # NET 'ALLOW_BUSSED_IO' U364-3 # Allow from BSPT_RUNNING_OK_B NET 'ALLOW_BUSSED_IO' U364-6 # Allow from CMX_SAFE_JUMPER_B NET 'ALLOW_BUSSED_IO' U364-8 # Allow from BOARD_POWER_OK # and BSPT_CONFIG_DONE NET 'ALLOW_BUSSED_IO' R381-1 # ALLOW_BUSSED_IO Pull-Up NET 'BULK_3V3' R381-2 # 3.3 VOLT to the Pull-Up # # Distribute the ALLOW_BUSSED_IO Signal to all Enable Gates NET 'ALLOW_BUSSED_IO' U358-1 # Allow to NET 'ALLOW_BUSSED_IO' U358-4 # Allow to NET 'ALLOW_BUSSED_IO' U361-1 # Allow to NET 'ALLOW_BUSSED_IO' U361-4 # Allow to NET 'ALLOW_BUSSED_IO' U361-10 # Allow to NET 'ALLOW_BUSSED_IO' U361-13 # Allow to NET 'ALLOW_BUSSED_IO' U363-1 # Allow to NET 'ALLOW_BUSSED_IO' U363-4 # Allow to NET 'ALLOW_BUSSED_IO' U363-10 # Allow to NET 'ALLOW_BUSSED_IO' U363-13 # Allow to NET 'ALLOW_BUSSED_IO' U366-1 # Allow to NET 'ALLOW_BUSSED_IO' U366-10 # Allow to NET 'ALLOW_BUSSED_IO' U366-13 # Allow to # # Oversight of the CTP Translator OE_B Control Signals # NET 'BSPT_CTP_1_BF_TRNSLT_OE_B' U360-1 NET 'INV_CTP_1_BF_TRNSLT_OE_B' U360-2 U361-2 NET 'CTP_1_BF_TRNSLT_OE_B' U361-3 NET 'CTP_1_BF_TRNSLT_OE_B' R386-1 # NET 'BULK_2V5' R386-2 # 2.5 V to the Pull-Up NET 'BSPT_CTP_2_BF_TRNSLT_OE_B' U360-3 NET 'INV_CTP_2_BF_TRNSLT_OE_B' U360-4 U361-5 NET 'CTP_2_BF_TRNSLT_OE_B' U361-6 NET 'CTP_2_BF_TRNSLT_OE_B' R387-1 # NET 'BULK_2V5' R387-2 # 2.5 V to the Pull-Up NET 'BSPT_CTP_1_TP_TRNSLT_OE_B' U360-5 NET 'INV_CTP_1_TP_TRNSLT_OE_B' U360-6 U361-9 NET 'CTP_1_TP_TRNSLT_OE_B' U361-8 NET 'CTP_1_TP_TRNSLT_OE_B' R388-1 # NET 'BULK_2V5' R388-2 # 2.5 V to the Pull-Up NET 'BSPT_CTP_2_TP_TRNSLT_OE_B' U360-13 NET 'INV_CTP_2_TP_TRNSLT_OE_B' U360-12 U361-12 NET 'CTP_2_TP_TRNSLT_OE_B' U361-11 NET 'CTP_2_TP_TRNSLT_OE_B' R389-1 # NET 'BULK_2V5' R389-2 # 2.5 V to the Pull-Up # # Oversight of the LVDS-Cable Translator OE_B Control Signals # NET 'BSPT_CABLE_1_TRNSLT_OE_B' U360-11 NET 'INV_CABLE_1_TRNSLT_OE_B' U360-10 U363-2 NET 'CABLE_1_TRNSLT_OE_B' U363-3 NET 'CABLE_1_TRNSLT_OE_B' R383-1 # NET 'BULK_2V5' R383-2 # 2.5 V to the Pull-Up NET 'BSPT_CABLE_2_TRNSLT_OE_B' U360-9 NET 'INV_CABLE_2_TRNSLT_OE_B' U360-8 U363-5 NET 'CABLE_2_TRNSLT_OE_B' U363-6 NET 'CABLE_2_TRNSLT_OE_B' R384-1 # NET 'BULK_2V5' R384-2 # 2.5 V to the Pull-Up NET 'BSPT_CABLE_3_TRNSLT_OE_B' U362-1 NET 'INV_CABLE_3_TRNSLT_OE_B' U362-2 U363-12 NET 'CABLE_3_TRNSLT_OE_B' U363-11 NET 'CABLE_3_TRNSLT_OE_B' R385-1 # NET 'BULK_2V5' R385-2 # 2.5 V to the Pull-Up # # Oversight of the VME DTACK_B signal from the CMX card # NET 'BSPT_SEND_VME_DTACK_B' U362-9 NET 'INV_SEND_VME_DTACK_B' U362-8 U358-5 U358-2 # The connections from U358-1 and U358-6 i.e. the driver # output pins to the backplane connector DTACK_B pin is # shown in the nets file: vme_bus_interface_chips_n2p.txt # # Oversight of the TTCDec Translator OE_B Control Signals # NET 'BSPT_TTC_TRNSLT_OE_B' U362-3 NET 'INV_TTC_TRNSLT_OE_B' U362-4 U363-9 NET 'TTC_TRNSLT_OE_B' U363-8 NET 'TTC_TRNSLT_OE_B' R392-1 # NET 'BULK_2V5' R392-2 # 2.5 V to the Pull-Up NET 'BSPT_TTC_RESET_TRNSLT_OE_B' U362-11 NET 'INV_TTC_RESET_TRNSLT_OE_B' U362-10 U366-2 NET 'TTC_RESET_TRNSLT_OE_B' U366-3 NET 'TTC_RESET_TRNSLT_OE_B' R393-1 # NET 'BULK_2V5' R393-2 # 2.5 V to the Pull-Up # # Oversight of the VME-OCB Bus Interface Management Signals # NET 'BSPT_VME_D_BUS_TRNCVR_OE_B' U362-5 NET 'INV_VME_D_BUS_TRNCVR_OE_B' U362-6 U366-9 NET 'VME_D_BUS_TRNCVR_OE_B' U366-8 NET 'VME_D_BUS_TRNCVR_OE_B' R390-1 # NET 'BULK_3V3' R390-2 # 3.3 V to the Pull-Up NET 'BSPT_OCB_ADRS_AND_CTRL_TRNSLT_OE_B' U362-13 NET 'INV_OCB_ADRS_AND_CTRL_TRNSLT_OE_B' U362-12 U366-12 NET 'OCB_ADRS_AND_CTRL_TRNSLT_OE_B' U366-11 NET 'OCB_ADRS_AND_CTRL_TRNSLT_OE_B' R391-1 # NET 'BULK_2V5' R391-2 # 2.5 V to the Pull-Up # # Now include the Power and Ground connections to # the 6 chips that are in the Hardwired Oversight Logic # section of the CMX card. This includes U358 which # is the DTACK_B driver and thus is part of the VME # Interface section. And now add the U366 chip. # # Power and Ground for U358 and U360:U364 and U366 NET 'BULK_3V3' U358-14 U360-14 U361-14 # 5.0V power NET 'GROUND' U358-7 U360-7 U361-7 # Ground NET 'BULK_3V3' U362-14 U363-14 U364-14 # 5.0V power NET 'GROUND' U362-7 U363-7 U364-7 # Ground NET 'BULK_3V3' U366-14 # 5.0V power NET 'GROUND' U366-7 # Ground # ByPass Capacitors for U358 and U360:U364 and for U366 NET 'BULK_3V3' C425-1 C426-1 # ByPass Cap 5.0V power NET 'BULK_3V3' C427-2 C428-2 # ByPass Cap 5.0V power NET 'GROUND' C425-2 C426-2 # ByPass Cap Ground connections NET 'GROUND' C427-1 C428-1 # ByPass Cap Ground connections NET 'BULK_3V3' C451-1 C452-1 # ByPass Cap 5.0V power NET 'BULK_3V3' C453-2 C454-2 # ByPass Cap 5.0V power NET 'GROUND' C451-2 C452-2 # ByPass Cap Ground connections NET 'GROUND' C453-1 C454-1 # ByPass Cap Ground connections NET 'BULK_3V3' C455-1 C456-1 # ByPass Cap 5.0V power NET 'BULK_3V3' C457-2 C458-2 # ByPass Cap 5.0V power NET 'GROUND' C455-2 C456-2 # ByPass Cap Ground connections NET 'GROUND' C457-1 C458-1 # ByPass Cap Ground connections NET 'BULK_3V3' C461-1 C462-2 # ByPass Cap 5.0V power NET 'GROUND' C461-2 C462-1 # ByPass Cap Ground connections # # Tie-Downs of UnUsed Input Pins on U358, U365, and U366 # --------------------------------------------------------- NET 'GROUND' U358-10 U358-9 # Tie-Down U358 Unused Input Pins NET 'GROUND' U358-13 U358-12 # Tie-Down U358 Unused Input Pins NET 'GROUND' U365-13 # Tie-Down U365 Unused Input Pins NET 'GROUND' U366-4 U366-5 # Tie-Down U366 Unused Input Pins