# # CMX-0 Nets File # # TTCDec Signals, Power, and Ground Nets # -======----------------------------------- # # # Original Rev. 22-Sept-2012 # Most Recent Rev. 3-Sept-2013 # # # # This file holds the nets for all of the Signal, Power, and # Ground connections for the TTCDec mezzanine card. # # # Recall that the TTCDec mezzanine has two physical connectors. # Both of these connectors have been included in the geometry for # this component. The pin numbers of these 2 connectors are: # H1_1 : H1_64 and H2_1 : H2_64. # # Recall that pins 61 : 64 are the 4 center blade pins # in each connector and these are Ground pins. # # Recall that the TTCDec mezzanine uses only 3.3 V power. # # This file includes the power supply bypass capacitors for # the TTCDec mezzanine card. # # # The components referenced in this file are: # # TTC_Mez the TTCDec Mezzanine Card # # C431, C432 47 nFd Bypass capacitors BULK_3V3 # C433, C434 100 nFd Bypass capacitors BULK_3V3 # # # Input Control Signals to the TTCDec # # The TTCDec receives 3 control type signals from the # the Board Support FPGA. These are 3.3V CMOS signals. # NET 'TTC_PD' TTC_Mez-H1_42 # Clock Changeover Mode: Protected or DeBug NET 'TTC_CLK_SEL' TTC_Mez-H1_44 # Select 40 MHz rock or TTCrx clock source NET 'TTC_RESET_B' TTC_Mez-H1_29 # Reset the TTCrx ASIC # # I2C Bus Signals to the TTCDec # # The TTCDec has an I2C Bus connection with the Board # Support FPGA. The 2 lines of the I2C Bus are 3.3V CMOS signals. # NET 'TTC_SCL' TTC_Mez-H1_43 # I2C Serial Clock BSPT_FPGA --> TTCDec NET 'TTC_SDA' TTC_Mez-H1_45 # I2C serail data bi-directional BSPT <-> TTCDec # # TTCDec Output Signals going to Translator-Buffer Inputs # NET 'TTC_BRCST_2' TTC_Mez-H2_26 U151-2 # TTC_BRCST_2 TTC to Trnsltr NET 'TTC_BRCST_3' TTC_Mez-H2_27 U151-3 # TTC_BRCST_3 TTC to Trnsltr NET 'TTC_BRCST_4' TTC_Mez-H2_28 U151-5 # TTC_BRCST_4 TTC to Trnsltr NET 'TTC_BRCST_5' TTC_Mez-H2_29 U151-6 # TTC_BRCST_5 TTC to Trnsltr NET 'TTC_BRCST_6' TTC_Mez-H2_32 U151-8 # TTC_BRCST_6 TTC to Trnsltr NET 'TTC_BRCST_7' TTC_Mez-H2_31 U151-9 # TTC_BRCST_7 TTC to Trnsltr NET 'TTC_BRCST_STR_1' TTC_Mez-H2_25 U151-11 # TTC_BRCST_STR_1 TTC to Trnsltr NET 'TTC_BRCST_STR_2' TTC_Mez-H2_30 U151-12 # TTC_BRCST_STR_2 TTC to Trnsltr NET 'TTC_SIN_ERR_STR' TTC_Mez-H2_1 U151-13 # TTC_SIN_ERR_STR TTC to Trnsltr NET 'TTC_DB_ERR_STR' TTC_Mez-H2_2 U151-14 # TTC_DB_ERR_STR TTC to Trnsltr NET 'TTC_CLK_40_L1A' TTC_Mez-H2_6 U151-16 # TTC_CLK_40_L1A TTC to Trnsltr NET 'TTC_BNCH_CNT_RES' TTC_Mez-H2_33 U151-17 # TTC_BNCH_CNT_RES TTC to Trnsltr NET 'TTC_EV_CNT_RES' TTC_Mez-H2_34 U151-19 # TTC_EV_CNT_RES TTC to Trnsltr NET 'TTC_EV_CNT_H_STR' TTC_Mez-H2_37 U151-20 # TTC_EV_CNT_H_STR TTC to Trnsltr NET 'TTC_EV_CNT_L_STR' TTC_Mez-H2_40 U151-22 # TTC_EV_CNT_L_STR TTC to Trnsltr NET 'TTC_BNCH_CNT_STR' TTC_Mez-H2_39 U151-23 # TTC_BNCH_CNT_STR TTC to Trnsltr NET 'TTC_B_CNT_0' TTC_Mez-H2_44 U152-2 # TTC_B_CNT_0 TTC to Trnsltr NET 'TTC_B_CNT_1' TTC_Mez-H2_43 U152-3 # TTC_B_CNT_1 TTC to Trnsltr NET 'TTC_B_CNT_2' TTC_Mez-H2_46 U152-5 # TTC_B_CNT_2 TTC to Trnsltr NET 'TTC_B_CNT_3' TTC_Mez-H2_45 U152-6 # TTC_B_CNT_3 TTC to Trnsltr NET 'TTC_B_CNT_4' TTC_Mez-H2_48 U152-8 # TTC_B_CNT_4 TTC to Trnsltr NET 'TTC_B_CNT_5' TTC_Mez-H2_47 U152-9 # TTC_B_CNT_5 TTC to Trnsltr NET 'TTC_B_CNT_6' TTC_Mez-H2_52 U152-11 # TTC_B_CNT_6 TTC to Trnsltr NET 'TTC_B_CNT_7' TTC_Mez-H2_51 U152-12 # TTC_B_CNT_7 TTC to Trnsltr NET 'TTC_B_CNT_8' TTC_Mez-H2_54 U152-13 # TTC_B_CNT_8 TTC to Trnsltr NET 'TTC_B_CNT_9' TTC_Mez-H2_53 U152-14 # TTC_B_CNT_9 TTC to Trnsltr NET 'TTC_B_CNT_10' TTC_Mez-H2_56 U152-16 # TTC_B_CNT_10 TTC to Trnsltr NET 'TTC_B_CNT_11' TTC_Mez-H2_55 U152-17 # TTC_B_CNT_11 TTC to Trnsltr NET 'TTC_DQ_0' TTC_Mez-H1_3 U152-19 # TTC_DQ_0 TTC to Trnsltr NET 'TTC_DQ_1' TTC_Mez-H1_4 U152-20 # TTC_DQ_1 TTC to Trnsltr NET 'TTC_DQ_2' TTC_Mez-H1_5 U152-22 # TTC_DQ_2 TTC to Trnsltr NET 'TTC_DQ_3' TTC_Mez-H1_6 U152-23 # TTC_DQ_3 TTC to Trnsltr NET 'TTC_L1_ACCEPT' TTC_Mez-H2_38 U153-2 # TTC_L1_ACCEPT TTC to Trnsltr NET 'TTC_Spare_1_3' U153-3 # TTC_Spare_1_3 TTC to Trnsltr NET 'TTC_SER_B_CH' TTC_Mez-H2_60 U153-5 # TTC_SER_B_CH TTC to Trnsltr NET 'TTC_Spare_2_3' U153-6 # TTC_Spare_2_3 TTC to Trnsltr NET 'TTC_D_OUT_STR' TTC_Mez-H1_1 U153-8 # TTC_D_OUT_STR TTC to Trnsltr NET 'TTC_Spare_3_3' U153-9 # TTC_Spare_3_3 TTC to Trnsltr NET 'TTC_READY' TTC_Mez-H1_30 U153-11 # TTC_READY (STATUS_1) TTC to Trnsltr NET 'TTC_STATUS_2' TTC_Mez-H1_32 U153-12 # TTC_STATUS_2 TTC to Trnsltr NET 'TTC_D_OUT_0' TTC_Mez-H1_19 U153-13 # TTC_D_OUT_0 TTC to Trnsltr NET 'TTC_D_OUT_1' TTC_Mez-H1_20 U153-14 # TTC_D_OUT_1 TTC to Trnsltr NET 'TTC_D_OUT_2' TTC_Mez-H1_21 U153-16 # TTC_D_OUT_2 TTC to Trnsltr NET 'TTC_D_OUT_3' TTC_Mez-H1_22 U153-17 # TTC_D_OUT_3 TTC to Trnsltr NET 'TTC_D_OUT_4' TTC_Mez-H1_23 U153-19 # TTC_D_OUT_4 TTC to Trnsltr NET 'TTC_D_OUT_5' TTC_Mez-H1_24 U153-20 # TTC_D_OUT_5 TTC to Trnsltr NET 'TTC_D_OUT_6' TTC_Mez-H1_25 U153-22 # TTC_D_OUT_6 TTC to Trnsltr NET 'TTC_D_OUT_7' TTC_Mez-H1_26 U153-23 # TTC_D_OUT_7 TTC to Trnsltr NET 'TTC_SUB_ADRS_0' TTC_Mez-H1_9 U154-2 # TTC_SUB_ADRS_0 TTC to Trnsltr NET 'TTC_SUB_ADRS_1' TTC_Mez-H1_10 U154-3 # TTC_SUB_ADRS_1 TTC to Trnsltr NET 'TTC_SUB_ADRS_2' TTC_Mez-H1_11 U154-5 # TTC_SUB_ADRS_2 TTC to Trnsltr NET 'TTC_SUB_ADRS_3' TTC_Mez-H1_12 U154-6 # TTC_SUB_ADRS_3 TTC to Trnsltr NET 'TTC_SUB_ADRS_4' TTC_Mez-H1_13 U154-8 # TTC_SUB_ADRS_4 TTC to Trnsltr NET 'TTC_SUB_ADRS_5' TTC_Mez-H1_14 U154-9 # TTC_SUB_ADRS_5 TTC to Trnsltr NET 'TTC_SUB_ADRS_6' TTC_Mez-H1_15 U154-11 # TTC_SUB_ADRS_6 TTC to Trnsltr NET 'TTC_SUB_ADRS_7' TTC_Mez-H1_16 U154-12 # TTC_SUB_ADRS_7 TTC to Trnsltr # # DIRECTION and OUTPUT_ENABLE_B signals on the U151:U154 Translators # # The Direction of the Translator/Buffer chips for the TTCDec # Output Bus is set by Jumper 28. JMP28 pulls the Direction # control pin to these buffers LOW. Direction "B" --> "A". NET 'TTC_TRNSLT_DIR' U151-1 U151-24 # Direction of the TTCDec Output NET 'TTC_TRNSLT_DIR' U152-1 U152-24 # Bus Translators / Buffers NET 'TTC_TRNSLT_DIR' U153-1 U153-24 # Want to Receive 3.3V on "B" NET 'TTC_TRNSLT_DIR' U154-1 # Drive 2.5V on "A". B-->A NET 'TTC_TRNSLT_DIR' JMP28-1 # Thus Direction must be LOW NET 'GROUND' JMP28-2 # Ground end of the DIR Jumper NET 'TTC_TRNSLT_OE_B' U151-25 U151-48 # Output_Enable_B of the TTCDec NET 'TTC_TRNSLT_OE_B' U152-25 U152-48 # Output Translator/Buffer chips. NET 'TTC_TRNSLT_OE_B' U153-25 U153-48 # Only want to enable these Drivers NET 'TTC_TRNSLT_OE_B' U154-48 # if BOARD_POWER_OK & BSPT_DONE # are asserted and BSPT_FPGA # says it is OK to do so. # NOTE that Direction and OE_B control # of the section of U154 that is used to put # the Geo Adrs onto some CHIP_ID lines is shown below. # # TTCDec Translator-Buffer Outputs going to Series Terminator Resistor Networks # NET 'TB_TTC_BRCST_2' U151-47 N151-1 # TTC_BRCST_2 Trnsltr to STerm NET 'TB_TTC_BRCST_3' U151-46 N151-2 # TTC_BRCST_3 Trnsltr to STerm NET 'TB_TTC_BRCST_4' U151-44 N151-3 # TTC_BRCST_4 Trnsltr to STerm NET 'TB_TTC_BRCST_5' U151-43 N151-4 # TTC_BRCST_5 Trnsltr to STerm NET 'TB_TTC_BRCST_6' U151-41 N151-5 # TTC_BRCST_6 Trnsltr to STerm NET 'TB_TTC_BRCST_7' U151-40 N151-6 # TTC_BRCST_7 Trnsltr to STerm NET 'TB_TTC_BRCST_STR_1' U151-38 N151-7 # TTC_BRCST_STR_1 Trnsltr to STerm NET 'TB_TTC_BRCST_STR_2' U151-37 N151-8 # TTC_BRCST_STR_2 Trnsltr to STerm NET 'TB_TTC_SIN_ERR_STR' U151-36 N152-1 # TTC_SIN_ERR_STR Trnsltr to STerm NET 'TB_TTC_DB_ERR_STR' U151-35 N152-2 # TTC_DB_ERR_STR Trnsltr to STerm NET 'TB_TTC_CLK_40_L1A' U151-33 N152-3 # TTC_CLK_40_L1A Trnsltr to STerm NET 'TB_TTC_BNCH_CNT_RES' U151-32 N152-4 # TTC_BNCH_CNT_RES Trnsltr to STerm NET 'TB_TTC_EV_CNT_RES' U151-30 N152-5 # TTC_EV_CNT_RES Trnsltr to STerm NET 'TB_TTC_EV_CNT_H_STR' U151-29 N152-6 # TTC_EV_CNT_H_STR Trnsltr to STerm NET 'TB_TTC_EV_CNT_L_STR' U151-27 N152-7 # TTC_EV_CNT_L_STR Trnsltr to STerm NET 'TB_TTC_BNCH_CNT_STR' U151-26 N152-8 # TTC_BNCH_CNT_STR Trnsltr to STerm NET 'TB_TTC_B_CNT_0' U152-47 N153-1 # TTC_B_CNT_0 Trnsltr to STerm NET 'TB_TTC_B_CNT_1' U152-46 N153-2 # TTC_B_CNT_1 Trnsltr to STerm NET 'TB_TTC_B_CNT_2' U152-44 N153-3 # TTC_B_CNT_2 Trnsltr to STerm NET 'TB_TTC_B_CNT_3' U152-43 N153-4 # TTC_B_CNT_3 Trnsltr to STerm NET 'TB_TTC_B_CNT_4' U152-41 N153-5 # TTC_B_CNT_4 Trnsltr to STerm NET 'TB_TTC_B_CNT_5' U152-40 N153-6 # TTC_B_CNT_5 Trnsltr to STerm NET 'TB_TTC_B_CNT_6' U152-38 N153-7 # TTC_B_CNT_6 Trnsltr to STerm NET 'TB_TTC_B_CNT_7' U152-37 N153-8 # TTC_B_CNT_7 Trnsltr to STerm NET 'TB_TTC_B_CNT_8' U152-36 N154-1 # TTC_B_CNT_8 Trnsltr to STerm NET 'TB_TTC_B_CNT_9' U152-35 N154-2 # TTC_B_CNT_9 Trnsltr to STerm NET 'TB_TTC_B_CNT_10' U152-33 N154-3 # TTC_B_CNT_10 Trnsltr to STerm NET 'TB_TTC_B_CNT_11' U152-32 N154-4 # TTC_B_CNT_11 Trnsltr to STerm NET 'TB_TTC_DQ_0' U152-30 N154-5 # TTC_DQ_0 Trnsltr to STerm NET 'TB_TTC_DQ_1' U152-29 N154-6 # TTC_DQ_1 Trnsltr to STerm NET 'TB_TTC_DQ_2' U152-27 N154-7 # TTC_DQ_2 Trnsltr to STerm NET 'TB_TTC_DQ_3' U152-26 N154-8 # TTC_DQ_3 Trnsltr to STerm NET 'TB_TTC_L1_ACCEPT' U153-47 N155-1 # TTC_L1_ACCEPT Trnsltr to STerm NET 'TB_TTC_Spare_1_3' U153-46 N155-2 # TTC_Spare_1_3 Trnsltr to STerm NET 'TB_TTC_SER_B_CH' U153-44 N155-3 # TTC_SER_B_CH Trnsltr to STerm NET 'TB_TTC_Spare_2_3' U153-43 N155-4 # TTC_Spare_2_3 Trnsltr to STerm NET 'TB_TTC_D_OUT_STR' U153-41 N155-5 # TTC_D_OUT_STR Trnsltr to STerm NET 'TB_TTC_Spare_3_3' U153-40 N155-6 # TTC_Spare_3_3 Trnsltr to STerm NET 'TB_TTC_READY' U153-38 N155-7 # TTC_READY (STATUS_1) Trnsltr to STerm NET 'TB_TTC_STATUS_2' U153-37 N155-8 # TTC_STATUS_2 Trnsltr to STerm NET 'TB_TTC_D_OUT_0' U153-36 N156-1 # TTC_D_OUT_0 Trnsltr to STerm NET 'TB_TTC_D_OUT_1' U153-35 N156-2 # TTC_D_OUT_1 Trnsltr to STerm NET 'TB_TTC_D_OUT_2' U153-33 N156-3 # TTC_D_OUT_2 Trnsltr to STerm NET 'TB_TTC_D_OUT_3' U153-32 N156-4 # TTC_D_OUT_3 Trnsltr to STerm NET 'TB_TTC_D_OUT_4' U153-30 N156-5 # TTC_D_OUT_4 Trnsltr to STerm NET 'TB_TTC_D_OUT_5' U153-29 N156-6 # TTC_D_OUT_5 Trnsltr to STerm NET 'TB_TTC_D_OUT_6' U153-27 N156-7 # TTC_D_OUT_6 Trnsltr to STerm NET 'TB_TTC_D_OUT_7' U153-26 N156-8 # TTC_D_OUT_7 Trnsltr to STerm NET 'TB_TTC_SUB_ADRS_0' U154-47 N157-1 # TTC_SUB_ADRS_0 Trnsltr to STerm NET 'TB_TTC_SUB_ADRS_1' U154-46 N157-2 # TTC_SUB_ADRS_1 Trnsltr to STerm NET 'TB_TTC_SUB_ADRS_2' U154-44 N157-3 # TTC_SUB_ADRS_2 Trnsltr to STerm NET 'TB_TTC_SUB_ADRS_3' U154-43 N157-4 # TTC_SUB_ADRS_3 Trnsltr to STerm NET 'TB_TTC_SUB_ADRS_4' U154-41 N157-5 # TTC_SUB_ADRS_4 Trnsltr to STerm NET 'TB_TTC_SUB_ADRS_5' U154-40 N157-6 # TTC_SUB_ADRS_5 Trnsltr to STerm NET 'TB_TTC_SUB_ADRS_6' U154-38 N157-7 # TTC_SUB_ADRS_6 Trnsltr to STerm NET 'TB_TTC_SUB_ADRS_7' U154-37 N157-8 # TTC_SUB_ADRS_7 Trnsltr to STerm # # TTCDec Outputs # # Buffered, Series Terminated, 2.5V TTC Output Bus Signals # NET 'BUF_TTC_BRCST_2' N151-16 # Buffered TTC_BRCST_2 NET 'BUF_TTC_BRCST_3' N151-15 # Buffered TTC_BRCST_3 NET 'BUF_TTC_BRCST_4' N151-14 # Buffered TTC_BRCST_4 NET 'BUF_TTC_BRCST_5' N151-13 # Buffered TTC_BRCST_5 NET 'BUF_TTC_BRCST_6' N151-12 # Buffered TTC_BRCST_6 NET 'BUF_TTC_BRCST_7' N151-11 # Buffered TTC_BRCST_7 NET 'BUF_TTC_BRCST_STR_1' N151-10 # Buffered TTC_BRCST_STR_1 NET 'BUF_TTC_BRCST_STR_2' N151-9 # Buffered TTC_BRCST_STR_2 NET 'BUF_TTC_SIN_ERR_STR' N152-16 # Buffered TTC_SIN_ERR_STR NET 'BUF_TTC_DB_ERR_STR' N152-15 # Buffered TTC_DB_ERR_STR NET 'BUF_TTC_CLK_40_L1A' N152-14 # Buffered TTC_CLK_40_L1A NET 'BUF_TTC_BNCH_CNT_RES' N152-13 # Buffered TTC_BNCH_CNT_RES NET 'BUF_TTC_EV_CNT_RES' N152-12 # Buffered TTC_EV_CNT_RES NET 'BUF_TTC_EV_CNT_H_STR' N152-11 # Buffered TTC_EV_CNT_H_STR NET 'BUF_TTC_EV_CNT_L_STR' N152-10 # Buffered TTC_EV_CNT_L_STR NET 'BUF_TTC_BNCH_CNT_STR' N152-9 # Buffered TTC_BNCH_CNT_STR NET 'BUF_TTC_B_CNT_0' N153-16 # Buffered TTC_B_CNT_0 NET 'BUF_TTC_B_CNT_1' N153-15 # Buffered TTC_B_CNT_1 NET 'BUF_TTC_B_CNT_2' N153-14 # Buffered TTC_B_CNT_2 NET 'BUF_TTC_B_CNT_3' N153-13 # Buffered TTC_B_CNT_3 NET 'BUF_TTC_B_CNT_4' N153-12 # Buffered TTC_B_CNT_4 NET 'BUF_TTC_B_CNT_5' N153-11 # Buffered TTC_B_CNT_5 NET 'BUF_TTC_B_CNT_6' N153-10 # Buffered TTC_B_CNT_6 NET 'BUF_TTC_B_CNT_7' N153-9 # Buffered TTC_B_CNT_7 NET 'BUF_TTC_B_CNT_8' N154-16 # Buffered TTC_B_CNT_8 NET 'BUF_TTC_B_CNT_9' N154-15 # Buffered TTC_B_CNT_9 NET 'BUF_TTC_B_CNT_10' N154-14 # Buffered TTC_B_CNT_10 NET 'BUF_TTC_B_CNT_11' N154-13 # Buffered TTC_B_CNT_11 NET 'BUF_TTC_DQ_0' N154-12 # Buffered TTC_DQ_0 NET 'BUF_TTC_DQ_1' N154-11 # Buffered TTC_DQ_1 NET 'BUF_TTC_DQ_2' N154-10 # Buffered TTC_DQ_2 NET 'BUF_TTC_DQ_3' N154-9 # Buffered TTC_DQ_3 NET 'BUF_TTC_L1_ACCEPT' N155-16 # Buffered TTC_L1_ACCEPT NET 'BUF_TTC_Spare_1_3' N155-15 # Buffered TTC_Spare_1_3 NET 'BUF_TTC_SER_B_CH' N155-14 # Buffered TTC_SER_B_CH NET 'BUF_TTC_Spare_2_3' N155-13 # Buffered TTC_Spare_2_3 NET 'BUF_TTC_D_OUT_STR' N155-12 # Buffered TTC_D_OUT_STR NET 'BUF_TTC_Spare_3_3' N155-11 # Buffered TTC_Spare_3_3 NET 'BUF_TTC_READY' N155-10 # Buffered TTC_READY (STATUS_1) NET 'BUF_TTC_STATUS_2' N155-9 # Buffered TTC_STATUS_2 NET 'BUF_TTC_D_OUT_0' N156-16 # Buffered TTC_D_OUT_0 NET 'BUF_TTC_D_OUT_1' N156-15 # Buffered TTC_D_OUT_1 NET 'BUF_TTC_D_OUT_2' N156-14 # Buffered TTC_D_OUT_2 NET 'BUF_TTC_D_OUT_3' N156-13 # Buffered TTC_D_OUT_3 NET 'BUF_TTC_D_OUT_4' N156-12 # Buffered TTC_D_OUT_4 NET 'BUF_TTC_D_OUT_5' N156-11 # Buffered TTC_D_OUT_5 NET 'BUF_TTC_D_OUT_6' N156-10 # Buffered TTC_D_OUT_6 NET 'BUF_TTC_D_OUT_7' N156-9 # Buffered TTC_D_OUT_7 NET 'BUF_TTC_SUB_ADRS_0' N157-16 # Buffered TTC_SUB_ADRS_0 NET 'BUF_TTC_SUB_ADRS_1' N157-15 # Buffered TTC_SUB_ADRS_1 NET 'BUF_TTC_SUB_ADRS_2' N157-14 # Buffered TTC_SUB_ADRS_2 NET 'BUF_TTC_SUB_ADRS_3' N157-13 # Buffered TTC_SUB_ADRS_3 NET 'BUF_TTC_SUB_ADRS_4' N157-12 # Buffered TTC_SUB_ADRS_4 NET 'BUF_TTC_SUB_ADRS_5' N157-11 # Buffered TTC_SUB_ADRS_5 NET 'BUF_TTC_SUB_ADRS_6' N157-10 # Buffered TTC_SUB_ADRS_6 NET 'BUF_TTC_SUB_ADRS_7' N157-9 # Buffered TTC_SUB_ADRS_7 # # CHIP_ID Signals # # Loaded Into the TTCDec over TTC_D_OUT(7:0) and TTC_SUB_ADRS(7:0) # During a TTCDec Reset # # These 16 bits CHIP_ID(13:0) and MASTER_MODE(1:0) # must be loaded into the TTC_D_OUT(7:0) and # TTC_SUB_ADRS(7:0) when the TTCDec is Reset. # # These 16 bits come from the 7 Geographic Address lines # and from 9 pairs of jumpers. # # The 7 Geographic Address signals are driven onto the # TTC_D_OUT(7:6) and TTC_SUB_ADRS(4:0) as follows # # GEO_ADRS_0 ---> D_OUT_6 = CHIP_ID_6 # GEO_ADRS_1 ---> D_OUT_7 = CHIP_ID_7 # GEO_ADRS_2 ---> SUB_ADRS_0 = CHIP_ID_8 # GEO_ADRS_3 ---> SUB_ADRS_1 = CHIP_ID_9 # GEO_ADRS_4 ---> SUB_ADRS_2 = CHIP_ID_10 # GEO_ADRS_5 ---> SUB_ADRS_3 = CHIP_ID_11 # GEO_ADRS_6 ---> SUB_ADRS_4 = CHIP_ID_12 # # The driver for these 7 signals is the unused 1/2 of # the 4 translator chips listed above for the TTCDec # output signals. This translator has its "A" side # setup as 2.5V receivers. Its "B" side is 3.3V # drivers. Its Direction is always A --> B. Its "B" # side output drivers are enabled when BUF_TTC_READY # is voltage low. # # The 9 pairs of jumpers are bridged across the # TTC_D_OUT(5:0) and TTC_SUB_ADRS(7:5) as follows # # Jumper to # ------------ # Pull Pull # Low High # ----- ----- # JMP10 JMP11 ---> D_OUT_0 = CHIP_ID_0 # JMP12 JMP13 ---> D_OUT_1 = CHIP_ID_1 # JMP14 JMP15 ---> D_OUT_2 = CHIP_ID_2 # JMP16 JMP17 ---> D_OUT_3 = CHIP_ID_3 # JMP18 JMP19 ---> D_OUT_4 = CHIP_ID_4 # JMP20 JMP21 ---> D_OUT_5 = CHIP_ID_5 # JMP22 JMP23 ---> SUB_ADRS_5 = CHIP_ID_13 # JMP24 JMP25 ---> SUB_ADRS_6 = MASTER_MODE_0 # JMP26 JMP27 ---> SUB_ADRS_7 = MASTER_MODE_1 # # Connect the 7 Geographic Address lines to the 2.5V inputs # of the unused half of U154. These Geo Adrs lines become # CHIP_ID(12:6) NET 'OCB_GEO_ADRS_0' U154-35 # TTCDec Reset -> drive D_OUT_6 -> CHIP_ID_6 NET 'OCB_GEO_ADRS_1' U154-33 # TTCDec Reset -> drive D_OUT_7 -> CHIP_ID_7 NET 'OCB_GEO_ADRS_2' U154-32 # TTCDec Reset -> drive SUB_ADRS_0 -> CHIP_ID_8 NET 'OCB_GEO_ADRS_3' U154-30 # TTCDec Reset -> drive SUB_ADRS_1 -> CHIP_ID_9 NET 'OCB_GEO_ADRS_4' U154-29 # TTCDec Reset -> drive SUB_ADRS_2 -> CHIP_ID_10 NET 'OCB_GEO_ADRS_5' U154-27 # TTCDec Reset -> drive SUB_ADRS_3 -> CHIP_ID_11 NET 'OCB_GEO_ADRS_6' U154-26 # TTCDec Reset -> drive SUB_ADRS_4 -> CHIP_ID_12 # # Connect the 3.3V output of these translators to the D_OUT(7:6) # and the SUB_ADRS(4:0) connections on the TTCDec Mezzanine. NET 'TTC_D_OUT_6' U154-14 # TTCDec Reset -> GA_0 -> D_OUT_6 -> CHIP_ID_6 NET 'TTC_D_OUT_7' U154-16 # TTCDec Reset -> GA_1 -> D_OUT_7 -> CHIP_ID_7 NET 'TTC_SUB_ADRS_0' U154-17 # TTCDec Reset -> GA_2 -> SUB_ADRS_0 -> CHIP_ID_8 NET 'TTC_SUB_ADRS_1' U154-19 # TTCDec Reset -> GA_3 -> SUB_ADRS_1 -> CHIP_ID_9 NET 'TTC_SUB_ADRS_2' U154-20 # TTCDec Reset -> GA_4 -> SUB_ADRS_2 -> CHIP_ID_10 NET 'TTC_SUB_ADRS_3' U154-22 # TTCDec Reset -> GA_5 -> SUB_ADRS_3 -> CHIP_ID_11 NET 'TTC_SUB_ADRS_4' U154-23 # TTCDec Reset -> GA_6 -> SUB_ADRS_4 -> CHIP_ID_12 # # Connect the JUMPERS, actually 4.7k Ohm resistors, that drive # D_OUT(5:0) and SUB_ADRS(7:5) when the TTCDec is Reset. NET 'TTC_D_OUT_0' JMP10-2 JMP11-1 # TTCDec Reset D_OUT_0 -> CHIP_ID_0 NET 'TTC_D_OUT_1' JMP12-2 JMP13-1 # TTCDec Reset D_OUT_1 -> CHIP_ID_1 NET 'TTC_D_OUT_2' JMP14-2 JMP15-1 # TTCDec Reset D_OUT_2 -> CHIP_ID_2 NET 'TTC_D_OUT_3' JMP16-2 JMP17-1 # TTCDec Reset D_OUT_3 -> CHIP_ID_3 NET 'TTC_D_OUT_4' JMP18-2 JMP19-1 # TTCDec Reset D_OUT_4 -> CHIP_ID_4 NET 'TTC_D_OUT_5' JMP20-2 JMP21-1 # TTCDec Reset D_OUT_5 -> CHIP_ID_5 NET 'TTC_SUB_ADRS_5' JMP22-2 JMP23-1 # TTCDec Reset SUB_ADRS_5 -> CHIP_ID_13 NET 'TTC_SUB_ADRS_6' JMP24-2 JMP25-1 # TTCDec Reset SUB_ADRS_6 -> MASTER_MODE_0 NET 'TTC_SUB_ADRS_7' JMP26-2 JMP27-1 # TTCDec Reset SUB_ADRS_7 -> MASTER_MODE_1 # # Now tie these Jumpers to 3.3V or Ground as appropriate NET 'BULK_3V3' JMP11-2 JMP13-2 JMP15-2 # Tie Pull-Up Jumpers to 3V3 NET 'BULK_3V3' JMP17-2 JMP19-2 JMP21-2 # Tie Pull-Up Jumpers to 3V3 NET 'BULK_3V3' JMP23-2 JMP25-2 JMP27-2 # Tie Pull-Up Jumpers to 3V3 NET 'GROUND' JMP10-1 JMP12-1 JMP14-1 # Tie Pull-down Jumpers to Ground NET 'GROUND' JMP16-1 JMP18-1 JMP20-1 # Tie Pull-down Jumpers to Ground NET 'GROUND' JMP22-1 JMP24-1 JMP26-1 # Tie Pull-down Jumpers to Ground # # DIRECTION and OUTPUT_ENABLE_B signals for the section # of U154 that is used to put the Geographic Address on # to some of the CHIP_ID lines. # # The Direction of the section of the Translator/Buffer U154 # that puts Geo_Adrs onto CHIP_ID. Receive Geo_Adrs on # the 2.5V side "A". Drive this onto 3.3V side "B". # Thus want "A"-->"B" translation. This required the # Direction control signal to be HI. NET 'TTC_RESET_TRNSLT_DIR' U154-24 # Pull HI the Direction control pin NET 'TTC_RESET_TRNSLT_DIR' R257-1 # on this section of U154, i.e. NET 'BULK_2V5' R257-2 # Geo_Adrs to Chip_ID # The Output_Enable_B of the section of U154 that sends # the Geo_Adrs signals to the TTCDec CHIP_ID inputs # should only be asserted when the TTCDec is being Reset # and both Board_Power_OK and BSPT_DONE are asserted. NET 'TTC_RESET_TRNSLT_OE_B' U154-25 # Output_Enable_B of the translator # that send Geo_Adrs to TTCDec CHIP_ID # # Backplane TTC Clock Buffer and Input to the TTCDec Mezzanine # NET 'TTC_POS' C251-2 # Backplane Pin to TTC Clock Coupling Capacitor NET 'TTC_NEG' C252-2 # Backplane Pin to TTC Clock Coupling Capacitor NET 'CAP_BUF_IN_DIR' C251-1 U155-3 # Coupling Cap to Buff In DIR NET 'CAP_BUF_IN_CMP' C252-1 U155-2 # Coupling Cap to Buff In CMP NET 'BUF_TERM_BIAS' U155-1 U155-4 # Input Termination and Bias NET 'BUF_TERM_BIAS' U155-6 C253-1 # Input Termination and Bias NET 'GROUND' C253-2 # Ground Bias Filter Cap NET 'BUF_TO_TTC_IN_DIR' U155-11 TTC_Mez-H1_35 # Buffer Out to TTCDec In DIR NET 'BUF_TO_TTC_IN_CMP' U155-12 TTC_Mez-H1_37 # Buffer Out to TTCDec In CMP NET 'BUF_TO_TTC_IN_DIR' R251-1 # Pull-Down on the TTC Buf Output NET 'BUF_TO_TTC_IN_CMP' R252-1 # Pull-Down on the TTC Buf Output NET 'GROUND' R251-2 R252-2 # Ground "Vee" end of Pull-Down Resistors NET 'GROUND' U155-7 U155-14 U155-15 # Grounds to Buffer VEE NET 'GROUND' U155-17 U155-18 U155-19 U155-20 # Grounds to Buffer DAP pad NET 'TTC_BUF_VCC' U155-5 U155-8 U155-13 U155-16 # TTC Buffer Vcc Power NET 'TTC_BUF_VCC' C254-1 C255-2 C256-2 C257-1 # TTC Buffer Vcc Bypass NET 'GROUND' C254-2 C255-1 C256-1 C257-2 # Buf Vcc Bypass Ground NET 'TTC_BUF_VCC' R253-2 # TTC Buffer Vcc Source NET 'BULK_3V3' R253-1 # TTC Buffer Vcc Source # # TTCDec Mezzanine Clock Output to Clock Generator Input # # Possible Useful 40 Mhz Clock Outputs from the TTCDec NET 'TTC_CLK_40_DES_1' TTC_Mez-H2_5 R256-2 # TTC_CLK_40_DES_1 Output NET 'TTC_CLK_40_DES_1_PLL_2' TTC_Mez-H2_20 R254-2 # TTC_CLK_40_DES_1_PLL_2 Output NET 'TTC_CLK_40_DES_2_PLL_2' TTC_Mez-H2_17 R255-2 # TTC_CLK_40_DES_2_PLL_2 Output # Select the Reference for the Clocks for the DeSkew 1 # and DeSkew 3 clock signals on CMX by installing: # # either R254 or R256 to select the DeSkew 1 source # and R255 to select the DeSkew 2 source. # # Feedback from the TTCDec PLL Output 1 to the PLL Feedback Input NET 'TTC_CLK_40_DES_1_FBIN' TTC_Mez-H2_16 TTC_Mez-H2_12 # Feedback TTCDec PLL #1 NET 'TTC_CLK_40_DES_2_FBIN' TTC_Mez-H2_13 TTC_Mez-H2_9 # Feedback TTCDec PLL #2 # # TTCDec Mezzanine Card Power Pins 3.30 Volts # NET 'BULK_3V3' TTC_Mez-H1_46 TTC_Mez-H1_48 # TTCDec Power NET 'BULK_3V3' TTC_Mez-H1_50 TTC_Mez-H1_52 # TTCDec Power NET 'BULK_3V3' TTC_Mez-H1_54 TTC_Mez-H1_56 # TTCDec Power NET 'BULK_3V3' TTC_Mez-H1_58 TTC_Mez-H1_60 # TTCDec Power # # TTCDec Mezzanine Card Ground Pins # NET 'GROUND' TTC_Mez-H1_2 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H1_7 TTC_Mez-H1_8 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H1_17 TTC_Mez-H1_18 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H1_27 TTC_Mez-H1_28 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H1_31 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H1_33 TTC_Mez-H1_34 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H1_36 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H1_38 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H1_39 TTC_Mez-H1_40 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H1_41 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H1_47 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H1_59 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H1_61 TTC_Mez-H1_62 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H1_63 TTC_Mez-H1_64 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_3 TTC_Mez-H2_4 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_7 TTC_Mez-H2_8 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_10 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_11 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_14 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_15 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_18 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_19 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_21 TTC_Mez-H2_22 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_23 TTC_Mez-H2_24 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_35 TTC_Mez-H2_36 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_41 TTC_Mez-H2_42 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_49 TTC_Mez-H2_50 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_57 TTC_Mez-H2_58 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_59 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_61 TTC_Mez-H2_62 # TTCDec Ground Pins NET 'GROUND' TTC_Mez-H2_63 TTC_Mez-H2_64 # TTCDec Ground Pins # # Ground the 3 TTCDec Mezzanine Card Mounting Screws NET 'GROUND' TTC_Mez-SCRW1 # Ground TTCDec Mounting Screw NET 'GROUND' TTC_Mez-SCRW2 # Ground TTCDec Mounting Screw NET 'GROUND' TTC_Mez-SCRW3 # Ground TTCDec Mounting Screw # # 3.3 Volt Bypass Capacitors for the TTCDec Mezzanine Card # NET 'BULK_3V3' C431-2 C433-1 # 47 nFd 3.3V terminal NET 'BULK_3V3' C432-2 C434-1 # 100 nFd 3.3V terminal NET 'GROUND' C431-1 C433-2 # 47 nFd GND terminal NET 'GROUND' C432-1 C434-2 # 100 nFd GND terminal # # Power and Ground pins on the U151:U154 Translators # # Power and ByPass for U151 74AVCAH164245 power is BULK_2V5 and BULK_3V3 NET 'BULK_3V3' U151-7 U151-18 # U355 3.3V Vccb power NET 'BULK_2V5' U151-31 U151-42 # U355 2.5V Vcca power NET 'GROUND' U151-4 U151-10 # U355 Ground connections NET 'GROUND' U151-15 U151-21 # U355 Ground connections NET 'GROUND' U151-28 U151-34 # U355 Ground connections NET 'GROUND' U151-39 U151-45 # U355 Ground connections NET 'BULK_3V3' C262-1 C263-1 # ByPass Cap 3.3V Vccb power NET 'BULK_2V5' C261-2 C264-2 # ByPass Cap 2.5V Vcca power NET 'GROUND' C262-2 C263-2 # ByPass Cap Ground connections NET 'GROUND' C261-1 C264-1 # ByPass Cap Ground connections # Power and ByPass for U152 74AVCAH164245 power is BULK_2V5 and BULK_3V3 NET 'BULK_3V3' U152-7 U152-18 # U355 3.3V Vccb power NET 'BULK_2V5' U152-31 U152-42 # U355 2.5V Vcca power NET 'GROUND' U152-4 U152-10 # U355 Ground connections NET 'GROUND' U152-15 U152-21 # U355 Ground connections NET 'GROUND' U152-28 U152-34 # U355 Ground connections NET 'GROUND' U152-39 U152-45 # U355 Ground connections NET 'BULK_3V3' C266-1 C267-1 # ByPass Cap 3.3V Vccb power NET 'BULK_2V5' C265-2 C268-2 # ByPass Cap 2.5V Vcca power NET 'GROUND' C266-2 C267-2 # ByPass Cap Ground connections NET 'GROUND' C265-1 C268-1 # ByPass Cap Ground connections # Power and ByPass for U153 74AVCAH164245 power is BULK_2V5 and BULK_3V3 NET 'BULK_3V3' U153-7 U153-18 # U355 3.3V Vccb power NET 'BULK_2V5' U153-31 U153-42 # U355 2.5V Vcca power NET 'GROUND' U153-4 U153-10 # U355 Ground connections NET 'GROUND' U153-15 U153-21 # U355 Ground connections NET 'GROUND' U153-28 U153-34 # U355 Ground connections NET 'GROUND' U153-39 U153-45 # U355 Ground connections NET 'BULK_3V3' C270-1 C271-1 # ByPass Cap 3.3V Vccb power NET 'BULK_2V5' C269-2 C272-2 # ByPass Cap 2.5V Vcca power NET 'GROUND' C270-2 C271-2 # ByPass Cap Ground connections NET 'GROUND' C269-1 C272-1 # ByPass Cap Ground connections # Power and ByPass for U154 74AVCAH164245 power is BULK_2V5 and BULK_3V3 NET 'BULK_3V3' U154-7 U154-18 # U355 3.3V Vccb power NET 'BULK_2V5' U154-31 U154-42 # U355 2.5V Vcca power NET 'GROUND' U154-4 U154-10 # U355 Ground connections NET 'GROUND' U154-15 U154-21 # U355 Ground connections NET 'GROUND' U154-28 U154-34 # U355 Ground connections NET 'GROUND' U154-39 U154-45 # U355 Ground connections NET 'BULK_3V3' C274-1 C275-1 # ByPass Cap 3.3V Vccb power NET 'BULK_2V5' C273-2 C276-2 # ByPass Cap 2.5V Vcca power NET 'GROUND' C274-2 C275-2 # ByPass Cap Ground connections NET 'GROUND' C273-1 C276-1 # ByPass Cap Ground connections