# # CMX-0 Nets File # # VME Bus Interface Chips Nets # ------------------------------- # # # Original Rev. 13-Aug-2012 # Most Recent Rev. 24-Sept-2013 # # # # This file holds the nets for all of the connections involved # with the chips that connect directly to the VME Bus and the # 2.5V <--> 3.3V translator chips for the On-Card-Bus signals. # # That is this file connects the backplane VME bus to the OCB. # # This file holds the nets for all 7 of the Geographic Address lines. # # This file does not include the pins on any of the three FPGAs # that are connected to the OCB. # # This file does not include the nets of the logic that manages # the On-Card-Bus. # # The following components are referenced in this file: # # # U352 74 LVT 16245B Date 15:0 to/from backplane # U355 74 AVCAH 164245 Data 15:0 2.5V to/from 3.3V translation # # U353 74 LVC 16373A Adrs 23:17, Control Signals, Geo-Adrs # Receive from the VME backplane # U356 74 AVCAH 164245 Adrs 23:17, Control Signals, Geo-Adrs # 3.3V to 2.5V translation # # U354 74 LVC 16373A Adrs 16:1 receive from the VME backplane # U357 74 AVCAH 164245 Adrs 16:1 3.3V to 2.5V translation # # U358 74 LVC 38A Drive DTACK_B onto the VME Bus # Two sections used to drive VME DTACK_B # # R351:R357 pull-up resistors for the Geographic Address lines 0:6 # # JMP1:JMP3 Jumpers to control Geographic Address lines 1,2,3 # # C401, .... 47 nFd Bypass capacitors # ...., C428 100 nFd Bypass capacitors # # Data Bus connections OCB to/from backplane VME # ------------------------------------------------- # # Notes about running this Data Bus connection: # # Transceivers: # The 74LVT16245B are connected Side "A" is the On-Card-Bus # Side "B" is towards the VME backplane. # # Translators: # On the 74AVCAH164245 recall that all 4 control pins are # referenced to its Vcca power pin. We want these control # lines to be 2.5V signals thus Vcca is 2.5V and Vccb is 3.3V # So the 74AVCAH164245 Side "A" is the On-Card-Bus and its # Side "B" is towards the VME backplane. # # # For VME READ (CMX card sends out data) # # 74LVT16245B receives data on "A" sends out data on "B" # DIR pin (pins #1 and #24) must be HI # OE_B pin (pins #25 and #48) must be LOW # # 74AVCAH164245 receives data on "A" sends out data on "B" # DIR pins (pins #1 and #24) must be HI # OE_B pins (pins #25 and #48) must be LOW # # For VME WRITE (CMX card receives data) # # 74LVT16245B receives data on "B" sends out data on "A" # DIR pin (pins #1 and #24) must be LOW # OE_B pin (pins #25 and #48) must be LOW # # 74AVCAH164245 receives data on "B" sends out data on "A" # DIR pins (pins #1 and #24) must be LOW # OE_B pins (pins #25 and #48) must be LOW # # When a given CMX card is not participating in a VME # cycles then the control pins will be: # # 74LVT16245B # DIR pin (pins #1 and #24) must be ?? # OE_B pin (pins #25 and #48) must be HI --> Disable the outputs # # 74AVCAH164245 # DIR pins (pin #1 and #24) must be ?? # OE_B pins (pin #25 and #48) must be HI ?? # # Recall that the DIR and OE_B pins on the 74LVT16245B # are 3.3V CMOS inputs. # # VME Data Bus Transceiver Control Pins (3.3V control inputs): NET 'VME_D_BUS_TRNCVR_DIR' U352-1 U352-24 # VME Data Transceiver # Direction NET 'VME_D_BUS_TRNCVR_OE_B' U352-48 U352-25 # VME Data Transceiver # Output-Enable_B # Note that VME_D_BUS_TRNCVR_OE_B comes from U366 in the # Harwired Oversight Logic. This signal starts as # BSPT_VME_D_BUS_TRNCVR_OE_B from the Board Support FPGA. # VME Data Bus Translator Control Pins (2.5V control inputs): NET 'OCB_D_BUS_TRNSLT_DIR' U355-1 U355-24 # VME Data Translator # Direction NET 'OCB_D_BUS_TRNSLT_OE_B' U355-48 U355-25 # VME Data Translator # Output-Enable_B # VME and OCB Data Bus Lines Transceivers and Translators: NET 'VME_D00' U352-23 # Data 00 backplane connection NET 'TRN32_D00' U352-26 U355-23 # Data 00 VME I/F <--> Translator NET 'OCB_D00' U355-26 # Data 00 On_Card_Bus NET 'VME_D01' U352-19 # Data 01 backplane connection NET 'TRN32_D01' U352-30 U355-22 # Data 01 VME I/F <--> Translator NET 'OCB_D01' U355-27 # Data 01 On_Card_Bus NET 'VME_D02' U352-17 # Data 02 backplane connection NET 'TRN32_D02' U352-32 U355-20 # Data 02 VME I/F <--> Translator NET 'OCB_D02' U355-29 # Data 02 On_Card_Bus NET 'VME_D03' U352-13 # Data 03 backplane connection NET 'TRN32_D03' U352-36 U355-19 # Data 03 VME I/F <--> Translator NET 'OCB_D03' U355-30 # Data 03 On_Card_Bus NET 'VME_D04' U352-9 # Data 04 backplane connection NET 'TRN32_D04' U352-40 U355-17 # Data 04 VME I/F <--> Translator NET 'OCB_D04' U355-32 # Data 04 On_Card_Bus NET 'VME_D05' U352-8 # Data 05 backplane connection NET 'TRN32_D05' U352-41 U355-16 # Data 05 VME I/F <--> Translator NET 'OCB_D05' U355-33 # Data 05 On_Card_Bus NET 'VME_D06' U352-3 # Data 06 backplane connection NET 'TRN32_D06' U352-46 U355-14 # Data 06 VME I/F <--> Translator NET 'OCB_D06' U355-35 # Data 06 On_Card_Bus NET 'VME_D07' U352-2 # Data 07 backplane connection NET 'TRN32_D07' U352-47 U355-13 # Data 07 VME I/F <--> Translator NET 'OCB_D07' U355-36 # Data 07 On_Card_Bus NET 'VME_D08' U352-22 # Data 08 backplane connection NET 'TRN32_D08' U352-27 U355-12 # Data 08 VME I/F <--> Translator NET 'OCB_D08' U355-37 # Data 08 On_Card_Bus NET 'VME_D09' U352-20 # Data 09 backplane connection NET 'TRN32_D09' U352-29 U355-11 # Data 09 VME I/F <--> Translator NET 'OCB_D09' U355-38 # Data 09 On_Card_Bus NET 'VME_D10' U352-16 # Data 10 backplane connection NET 'TRN32_D10' U352-33 U355-9 # Data 10 VME I/F <--> Translator NET 'OCB_D10' U355-40 # Data 10 On_Card_Bus NET 'VME_D11' U352-14 # Data 11 backplane connection NET 'TRN32_D11' U352-35 U355-8 # Data 11 VME I/F <--> Translator NET 'OCB_D11' U355-41 # Data 11 On_Card_Bus NET 'VME_D12' U352-12 # Data 12 backplane connection NET 'TRN32_D12' U352-37 U355-6 # Data 12 VME I/F <--> Translator NET 'OCB_D12' U355-43 # Data 12 On_Card_Bus NET 'VME_D13' U352-11 # Data 13 backplane connection NET 'TRN32_D13' U352-38 U355-5 # Data 13 VME I/F <--> Translator NET 'OCB_D13' U355-44 # Data 13 On_Card_Bus NET 'VME_D14' U352-6 # Data 14 backplane connection NET 'TRN32_D14' U352-43 U355-3 # Data 14 VME I/F <--> Translator NET 'OCB_D14' U355-46 # Data 14 On_Card_Bus NET 'VME_D15' U352-5 # Data 15 backplane connection NET 'TRN32_D15' U352-44 U355-2 # Data 15 VME I/F <--> Translator NET 'OCB_D15' U355-47 # Data 15 On_Card_Bus # Address Bus connections VME Address to the OCB # ------------------------------------------------ # # Notes about the Address Bus connection: # # The 23 Address lines are received by (and optionally latched by) # type 74 LVC 16373A chips. These run on 3.3V power and can work # with the 5V VME bus signals. # # The 23 Address lines are then translated to 2.5V CMOS signals # by type 74 AVCAH 164245 translators. # # # The 74LVC16373A are connected Side "A" is the On-Card-Bus # Side "B" is towards the VME backplane. # # The 74AVCAH164245 Side "A" is the On-Card-Bus # Side "B" is towards the VME backplane. # # # These Address lines are received by 74LVC16373A # # The output pins on the 74LVC16373A must always be enabled # so its OE_B pins, i.e. pins #1 and #24, are held Low. # # The latching function in the 74LVC16373A must either be # held transparent by keeping its LE pins, i.e. pins #25 # and #48, held HI or these LE pins must be controled by # logic on the CMX card, e.g. in the Board Support FPGA. # Recall that the LE pins are 3.3V CMOS inputs. # # These Address lines must always be driven towards the On-Card-Bus # so the 74AVCAH164245 must be setup # # The output pins of the 74AVCAH164245 must always be enabled, # so the OE_B pins, i.e. pins #25 and #48, are held Low. # # The direction of the 74AVCAH164245 must always be towards # the OCB, i.e. from B to A, so the DIR pins, pins #1 and #24, # are held Low. # # # Recall that the LE and OE_B pins on the 74LVC16373A # receiver latch are 3.3V CMOS inputs. # # VME Address Receiver-Latch Control Pins (3.3V control inputs): NET 'VME_ADRS_RECVR_LE' U353-25 U354-48 U354-25 # VME Address Receiver # Latch_Enable NET 'VME_ADRS_AND_CTRL_RECVR_OE_B' U353-24 U354-1 U354-24 # VME Address Receiver # Output-Enable_B # VME Address Bus Translator Control Pins (2.5V control inputs): NET 'OCB_ADRS_AND_CTRL_TRNSLT_DIR' U356-24 U357-1 U357-24 # VME Address Translator # Direction NET 'OCB_ADRS_AND_CTRL_TRNSLT_OE_B' U356-25 U357-48 U357-25 # VME Address Translator # Output-Enable_B # Note that OCB_ADRS_AND_CTRL_TRNSLT_OE_B comes from U366 # in the Harwired Oversight Logic. This signal starts as # BSPT_OCB_ADRS_AND_CTRL_TRNSLT_OE_B from the Board Support FPGA. # VME Address Bus Receiver-Latch and Translator NET 'VME_A23' U353-23 # Adrs 23 backplane connection NET 'TRN32_A23' U353-26 U356-23 # Adrs 23 VME I/F --> Translator NET 'OCB_A23' U356-26 # Adrs 23 On_Card_Bus NET 'VME_A22' U353-22 # Adrs 22 backplane connection NET 'TRN32_A22' U353-27 U356-22 # Adrs 22 VME I/F --> Translator NET 'OCB_A22' U356-27 # Adrs 22 On_Card_Bus NET 'VME_A21' U353-20 # Adrs 21 backplane connection NET 'TRN32_A21' U353-29 U356-20 # Adrs 21 VME I/F --> Translator NET 'OCB_A21' U356-29 # Adrs 21 On_Card_Bus NET 'VME_A20' U353-19 # Adrs 20 backplane connection NET 'TRN32_A20' U353-30 U356-19 # Adrs 20 VME I/F --> Translator NET 'OCB_A20' U356-30 # Adrs 20 On_Card_Bus NET 'VME_A19' U353-17 # Adrs 19 backplane connection NET 'TRN32_A19' U353-32 U356-17 # Adrs 19 VME I/F --> Translator NET 'OCB_A19' U356-32 # Adrs 19 On_Card_Bus NET 'VME_A18' U353-16 # Adrs 18 backplane connection NET 'TRN32_A18' U353-33 U356-16 # Adrs 18 VME I/F --> Translator NET 'OCB_A18' U356-33 # Adrs 18 On_Card_Bus NET 'VME_A17' U353-14 # Adrs 17 backplane connection NET 'TRN32_A17' U353-35 U356-14 # Adrs 17 VME I/F --> Translator NET 'OCB_A17' U356-35 # Adrs 17 On_Card_Bus NET 'VME_A16' U354-23 # Adrs 16 backplane connection NET 'TRN32_A16' U354-26 U357-23 # Adrs 16 VME I/F --> Translator NET 'OCB_A16' U357-26 # Adrs 16 On_Card_Bus NET 'VME_A15' U354-22 # Adrs 15 backplane connection NET 'TRN32_A15' U354-27 U357-22 # Adrs 15 VME I/F --> Translator NET 'OCB_A15' U357-27 # Adrs 15 On_Card_Bus NET 'VME_A14' U354-20 # Adrs 14 backplane connection NET 'TRN32_A14' U354-29 U357-20 # Adrs 14 VME I/F --> Translator NET 'OCB_A14' U357-29 # Adrs 14 On_Card_Bus NET 'VME_A13' U354-16 # Adrs 13 backplane connection NET 'TRN32_A13' U354-33 U357-19 # Adrs 13 VME I/F --> Translator NET 'OCB_A13' U357-30 # Adrs 13 On_Card_Bus NET 'VME_A12' U354-14 # Adrs 12 backplane connection NET 'TRN32_A12' U354-35 U357-17 # Adrs 12 VME I/F --> Translator NET 'OCB_A12' U357-32 # Adrs 12 On_Card_Bus NET 'VME_A11' U354-12 # Adrs 11 backplane connection NET 'TRN32_A11' U354-37 U357-16 # Adrs 11 VME I/F --> Translator NET 'OCB_A11' U357-33 # Adrs 11 On_Card_Bus NET 'VME_A10' U354-11 # Adrs 10 backplane connection NET 'TRN32_A10' U354-38 U357-14 # Adrs 10 VME I/F --> Translator NET 'OCB_A10' U357-35 # Adrs 10 On_Card_Bus NET 'VME_A09' U354-6 # Adrs 09 backplane connection NET 'TRN32_A09' U354-43 U357-13 # Adrs 09 VME I/F --> Translator NET 'OCB_A09' U357-36 # Adrs 09 On_Card_Bus NET 'VME_A08' U354-5 # Adrs 08 backplane connection NET 'TRN32_A08' U354-44 U357-12 # Adrs 08 VME I/F --> Translator NET 'OCB_A08' U357-37 # Adrs 08 On_Card_Bus NET 'VME_A07' U354-17 # Adrs 07 backplane connection NET 'TRN32_A07' U354-32 U357-11 # Adrs 07 VME I/F --> Translator NET 'OCB_A07' U357-38 # Adrs 07 On_Card_Bus NET 'VME_A06' U354-19 # Adrs 06 backplane connection NET 'TRN32_A06' U354-30 U357-9 # Adrs 06 VME I/F --> Translator NET 'OCB_A06' U357-40 # Adrs 06 On_Card_Bus NET 'VME_A05' U354-13 # Adrs 05 backplane connection NET 'TRN32_A05' U354-36 U357-8 # Adrs 05 VME I/F --> Translator NET 'OCB_A05' U357-41 # Adrs 05 On_Card_Bus NET 'VME_A04' U354-8 # Adrs 04 backplane connection NET 'TRN32_A04' U354-41 U357-6 # Adrs 04 VME I/F --> Translator NET 'OCB_A04' U357-43 # Adrs 04 On_Card_Bus NET 'VME_A03' U354-9 # Adrs 03 backplane connection NET 'TRN32_A03' U354-40 U357-5 # Adrs 03 VME I/F --> Translator NET 'OCB_A03' U357-44 # Adrs 03 On_Card_Bus NET 'VME_A02' U354-3 # Adrs 02 backplane connection NET 'TRN32_A02' U354-46 U357-3 # Adrs 02 VME I/F --> Translator NET 'OCB_A02' U357-46 # Adrs 02 On_Card_Bus NET 'VME_A01' U354-2 # Adrs 01 backplane connection NET 'TRN32_A01' U354-47 U357-2 # Adrs 01 VME I/F --> Translator NET 'OCB_A01' U357-47 # Adrs 01 On_Card_Bus # Control Signals and Geographic Address VME Bus to the OCB # ----------------------------------------------------------- # # Notes about the Control Signals and Geographic Address lines # from the Backplane VME-- Bus # # The following Control Signals and Geographic Address # lines are received by one half of a 74 LVC 16373A # # The output pins on this half of the 74LVC16373A # must always be enabled so its OE_B pin, i.e. pin #1, # is held Low. # # This half of the 74LVC16373A must always be # transparent so its LE pin, i.e. pin #48, is held HI. # Recall that the LE pins are 3.3V CMOS inputs. # # These Control Signals and Goegraphic Address lines # must always be driven towards the On-Card-Bus so # the 74 AVCAH 164245 must be setup # # The output pins on this half of the 74AVCAH164245 # must always be enabled, so the OE_B pin, i.e. pin #48, # is held Low. # # The direction of this half of the 74AVCAH164245 # must always be towards the OCB, i.e. from B to A, # so the DIR pin, pin #1, is held Low # # # Recall that the LE and OE_B pins on the 74LVC16373A # receiver latch are 3.3V CMOS inputs. # # Unused sections in U353 74LVC16373A: 12-->37 and 13-->36 # Unused sections in U356 74AVCAH164245: 12-->37 and 13-->36 # # Note that there are Pull-Up resistors on the Geographic Address lines. # # VME Control & Geo_Adrs Signal Receiver-Latch Control Pins (3.3V control inputs): NET 'VME_CTRL_RECVR_LE' U353-48 # VME Control Signal Receiver # Latch_Enable NET 'VME_ADRS_AND_CTRL_RECVR_OE_B' U353-1 # VME Control Signal Receiver # Output-Enable_B # VME Control & Geo_Adrs Signal Translator Control Pins (2.5V control inputs): NET 'OCB_ADRS_AND_CTRL_TRNSLT_DIR' U356-1 # VME Control Signal Translator # Direction NET 'OCB_ADRS_AND_CTRL_TRNSLT_OE_B' U356-48 # VME Control Signal Translator # Output-Enable_B # Note that OCB_ADRS_AND_CTRL_TRNSLT_OE_B comes from U366 # in the Harwired Oversight Logic. This signal starts as # BSPT_OCB_ADRS_AND_CTRL_TRNSLT_OE_B from the Board Support FPGA. # VME Control Signal Receiver-Latch and Translator NET 'VME_DS_B' U353-11 # DS_B backplane connection NET 'TRN32_DS_B' U353-38 U356-11 # DS_B VME I/F --> Translator NET 'OCB_DS_B' U356-38 # OCB_DS_B to the OCB NET 'VME_WRITE_B' U353-9 # WRITE_B backplane connection NET 'TRN32_WRITE_B' U353-40 U356-9 # WRITE_B VME I/F --> Translator NET 'OCB_WRITE_B' U356-40 # OCB_WRITE_B to the OCB NET 'VME_SYS_RESET_B' U353-8 # SYS_RESET_B backplane connection NET 'TRN32_SYS_RESET_B' U353-41 U356-8 # SYS_RESET_B VME I/F --> Translator NET 'OCB_SYS_RESET_B' U356-41 # OCB_SYS_RESET_B to the OCB # VME Geographic Address Receiver-Latch and Translator NET 'VME_GEO_ADRS_4' U353-6 # GEO_ADRS_4 backplane connection NET 'TRN32_GEO_ADRS_4' U353-43 U356-5 # GEO_ADRS_4 VME I/F --> Translator NET 'OCB_GEO_ADRS_4' U356-44 # OCB_GEO_ADRS_4 to the OCB NET 'VME_GEO_ADRS_5' U353-5 # GEO_ADRS_5 backplane connection NET 'TRN32_GEO_ADRS_5' U353-44 U356-3 # GEO_ADRS_5 VME I/F --> Translator NET 'OCB_GEO_ADRS_5' U356-46 # OCB_GEO_ADRS_5 to the OCB NET 'VME_GEO_ADRS_6' U353-3 # GEO_ADRS_6 backplane connection NET 'TRN32_GEO_ADRS_6' U353-46 U356-2 # GEO_ADRS_6 VME I/F --> Translator NET 'OCB_GEO_ADRS_6' U356-47 # OCB_GEO_ADRS_6 to the OCB NET 'VME_GEO_ADRS_0' U353-2 # GEO_ADRS_0 backplane connection NET 'TRN32_GEO_ADRS_0' U353-47 U356-6 # GEO_ADRS_0 VME I/F --> Translator NET 'OCB_GEO_ADRS_0' U356-43 # OCB_GEO_ADRS_0 to the OCB # Pull-Up Resistors on the 4 Geographic Address Lines. # Pull these lines up to 3.3V with 10k Ohm. NET 'VME_GEO_ADRS_0' R351-1 # GEO_ADRS_0 pull up NET 'VME_GEO_ADRS_4' R354-1 # GEO_ADRS_0 pull up NET 'VME_GEO_ADRS_5' R353-1 # GEO_ADRS_0 pull up NET 'VME_GEO_ADRS_6' R352-1 # GEO_ADRS_0 pull up NET 'BULK_3V3' R351-2 R353-2 # Pull-Up to 3.3 Volts NET 'BULK_3V3' R352-2 R354-2 # Pull-Up to 3.3 Volts # Control Signal from the OCB to the VME Bus # -------------------------------------------- # # Notes about DTACK_B the one Control Signal that flows # from the On_Card_Bus to the VME Bus. # # The VME_DTACK_B signal comes from a 3.3V output pin # on the Board Support FPGA that has the net name: # BSPT_SEND_VME_DTACK_B # # U358 a 74LVC38A open drain driver puts the # VME_DTACK_B signal onto the VME Bus. # # Note that the VME_DTACK_B signal is qualified by # Hardwired Oversight Logic signal ALLOW_BUSSED_IO # before DTACK_B goes to the VME Bus. # # This gating of DTACK_B is included in the Hardwired # Oversight Logic net list section. # # Note that U358 the 74LVC38A is powered by 3.3 Volts. # # Note that both the original 4,5,6 section of U358 # and now the 1,2,3 section are used to drive the # VME DTACK_B signal onto the backplane bus. NET 'VME_DTACK_B' U358-3 # VME_DTACK_B to the VME Bus. NET 'VME_DTACK_B' U358-6 # VME_DTACK_B to the VME Bus. # Geographic Address Lines 1,2,3: # -------------------------------- # # 4 of the 7 Geographic Address lines come from the backplane. # The backplane Geographic Address lines are 0,4,5,6. The reception # of these nets from the backplane was described above. # # The remaining 3 Geographic Address lines 1,2,3 are set by # jumpers JMP1 through JMP3 on the CMX card. The nets for # these 3 Geographic Address lines are defined here because # they are part of the On-Card-Bus. The jumpers JMP1:JMP3 # allow you to either ground or pull up to 2.5V any combination # of Geographic Address lines 1,2,3. # # Geographic Address 1 Install JMP1 to pull Low. NET 'OCB_GEO_ADRS_1' R355-2 JMP1-2 # OCB_GEO_ADRS_1 NET 'BULK_2V5' R355-1 # Geo Adrs 1 pull-up 2.5V NET 'GROUND' JMP1-1 # Geo Adrs 1 Ground connection # Geographic Address 2 Install JMP2 to pull Low. NET 'OCB_GEO_ADRS_2' R356-2 JMP2-2 # OCB_GEO_ADRS_2 NET 'BULK_2V5' R356-1 # Geo Adrs 2 pull-up 2.5V NET 'GROUND' JMP2-1 # Geo Adrs 2 Ground connection # Geographic Address 3 Install JMP3 to pull Low. NET 'OCB_GEO_ADRS_3' R357-2 JMP3-2 # OCB_GEO_ADRS_3 NET 'BULK_2V5' R357-1 # Geo Adrs 3 pull-up 2.5V NET 'GROUND' JMP3-1 # Geo Adrs 3 Ground connection # Power Connections and ByPass Capacitor Connections for the VME I/F # Power and ByPass for U352 74LVT16245B all power is BULK_3V3 NET 'BULK_3V3' U352-7 U352-18 # U352 3.3V power connections NET 'BULK_3V3' U352-31 U352-42 # U352 3.3V power connections NET 'GROUND' U352-4 U352-10 # U352 Ground connections NET 'GROUND' U352-15 U352-21 # U352 Ground connections NET 'GROUND' U352-28 U352-34 # U352 Ground connections NET 'GROUND' U352-39 U352-45 # U352 Ground connections NET 'BULK_3V3' C401-2 C402-1 # ByPass Cap 3.3V power connections NET 'BULK_3V3' C403-1 C404-2 # ByPass Cap 3.3V power connections NET 'GROUND' C401-1 C402-2 # ByPass Cap Ground connections NET 'GROUND' C403-2 C404-1 # ByPass Cap Ground connections # Power and ByPass for U353 74LVC16373A all power is BULK_3V3 NET 'BULK_3V3' U353-7 U353-18 # U353 3.3V power connections NET 'BULK_3V3' U353-31 U353-42 # U353 3.3V power connections NET 'GROUND' U353-4 U353-10 # U353 Ground connections NET 'GROUND' U353-15 U353-21 # U353 Ground connections NET 'GROUND' U353-28 U353-34 # U353 Ground connections NET 'GROUND' U353-39 U353-45 # U353 Ground connections NET 'BULK_3V3' C405-2 C406-1 # ByPass Cap 3.3V power connections NET 'BULK_3V3' C407-1 C408-2 # ByPass Cap 3.3V power connections NET 'GROUND' C405-1 C406-2 # ByPass Cap Ground connections NET 'GROUND' C407-2 C408-1 # ByPass Cap Ground connections # Power and ByPass for U354 74LVC16373A all power is BULK_3V3 NET 'BULK_3V3' U354-7 U354-18 # U354 3.3V power connections NET 'BULK_3V3' U354-31 U354-42 # U354 3.3V power connections NET 'GROUND' U354-4 U354-10 # U354 Ground connections NET 'GROUND' U354-15 U354-21 # U354 Ground connections NET 'GROUND' U354-28 U354-34 # U354 Ground connections NET 'GROUND' U354-39 U354-45 # U354 Ground connections NET 'BULK_3V3' C409-2 C410-1 # ByPass Cap 3.3V power connections NET 'BULK_3V3' C411-1 C412-2 # ByPass Cap 3.3V power connections NET 'GROUND' C409-1 C410-2 # ByPass Cap Ground connections NET 'GROUND' C411-2 C412-1 # ByPass Cap Ground connections # Power and ByPass for U355 74AVCAH164245 power is BULK_2V5 and BULK_3V3 NET 'BULK_3V3' U355-7 U355-18 # U355 3.3V Vccb power NET 'BULK_2V5' U355-31 U355-42 # U355 2.5V Vcca power NET 'GROUND' U355-4 U355-10 # U355 Ground connections NET 'GROUND' U355-15 U355-21 # U355 Ground connections NET 'GROUND' U355-28 U355-34 # U355 Ground connections NET 'GROUND' U355-39 U355-45 # U355 Ground connections NET 'BULK_3V3' C414-1 C415-1 # ByPass Cap 3.3V Vccb power NET 'BULK_2V5' C413-2 C416-2 # ByPass Cap 2.5V Vcca power NET 'GROUND' C414-2 C415-2 # ByPass Cap Ground connections NET 'GROUND' C413-1 C416-1 # ByPass Cap Ground connections # Power and ByPass for U356 74AVCAH164245 power is BULK_2V5 and BULK_3V3 NET 'BULK_3V3' U356-7 U356-18 # U356 3.3V Vccb power NET 'BULK_2V5' U356-31 U356-42 # U356 2.5V Vcca power NET 'GROUND' U356-4 U356-10 # U356 Ground connections NET 'GROUND' U356-15 U356-21 # U356 Ground connections NET 'GROUND' U356-28 U356-34 # U356 Ground connections NET 'GROUND' U356-39 U356-45 # U356 Ground connections NET 'BULK_3V3' C418-1 C419-1 # ByPass Cap 3.3V Vccb power NET 'BULK_2V5' C417-2 C420-2 # ByPass Cap 2.5V Vcca power NET 'GROUND' C418-2 C419-2 # ByPass Cap Ground connections NET 'GROUND' C417-1 C420-1 # ByPass Cap Ground connections # Power and ByPass for U357 74AVCAH164245 power is BULK_2V5 and BULK_3V3 NET 'BULK_3V3' U357-7 U357-18 # U357 3.3V Vccb power NET 'BULK_2V5' U357-31 U357-42 # U357 2.5V Vcca power NET 'GROUND' U357-4 U357-10 # U357 Ground connections NET 'GROUND' U357-15 U357-21 # U357 Ground connections NET 'GROUND' U357-28 U357-34 # U357 Ground connections NET 'GROUND' U357-39 U357-45 # U357 Ground connections NET 'BULK_3V3' C422-1 C423-1 # ByPass Cap 3.3V Vccb power NET 'BULK_2V5' C421-2 C424-2 # ByPass Cap 2.5V Vcca power NET 'GROUND' C422-2 C423-2 # ByPass Cap Ground connections NET 'GROUND' C421-1 C424-1 # ByPass Cap Ground connections # Power and ByPass for U358 74F38 # is included in the Hardwired Oversight Logic # nets file. U358 is both part of the VME IF # and is part of the Hardwired Oversight Logic.