si5338 programming / register data

In order to program the PLL parameters such as feedback gain, we must use the Windows Clockbuilder application from Silicon Labs, which is available here: https://www.silabs.com/products/development-tools/software/clockbuilder-pro-software

This software generates a hex file which, after some text processing, we can write directly to the si5338 chip over I2C from the PL region of the Zynq FPGA.


The si5338 chip also has a number of registers which we will want to monitor.  

### Output Driver Enable / Disable ###
Address[bits] Data
230[7:0]  [0 0 0 OEB_all OEB_3 OEB_2 OEB_1 OEB_0]

0 indicates the output is enabled

### Output Clock Invert ###
Address[bits] Data
36[7:0] [X X X DRV0_INV[1:0] X X X]
37[7:0] [X X X DRV1_INV[1:0] X X X]
38[7:0] [X X X DRV2_INV[1:0] X X X]
39[7:0] [X X X DRV3_INV[1:0] X X X]

No inversion: 00
Invert A side (CMOS/SSTL/HSTL only): 01
Invert B side (CMOS/SSTL/HSTL only): 10
Invert both A and B sides: 11

Note: 00 and 11 are the only valid states for our application

### Loss of lock / feedback / clock in ###
Address[bits] Data
218[7:0] [X X X PLL_LOL LOS_FDBK LOSCLKIN X SYS_CAL]

PLL_LOL: Asserts when the two PFD inputs have a frequency difference > 1000 ppm.  Held high during a POR_reset until the PLL has locked.  Does not assert when the external input clock is lost
LOS_FDBK: Loss of signal on feedback clock from IN5,6, or IN4
LOS_CLKIN: Loss of signal on Input Clock from IN1,2 or IN3
SYS_CAL: Device calibration in process

### Loss of lock / feedback / clock in sticky bits ###
247[7:0] [X X X PLL_LOL_STK LOS_FDBK_STK LOS_CLKIN_STK X SYS_CAL_STK]

PLL_LOL_STK: Sticky version of PLL_LOL.  Only a soft or POR reset of writing a 0 to this bit will clear it.
LOS_FDBK_STK: Sticky version of LOS_FDBK. Only a soft or POR reset of writing a 0 to this bit will clear it.
LOS_CLKIN_STK: Sticky version of LOS_CLKIN_STK. Only a soft or POR reset of writing a 0 to this bit will clear it.
SYS_CAL_STK: Sticky version of SYS_CAL. Only a soft or POR reset of writing a 0 to this bit will clear it.