Found 172 pins for J2 which is of type Samtec_ASP-122953-01-J2 ------------------------------------------------------ Pins sorted by Pin Name 1 = No_Conn_J2_NC_Pin_1 NC | from line 175 of fpga_mezz_no_conn_nets 2 = No_Conn_J2_TEMP_DCDC1 TEMP_DCDC1 | from line 260 of fpga_mezz_no_conn_nets 3 = No_Conn_J2_NC_Pin_3 NC | from line 176 of fpga_mezz_no_conn_nets 4 = No_Conn_J2_TEMP_DCDC2 TEMP_DCDC2 | from line 261 of fpga_mezz_no_conn_nets 5 = No_Conn_J2_NC_Pin_5 NC | from line 177 of fpga_mezz_no_conn_nets 6 = No_Conn_J2_TEMP_PCB TEMP_PCB | from line 263 of fpga_mezz_no_conn_nets 7 = No_Conn_J2_NC_Pin_7 NC | from line 178 of fpga_mezz_no_conn_nets 8 = No_Conn_J2_TEMP_ZYNQ TEMP_ZYNQ | from line 265 of fpga_mezz_no_conn_nets 9 = PHY_1_TRD3_6_CMP PHY1_MDI3_N | from line 108 of enet_j14_trans1_fpga_mezz_nets 10 = No_Conn_J2_TEMP_GPI00 CPLD_GPIO0 | from line 267 of fpga_mezz_no_conn_nets 11 = PHY_1_TRD3_6_DIR PHY1_MDI3_P | from line 107 of enet_j14_trans1_fpga_mezz_nets 12 = No_Conn_J2_TEMP_GPI01 CPLD_GPIO1 | from line 268 of fpga_mezz_no_conn_nets 13 = PHY_1_TRD2_6_CMP PHY1_MDI2_N | from line 105 of enet_j14_trans1_fpga_mezz_nets 14 = No_Conn_J2_TEMP_GPI02 CPLD_GPIO2 | from line 269 of fpga_mezz_no_conn_nets 15 = PHY_1_TRD2_6_DIR PHY1_MDI2_P | from line 104 of enet_j14_trans1_fpga_mezz_nets 16 = LB_CPLD_GPIO_3 CPLD_GPIO3 | from line 67 of htm_life_boat_nets 17 = PHY_1_TRD1_6_CMP PHY1_MDI1_N | from line 102 of enet_j14_trans1_fpga_mezz_nets 18 = LB_CPLD_GPIO_4 CPLD_GPIO4 | from line 73 of htm_life_boat_nets 19 = PHY_1_TRD1_6_DIR PHY1_MDI1_P | from line 101 of enet_j14_trans1_fpga_mezz_nets 20 = LB_CPLD_GPIO_5 CPLD_GPIO5 | from line 79 of htm_life_boat_nets 21 = PHY_1_TRD0_6_CMP PHY1_MDI0_N | from line 99 of enet_j14_trans1_fpga_mezz_nets 22 = No_Conn_J2_OTG2_ID OTG2_ID | from line 273 of fpga_mezz_no_conn_nets 23 = PHY_1_TRD0_6_DIR PHY1_MDI0_P | from line 98 of enet_j14_trans1_fpga_mezz_nets 24 = No_Conn_J2_USB2_VBUS USB2_VBUS | from line 275 of fpga_mezz_no_conn_nets 25 = PHY_2_TRD3_6_CMP PHY2_MDI3_N | from line 147 of enet_j14_trans1_fpga_mezz_nets 26 = No_Conn_J2_USB2_D_N USB2_D_N | from line 276 of fpga_mezz_no_conn_nets 27 = PHY_2_TRD3_6_DIR PHY2_MDI3_P | from line 146 of enet_j14_trans1_fpga_mezz_nets 28 = No_Conn_J2_USB2_D_P USB2_D_P | from line 277 of fpga_mezz_no_conn_nets 29 = PHY_2_TRD2_6_CMP PHY2_MDI2_N | from line 144 of enet_j14_trans1_fpga_mezz_nets 30 = No_Conn_J2_VBUS2_V_EN VBUS2_V_EN | from line 279 of fpga_mezz_no_conn_nets 31 = PHY_2_TRD2_6_DIR PHY2_MDI2_P | from line 143 of enet_j14_trans1_fpga_mezz_nets 32 = No_Conn_J2_VBUS1_V_EN VBUS1_V_EN | from line 280 of fpga_mezz_no_conn_nets 33 = PHY_2_TRD1_6_CMP PHY2_MDI1_N | from line 141 of enet_j14_trans1_fpga_mezz_nets 34 = No_Conn_J2_OTG1_ID OTG1_ID | from line 282 of fpga_mezz_no_conn_nets 35 = PHY_2_TRD1_6_DIR PHY2_MDI1_P | from line 140 of enet_j14_trans1_fpga_mezz_nets 36 = No_Conn_J2_USB1_VBUS USB1_VBUS | from line 284 of fpga_mezz_no_conn_nets 37 = PHY_2_TRD0_6_CMP PHY2_MDI0_N | from line 138 of enet_j14_trans1_fpga_mezz_nets 38 = No_Conn_J2_USB1_D_N USB1_D_N | from line 285 of fpga_mezz_no_conn_nets 39 = PHY_2_TRD0_6_DIR PHY2_MDI0_P | from line 137 of enet_j14_trans1_fpga_mezz_nets 40 = No_Conn_J2_USB1_D_P USB1_D_P | from line 286 of fpga_mezz_no_conn_nets 41 = No_Conn_N29_J2_TX0_P J2_TX0_P | N29 from line 180 of fpga_mezz_no_conn_nets 42 = No_Conn_P25_J2_RX0_P J2_RX0_P | P25 from line 291 of fpga_mezz_no_conn_nets 43 = No_Conn_P29_J2_TX0_N J2_TX0_N | P29 from line 181 of fpga_mezz_no_conn_nets 44 = No_Conn_P26_J2_RX0_N J2_RX0_N | P26 from line 292 of fpga_mezz_no_conn_nets 45 = GROUND GND | from line 48 of fpga_j2_power_and_ground_nets 46 = GROUND GND | from line 51 of fpga_j2_power_and_ground_nets 47 = No_Conn_U22_J2_TX1_P J2_TX1_P | U22 from line 183 of fpga_mezz_no_conn_nets 48 = J2_RX1_P_U202_LED_Driver_Control_Input_14 J2_RX1_P | N26 from line 103 of led_all_signals_power_gnd_nets 49 = No_Conn_V22_J2_TX1_N J2_TX1_N | V22 from line 184 of fpga_mezz_no_conn_nets 50 = No_Conn_N27_J2_RX1_N J2_RX1_N | N27 from line 294 of fpga_mezz_no_conn_nets 51 = No_Conn_J2_NC_Pin_51 NC | from line 186 of fpga_mezz_no_conn_nets 52 = GROUND GND | from line 51 of fpga_j2_power_and_ground_nets 53 = Hub_2_Ref_Mon_to_FPGA J2_TX2_P | P30 from line 237 of clock_generation_nets 54 = J2_RX2_P_U202_LED_Driver_Control_Input_15 J2_RX2_P | N28 from line 104 of led_all_signals_power_gnd_nets 55 = No_Conn_R30_J2_TX2_N J2_TX2_N | R30 from line 189 of fpga_mezz_no_conn_nets 56 = No_Conn_P28_J2_RX2_N J2_RX2_N | P28 from line 296 of fpga_mezz_no_conn_nets 57 = No_Conn_J2_NC_Pin_57 NC | from line 191 of fpga_mezz_no_conn_nets 58 = GROUND GND | from line 51 of fpga_j2_power_and_ground_nets 59 = No_Conn_V23_J2_TX3_P J2_TX3_P | V23 from line 193 of fpga_mezz_no_conn_nets 60 = J2_RX3_P_U202_LED_Driver_Control_Input_16 J2_RX3_P | P23 from line 105 of led_all_signals_power_gnd_nets 61 = No_Conn_W24_J2_TX3_N J2_TX3_N | W24 from line 194 of fpga_mezz_no_conn_nets 62 = No_Conn_P24_J2_RX3_N J2_RX3_N | P24 from line 298 of fpga_mezz_no_conn_nets 63 = No_Conn_J2_NC_Pin_63 NC | from line 196 of fpga_mezz_no_conn_nets 64 = GROUND GND | from line 51 of fpga_j2_power_and_ground_nets 65 = No_Conn_T30_J2_TX4_P J2_TX4_P | T30 from line 198 of fpga_mezz_no_conn_nets 66 = J2_RX4_P_U202_LED_Driver_Control_Input_17 J2_RX4_P | T24 from line 106 of led_all_signals_power_gnd_nets 67 = No_Conn_U30_J2_TX4_N J2_TX4_N | U30 from line 199 of fpga_mezz_no_conn_nets 68 = No_Conn_T25_J2_RX4_N J2_RX4_N | T25 from line 300 of fpga_mezz_no_conn_nets 69 = No_Conn_J2_NC_Pin_69 NC | from line 201 of fpga_mezz_no_conn_nets 70 = GROUND GND | from line 51 of fpga_j2_power_and_ground_nets 71 = No_Conn_W25_J2_TX5_P J2_TX5_P | W25 from line 203 of fpga_mezz_no_conn_nets 72 = J2_RX5_P_U202_LED_Driver_Control_Input_18 J2_RX5_P | R22 from line 108 of led_all_signals_power_gnd_nets 73 = No_Conn_W26_J2_TX5_N J2_TX5_N | W26 from line 204 of fpga_mezz_no_conn_nets 74 = No_Conn_R23_J2_RX5_N J2_RX5_N | R23 from line 302 of fpga_mezz_no_conn_nets 75 = No_Conn_J2_NC_Pin_75 NC | from line 206 of fpga_mezz_no_conn_nets 76 = GROUND GND | from line 52 of fpga_j2_power_and_ground_nets 77 = No_Conn_V28_J2_TX6_P J2_TX6_P | V28 from line 208 of fpga_mezz_no_conn_nets 78 = J2_RX6_P_U202_LED_Driver_Control_Input_19 J2_RX6_P | U24 from line 109 of led_all_signals_power_gnd_nets 79 = No_Conn_V29_J2_TX6_N J2_TX6_N | V29 from line 209 of fpga_mezz_no_conn_nets 80 = No_Conn_V24_J2_RX6_N J2_RX6_N | V24 from line 304 of fpga_mezz_no_conn_nets 81 = No_Conn_J2_NC_Pin_81 NC | from line 211 of fpga_mezz_no_conn_nets 82 = GROUND GND | from line 52 of fpga_j2_power_and_ground_nets 83 = No_Conn_T29_J2_TX7_P J2_TX7_P | T29 from line 213 of fpga_mezz_no_conn_nets 84 = J2_RX7_P_U202_LED_Driver_Control_Input_20 J2_RX7_P | T22 from line 110 of led_all_signals_power_gnd_nets 85 = No_Conn_U29_J2_TX7_N J2_TX7_N | U29 from line 214 of fpga_mezz_no_conn_nets 86 = No_Conn_T23_J2_RX7_N J2_RX7_N | T23 from line 306 of fpga_mezz_no_conn_nets 87 = No_Conn_J2_NC_Pin_87 NC | from line 216 of fpga_mezz_no_conn_nets 88 = GROUND GND | from line 52 of fpga_j2_power_and_ground_nets 89 = No_Conn_W29_J2_TX8_P J2_TX8_P | W29 from line 218 of fpga_mezz_no_conn_nets 90 = J2_RX8_P_U202_LED_Driver_Control_Input_21 J2_RX8_P | W28 from line 111 of led_all_signals_power_gnd_nets 91 = No_Conn_W30_J2_TX8_N J2_TX8_N | W30 from line 219 of fpga_mezz_no_conn_nets 92 = No_Conn_V27_J2_RX8_N J2_RX8_N | V27 from line 308 of fpga_mezz_no_conn_nets 93 = GROUND GND | from line 48 of fpga_j2_power_and_ground_nets 94 = GROUND GND | from line 52 of fpga_j2_power_and_ground_nets 95 = No_Conn_U25_J2_TX9_P J2_TX9_P | U25 from line 221 of fpga_mezz_no_conn_nets 96 = No_Conn_U26_J2_RX9_P J2_RX9_P | U26 from line 310 of fpga_mezz_no_conn_nets 97 = No_Conn_V26_J2_TX9_N J2_TX9_N | V26 from line 222 of fpga_mezz_no_conn_nets 98 = No_Conn_U27_J2_RX9_N J2_RX9_N | U27 from line 311 of fpga_mezz_no_conn_nets 99 = Mezz_3V3 VCCIO_13 | from line 67 of fpga_vcco_nets 100 = Mezz_3V3 VCCIO_13 | from line 67 of fpga_vcco_nets 101 = No_Conn_AA27_J2_TX10_P J2_TX10_P | AA27 from line 227 of fpga_mezz_no_conn_nets 102 = No_Conn_Y26_J2_RX10_P J2_RX10_P | Y26 from line 316 of fpga_mezz_no_conn_nets 103 = No_Conn_AA28_J2_TX10_N J2_TX10_N | AA28 from line 228 of fpga_mezz_no_conn_nets 104 = No_Conn_Y27_J2_RX10_N J2_RX10_N | Y27 from line 317 of fpga_mezz_no_conn_nets 105 = GROUND GND | from line 48 of fpga_j2_power_and_ground_nets 106 = GROUND GND | from line 52 of fpga_j2_power_and_ground_nets 107 = No_Conn_AC29_J2_TX11_P J2_TX11_P | AC29 from line 230 of fpga_mezz_no_conn_nets 108 = J2_RX11_P_U201_LED_Driver_Control_Input_14 J2_RX11_P | Y28 from line 31 of led_all_signals_power_gnd_nets 109 = No_Conn_AD29_J2_TX11_N J2_TX11_N | AD29 from line 231 of fpga_mezz_no_conn_nets 110 = No_Conn_AA29_J2_RX11_N J2_RX11_N | AA29 from line 319 of fpga_mezz_no_conn_nets 111 = MEZZ_3V3 3.3V | from line 39 of fpga_j2_power_and_ground_nets 112 = MEZZ_3V3 3.3V | from line 40 of fpga_j2_power_and_ground_nets 113 = No_Conn_AE25_J2_TX12_P J2_TX12_P | AE25 from line 233 of fpga_mezz_no_conn_nets 114 = J2_RX12_P_U201_LED_Driver_Control_Input_15 J2_RX12_P | Y30 from line 32 of led_all_signals_power_gnd_nets 115 = No_Conn_AF25_J2_TX12_N J2_TX12_N | AF25 from line 234 of fpga_mezz_no_conn_nets 116 = No_Conn_AA30_J2_RX12_N J2_RX12_N | AA30 from line 321 of fpga_mezz_no_conn_nets 117 = GROUND GND | from line 48 of fpga_j2_power_and_ground_nets 118 = GROUND GND | from line 53 of fpga_j2_power_and_ground_nets 119 = No_Conn_AD30_J2_TX13_P J2_TX13_P | AD30 from line 236 of fpga_mezz_no_conn_nets 120 = J2_RX13_P_U201_LED_Driver_Control_Input_16 J2_RX13_P | AC26 from line 33 of led_all_signals_power_gnd_nets 121 = No_Conn_AE30_J2_TX13_N J2_TX13_N | AE30 from line 237 of fpga_mezz_no_conn_nets 122 = No_Conn_AD26_J2_RX13_N J2_RX13_N | AD26 from line 323 of fpga_mezz_no_conn_nets 123 = MEZZ_3V3 3.3V | from line 39 of fpga_j2_power_and_ground_nets 124 = MEZZ_3V3 3.3V | from line 40 of fpga_j2_power_and_ground_nets 125 = No_Conn_AF29_J2_TX14_P J2_TX14_P | AF29 from line 239 of fpga_mezz_no_conn_nets 126 = J2_RX14_P_U201_LED_Driver_Control_Input_17 J2_RX14_P | AB29 from line 34 of led_all_signals_power_gnd_nets 127 = No_Conn_AG29_J2_TX14_N J2_TX14_N | AG29 from line 240 of fpga_mezz_no_conn_nets 128 = No_Conn_AB30_J2_RX14_N J2_RX14_N | AB30 from line 325 of fpga_mezz_no_conn_nets 129 = GROUND GND | from line 48 of fpga_j2_power_and_ground_nets 130 = GROUND GND | from line 53 of fpga_j2_power_and_ground_nets 131 = No_Conn_AF30_J2_TX15_P J2_TX15_P | AF30 from line 242 of fpga_mezz_no_conn_nets 132 = J2_RX15_P_U201_LED_Driver_Control_Input_18 J2_RX15_P | AD25 from line 37 of led_all_signals_power_gnd_nets 133 = No_Conn_AG30_J2_TX15_N J2_TX15_N | AG30 from line 243 of fpga_mezz_no_conn_nets 134 = No_Conn_AE26_J2_RX15_N J2_RX15_N | AE26 from line 327 of fpga_mezz_no_conn_nets 135 = MEZZ_3V3 3.3V | from line 39 of fpga_j2_power_and_ground_nets 136 = MEZZ_3V3 3.3V | from line 40 of fpga_j2_power_and_ground_nets 137 = No_Conn_AH26_J2_TX16_P J2_TX16_P | AH26 from line 245 of fpga_mezz_no_conn_nets 138 = J2_RX16_P_U201_LED_Driver_Control_Input_19 J2_RX16_P | AG26 from line 38 of led_all_signals_power_gnd_nets 139 = No_Conn_AH27_J2_TX16_N J2_TX16_N | AH27 from line 246 of fpga_mezz_no_conn_nets 140 = No_Conn_AG27_J2_RX16_N J2_RX16_N | AG27 from line 329 of fpga_mezz_no_conn_nets 141 = GROUND GND | from line 49 of fpga_j2_power_and_ground_nets 142 = GROUND GND | from line 53 of fpga_j2_power_and_ground_nets 143 = No_Conn_AJ30_J2_TX17_P J2_TX17_P | AJ30 from line 248 of fpga_mezz_no_conn_nets 144 = J2_RX17_P_U201_LED_Driver_Control_Input_20 J2_RX17_P | AJ28 from line 39 of led_all_signals_power_gnd_nets 145 = No_Conn_AK30_J2_TX17_N J2_TX17_N | AK30 from line 249 of fpga_mezz_no_conn_nets 146 = No_Conn_AJ29_J2_RX17_N J2_RX17_N | AJ29 from line 331 of fpga_mezz_no_conn_nets 147 = BULK_3V3 C3.3V | from line 31 of fpga_j2_power_and_ground_nets 148 = BULK_3V3 C3.3V | from line 31 of fpga_j2_power_and_ground_nets 149 = No_Conn_AK27_J2_TX18_P J2_TX18_P | AK27 from line 251 of fpga_mezz_no_conn_nets 150 = J2_RX18_P_U201_LED_Driver_Control_Input_21 J2_RX18_P | AJ26 from line 40 of led_all_signals_power_gnd_nets 151 = No_Conn_AK28_J2_TX18_N J2_TX18_N | AK28 from line 252 of fpga_mezz_no_conn_nets 152 = No_Conn_AK26_J2_RX18_N J2_RX18_N | AK26 from line 333 of fpga_mezz_no_conn_nets 153 = GROUND GND | from line 49 of fpga_j2_power_and_ground_nets 154 = GROUND GND | from line 53 of fpga_j2_power_and_ground_nets 155 = No_Conn_AB27_J2_TX19_P J2_TX19_P | AB27 from line 254 of fpga_mezz_no_conn_nets 156 = Spare_Osc_to_FPGA_Dir J2_RX19_P | AC28 from line 256 of clock_generation_nets 157 = No_Conn_AC27_J2_TX19_N J2_TX19_N | AC27 from line 255 of fpga_mezz_no_conn_nets 158 = Spare_Osc_to_FPGA_Cmp J2_RX19_N | AD28 from line 257 of clock_generation_nets 159 = Mezz_3V3 VCCIO_12 | from line 65 of fpga_vcco_nets 160 = Mezz_3V3 VCCIO_12 | from line 65 of fpga_vcco_nets 161 = GROUND GND | from line 49 of fpga_j2_power_and_ground_nets 162 = GROUND GND | from line 53 of fpga_j2_power_and_ground_nets 163 = GROUND GND | from line 49 of fpga_j2_power_and_ground_nets 164 = GROUND GND | from line 54 of fpga_j2_power_and_ground_nets 165 = ISO_12V VIN | from line 23 of fpga_j2_power_and_ground_nets 166 = ISO_12V VIN | from line 24 of fpga_j2_power_and_ground_nets 167 = ISO_12V VIN | from line 23 of fpga_j2_power_and_ground_nets 168 = ISO_12V VIN | from line 24 of fpga_j2_power_and_ground_nets 169 = MEZZ_3V3 3.3V | from line 39 of fpga_j2_power_and_ground_nets 170 = MEZZ_3V3 3.3V | from line 40 of fpga_j2_power_and_ground_nets 171 = MEZZ_3V3 3.3V | from line 39 of fpga_j2_power_and_ground_nets 172 = MEZZ_3V3 3.3V | from line 40 of fpga_j2_power_and_ground_nets ------------------------------------------------------ Pins sorted by Net Name 147 = BULK_3V3 C3.3V | from line 31 of fpga_j2_power_and_ground_nets 148 = BULK_3V3 C3.3V | from line 31 of fpga_j2_power_and_ground_nets 129 = GROUND GND | from line 48 of fpga_j2_power_and_ground_nets 117 = GROUND GND | from line 48 of fpga_j2_power_and_ground_nets 105 = GROUND GND | from line 48 of fpga_j2_power_and_ground_nets 93 = GROUND GND | from line 48 of fpga_j2_power_and_ground_nets 45 = GROUND GND | from line 48 of fpga_j2_power_and_ground_nets 161 = GROUND GND | from line 49 of fpga_j2_power_and_ground_nets 163 = GROUND GND | from line 49 of fpga_j2_power_and_ground_nets 153 = GROUND GND | from line 49 of fpga_j2_power_and_ground_nets 141 = GROUND GND | from line 49 of fpga_j2_power_and_ground_nets 58 = GROUND GND | from line 51 of fpga_j2_power_and_ground_nets 52 = GROUND GND | from line 51 of fpga_j2_power_and_ground_nets 64 = GROUND GND | from line 51 of fpga_j2_power_and_ground_nets 46 = GROUND GND | from line 51 of fpga_j2_power_and_ground_nets 70 = GROUND GND | from line 51 of fpga_j2_power_and_ground_nets 82 = GROUND GND | from line 52 of fpga_j2_power_and_ground_nets 106 = GROUND GND | from line 52 of fpga_j2_power_and_ground_nets 94 = GROUND GND | from line 52 of fpga_j2_power_and_ground_nets 88 = GROUND GND | from line 52 of fpga_j2_power_and_ground_nets 76 = GROUND GND | from line 52 of fpga_j2_power_and_ground_nets 130 = GROUND GND | from line 53 of fpga_j2_power_and_ground_nets 118 = GROUND GND | from line 53 of fpga_j2_power_and_ground_nets 162 = GROUND GND | from line 53 of fpga_j2_power_and_ground_nets 154 = GROUND GND | from line 53 of fpga_j2_power_and_ground_nets 142 = GROUND GND | from line 53 of fpga_j2_power_and_ground_nets 164 = GROUND GND | from line 54 of fpga_j2_power_and_ground_nets 53 = Hub_2_Ref_Mon_to_FPGA J2_TX2_P | P30 from line 237 of clock_generation_nets 165 = ISO_12V VIN | from line 23 of fpga_j2_power_and_ground_nets 167 = ISO_12V VIN | from line 23 of fpga_j2_power_and_ground_nets 166 = ISO_12V VIN | from line 24 of fpga_j2_power_and_ground_nets 168 = ISO_12V VIN | from line 24 of fpga_j2_power_and_ground_nets 108 = J2_RX11_P_U201_LED_Driver_Control_Input_14 J2_RX11_P | Y28 from line 31 of led_all_signals_power_gnd_nets 114 = J2_RX12_P_U201_LED_Driver_Control_Input_15 J2_RX12_P | Y30 from line 32 of led_all_signals_power_gnd_nets 120 = J2_RX13_P_U201_LED_Driver_Control_Input_16 J2_RX13_P | AC26 from line 33 of led_all_signals_power_gnd_nets 126 = J2_RX14_P_U201_LED_Driver_Control_Input_17 J2_RX14_P | AB29 from line 34 of led_all_signals_power_gnd_nets 132 = J2_RX15_P_U201_LED_Driver_Control_Input_18 J2_RX15_P | AD25 from line 37 of led_all_signals_power_gnd_nets 138 = J2_RX16_P_U201_LED_Driver_Control_Input_19 J2_RX16_P | AG26 from line 38 of led_all_signals_power_gnd_nets 144 = J2_RX17_P_U201_LED_Driver_Control_Input_20 J2_RX17_P | AJ28 from line 39 of led_all_signals_power_gnd_nets 150 = J2_RX18_P_U201_LED_Driver_Control_Input_21 J2_RX18_P | AJ26 from line 40 of led_all_signals_power_gnd_nets 48 = J2_RX1_P_U202_LED_Driver_Control_Input_14 J2_RX1_P | N26 from line 103 of led_all_signals_power_gnd_nets 54 = J2_RX2_P_U202_LED_Driver_Control_Input_15 J2_RX2_P | N28 from line 104 of led_all_signals_power_gnd_nets 60 = J2_RX3_P_U202_LED_Driver_Control_Input_16 J2_RX3_P | P23 from line 105 of led_all_signals_power_gnd_nets 66 = J2_RX4_P_U202_LED_Driver_Control_Input_17 J2_RX4_P | T24 from line 106 of led_all_signals_power_gnd_nets 72 = J2_RX5_P_U202_LED_Driver_Control_Input_18 J2_RX5_P | R22 from line 108 of led_all_signals_power_gnd_nets 78 = J2_RX6_P_U202_LED_Driver_Control_Input_19 J2_RX6_P | U24 from line 109 of led_all_signals_power_gnd_nets 84 = J2_RX7_P_U202_LED_Driver_Control_Input_20 J2_RX7_P | T22 from line 110 of led_all_signals_power_gnd_nets 90 = J2_RX8_P_U202_LED_Driver_Control_Input_21 J2_RX8_P | W28 from line 111 of led_all_signals_power_gnd_nets 16 = LB_CPLD_GPIO_3 CPLD_GPIO3 | from line 67 of htm_life_boat_nets 18 = LB_CPLD_GPIO_4 CPLD_GPIO4 | from line 73 of htm_life_boat_nets 20 = LB_CPLD_GPIO_5 CPLD_GPIO5 | from line 79 of htm_life_boat_nets 135 = MEZZ_3V3 3.3V | from line 39 of fpga_j2_power_and_ground_nets 123 = MEZZ_3V3 3.3V | from line 39 of fpga_j2_power_and_ground_nets 111 = MEZZ_3V3 3.3V | from line 39 of fpga_j2_power_and_ground_nets 171 = MEZZ_3V3 3.3V | from line 39 of fpga_j2_power_and_ground_nets 169 = MEZZ_3V3 3.3V | from line 39 of fpga_j2_power_and_ground_nets 136 = MEZZ_3V3 3.3V | from line 40 of fpga_j2_power_and_ground_nets 124 = MEZZ_3V3 3.3V | from line 40 of fpga_j2_power_and_ground_nets 112 = MEZZ_3V3 3.3V | from line 40 of fpga_j2_power_and_ground_nets 172 = MEZZ_3V3 3.3V | from line 40 of fpga_j2_power_and_ground_nets 170 = MEZZ_3V3 3.3V | from line 40 of fpga_j2_power_and_ground_nets 160 = Mezz_3V3 VCCIO_12 | from line 65 of fpga_vcco_nets 159 = Mezz_3V3 VCCIO_12 | from line 65 of fpga_vcco_nets 100 = Mezz_3V3 VCCIO_13 | from line 67 of fpga_vcco_nets 99 = Mezz_3V3 VCCIO_13 | from line 67 of fpga_vcco_nets 101 = No_Conn_AA27_J2_TX10_P J2_TX10_P | AA27 from line 227 of fpga_mezz_no_conn_nets 103 = No_Conn_AA28_J2_TX10_N J2_TX10_N | AA28 from line 228 of fpga_mezz_no_conn_nets 110 = No_Conn_AA29_J2_RX11_N J2_RX11_N | AA29 from line 319 of fpga_mezz_no_conn_nets 116 = No_Conn_AA30_J2_RX12_N J2_RX12_N | AA30 from line 321 of fpga_mezz_no_conn_nets 155 = No_Conn_AB27_J2_TX19_P J2_TX19_P | AB27 from line 254 of fpga_mezz_no_conn_nets 128 = No_Conn_AB30_J2_RX14_N J2_RX14_N | AB30 from line 325 of fpga_mezz_no_conn_nets 157 = No_Conn_AC27_J2_TX19_N J2_TX19_N | AC27 from line 255 of fpga_mezz_no_conn_nets 107 = No_Conn_AC29_J2_TX11_P J2_TX11_P | AC29 from line 230 of fpga_mezz_no_conn_nets 122 = No_Conn_AD26_J2_RX13_N J2_RX13_N | AD26 from line 323 of fpga_mezz_no_conn_nets 109 = No_Conn_AD29_J2_TX11_N J2_TX11_N | AD29 from line 231 of fpga_mezz_no_conn_nets 119 = No_Conn_AD30_J2_TX13_P J2_TX13_P | AD30 from line 236 of fpga_mezz_no_conn_nets 113 = No_Conn_AE25_J2_TX12_P J2_TX12_P | AE25 from line 233 of fpga_mezz_no_conn_nets 134 = No_Conn_AE26_J2_RX15_N J2_RX15_N | AE26 from line 327 of fpga_mezz_no_conn_nets 121 = No_Conn_AE30_J2_TX13_N J2_TX13_N | AE30 from line 237 of fpga_mezz_no_conn_nets 115 = No_Conn_AF25_J2_TX12_N J2_TX12_N | AF25 from line 234 of fpga_mezz_no_conn_nets 125 = No_Conn_AF29_J2_TX14_P J2_TX14_P | AF29 from line 239 of fpga_mezz_no_conn_nets 131 = No_Conn_AF30_J2_TX15_P J2_TX15_P | AF30 from line 242 of fpga_mezz_no_conn_nets 140 = No_Conn_AG27_J2_RX16_N J2_RX16_N | AG27 from line 329 of fpga_mezz_no_conn_nets 127 = No_Conn_AG29_J2_TX14_N J2_TX14_N | AG29 from line 240 of fpga_mezz_no_conn_nets 133 = No_Conn_AG30_J2_TX15_N J2_TX15_N | AG30 from line 243 of fpga_mezz_no_conn_nets 137 = No_Conn_AH26_J2_TX16_P J2_TX16_P | AH26 from line 245 of fpga_mezz_no_conn_nets 139 = No_Conn_AH27_J2_TX16_N J2_TX16_N | AH27 from line 246 of fpga_mezz_no_conn_nets 146 = No_Conn_AJ29_J2_RX17_N J2_RX17_N | AJ29 from line 331 of fpga_mezz_no_conn_nets 143 = No_Conn_AJ30_J2_TX17_P J2_TX17_P | AJ30 from line 248 of fpga_mezz_no_conn_nets 152 = No_Conn_AK26_J2_RX18_N J2_RX18_N | AK26 from line 333 of fpga_mezz_no_conn_nets 149 = No_Conn_AK27_J2_TX18_P J2_TX18_P | AK27 from line 251 of fpga_mezz_no_conn_nets 151 = No_Conn_AK28_J2_TX18_N J2_TX18_N | AK28 from line 252 of fpga_mezz_no_conn_nets 145 = No_Conn_AK30_J2_TX17_N J2_TX17_N | AK30 from line 249 of fpga_mezz_no_conn_nets 1 = No_Conn_J2_NC_Pin_1 NC | from line 175 of fpga_mezz_no_conn_nets 3 = No_Conn_J2_NC_Pin_3 NC | from line 176 of fpga_mezz_no_conn_nets 5 = No_Conn_J2_NC_Pin_5 NC | from line 177 of fpga_mezz_no_conn_nets 51 = No_Conn_J2_NC_Pin_51 NC | from line 186 of fpga_mezz_no_conn_nets 57 = No_Conn_J2_NC_Pin_57 NC | from line 191 of fpga_mezz_no_conn_nets 63 = No_Conn_J2_NC_Pin_63 NC | from line 196 of fpga_mezz_no_conn_nets 69 = No_Conn_J2_NC_Pin_69 NC | from line 201 of fpga_mezz_no_conn_nets 7 = No_Conn_J2_NC_Pin_7 NC | from line 178 of fpga_mezz_no_conn_nets 75 = No_Conn_J2_NC_Pin_75 NC | from line 206 of fpga_mezz_no_conn_nets 81 = No_Conn_J2_NC_Pin_81 NC | from line 211 of fpga_mezz_no_conn_nets 87 = No_Conn_J2_NC_Pin_87 NC | from line 216 of fpga_mezz_no_conn_nets 34 = No_Conn_J2_OTG1_ID OTG1_ID | from line 282 of fpga_mezz_no_conn_nets 22 = No_Conn_J2_OTG2_ID OTG2_ID | from line 273 of fpga_mezz_no_conn_nets 2 = No_Conn_J2_TEMP_DCDC1 TEMP_DCDC1 | from line 260 of fpga_mezz_no_conn_nets 4 = No_Conn_J2_TEMP_DCDC2 TEMP_DCDC2 | from line 261 of fpga_mezz_no_conn_nets 10 = No_Conn_J2_TEMP_GPI00 CPLD_GPIO0 | from line 267 of fpga_mezz_no_conn_nets 12 = No_Conn_J2_TEMP_GPI01 CPLD_GPIO1 | from line 268 of fpga_mezz_no_conn_nets 14 = No_Conn_J2_TEMP_GPI02 CPLD_GPIO2 | from line 269 of fpga_mezz_no_conn_nets 6 = No_Conn_J2_TEMP_PCB TEMP_PCB | from line 263 of fpga_mezz_no_conn_nets 8 = No_Conn_J2_TEMP_ZYNQ TEMP_ZYNQ | from line 265 of fpga_mezz_no_conn_nets 38 = No_Conn_J2_USB1_D_N USB1_D_N | from line 285 of fpga_mezz_no_conn_nets 40 = No_Conn_J2_USB1_D_P USB1_D_P | from line 286 of fpga_mezz_no_conn_nets 36 = No_Conn_J2_USB1_VBUS USB1_VBUS | from line 284 of fpga_mezz_no_conn_nets 26 = No_Conn_J2_USB2_D_N USB2_D_N | from line 276 of fpga_mezz_no_conn_nets 28 = No_Conn_J2_USB2_D_P USB2_D_P | from line 277 of fpga_mezz_no_conn_nets 24 = No_Conn_J2_USB2_VBUS USB2_VBUS | from line 275 of fpga_mezz_no_conn_nets 32 = No_Conn_J2_VBUS1_V_EN VBUS1_V_EN | from line 280 of fpga_mezz_no_conn_nets 30 = No_Conn_J2_VBUS2_V_EN VBUS2_V_EN | from line 279 of fpga_mezz_no_conn_nets 50 = No_Conn_N27_J2_RX1_N J2_RX1_N | N27 from line 294 of fpga_mezz_no_conn_nets 41 = No_Conn_N29_J2_TX0_P J2_TX0_P | N29 from line 180 of fpga_mezz_no_conn_nets 62 = No_Conn_P24_J2_RX3_N J2_RX3_N | P24 from line 298 of fpga_mezz_no_conn_nets 42 = No_Conn_P25_J2_RX0_P J2_RX0_P | P25 from line 291 of fpga_mezz_no_conn_nets 44 = No_Conn_P26_J2_RX0_N J2_RX0_N | P26 from line 292 of fpga_mezz_no_conn_nets 56 = No_Conn_P28_J2_RX2_N J2_RX2_N | P28 from line 296 of fpga_mezz_no_conn_nets 43 = No_Conn_P29_J2_TX0_N J2_TX0_N | P29 from line 181 of fpga_mezz_no_conn_nets 74 = No_Conn_R23_J2_RX5_N J2_RX5_N | R23 from line 302 of fpga_mezz_no_conn_nets 55 = No_Conn_R30_J2_TX2_N J2_TX2_N | R30 from line 189 of fpga_mezz_no_conn_nets 86 = No_Conn_T23_J2_RX7_N J2_RX7_N | T23 from line 306 of fpga_mezz_no_conn_nets 68 = No_Conn_T25_J2_RX4_N J2_RX4_N | T25 from line 300 of fpga_mezz_no_conn_nets 83 = No_Conn_T29_J2_TX7_P J2_TX7_P | T29 from line 213 of fpga_mezz_no_conn_nets 65 = No_Conn_T30_J2_TX4_P J2_TX4_P | T30 from line 198 of fpga_mezz_no_conn_nets 47 = No_Conn_U22_J2_TX1_P J2_TX1_P | U22 from line 183 of fpga_mezz_no_conn_nets 95 = No_Conn_U25_J2_TX9_P J2_TX9_P | U25 from line 221 of fpga_mezz_no_conn_nets 96 = No_Conn_U26_J2_RX9_P J2_RX9_P | U26 from line 310 of fpga_mezz_no_conn_nets 98 = No_Conn_U27_J2_RX9_N J2_RX9_N | U27 from line 311 of fpga_mezz_no_conn_nets 85 = No_Conn_U29_J2_TX7_N J2_TX7_N | U29 from line 214 of fpga_mezz_no_conn_nets 67 = No_Conn_U30_J2_TX4_N J2_TX4_N | U30 from line 199 of fpga_mezz_no_conn_nets 49 = No_Conn_V22_J2_TX1_N J2_TX1_N | V22 from line 184 of fpga_mezz_no_conn_nets 59 = No_Conn_V23_J2_TX3_P J2_TX3_P | V23 from line 193 of fpga_mezz_no_conn_nets 80 = No_Conn_V24_J2_RX6_N J2_RX6_N | V24 from line 304 of fpga_mezz_no_conn_nets 97 = No_Conn_V26_J2_TX9_N J2_TX9_N | V26 from line 222 of fpga_mezz_no_conn_nets 92 = No_Conn_V27_J2_RX8_N J2_RX8_N | V27 from line 308 of fpga_mezz_no_conn_nets 77 = No_Conn_V28_J2_TX6_P J2_TX6_P | V28 from line 208 of fpga_mezz_no_conn_nets 79 = No_Conn_V29_J2_TX6_N J2_TX6_N | V29 from line 209 of fpga_mezz_no_conn_nets 61 = No_Conn_W24_J2_TX3_N J2_TX3_N | W24 from line 194 of fpga_mezz_no_conn_nets 71 = No_Conn_W25_J2_TX5_P J2_TX5_P | W25 from line 203 of fpga_mezz_no_conn_nets 73 = No_Conn_W26_J2_TX5_N J2_TX5_N | W26 from line 204 of fpga_mezz_no_conn_nets 89 = No_Conn_W29_J2_TX8_P J2_TX8_P | W29 from line 218 of fpga_mezz_no_conn_nets 91 = No_Conn_W30_J2_TX8_N J2_TX8_N | W30 from line 219 of fpga_mezz_no_conn_nets 102 = No_Conn_Y26_J2_RX10_P J2_RX10_P | Y26 from line 316 of fpga_mezz_no_conn_nets 104 = No_Conn_Y27_J2_RX10_N J2_RX10_N | Y27 from line 317 of fpga_mezz_no_conn_nets 21 = PHY_1_TRD0_6_CMP PHY1_MDI0_N | from line 99 of enet_j14_trans1_fpga_mezz_nets 23 = PHY_1_TRD0_6_DIR PHY1_MDI0_P | from line 98 of enet_j14_trans1_fpga_mezz_nets 17 = PHY_1_TRD1_6_CMP PHY1_MDI1_N | from line 102 of enet_j14_trans1_fpga_mezz_nets 19 = PHY_1_TRD1_6_DIR PHY1_MDI1_P | from line 101 of enet_j14_trans1_fpga_mezz_nets 13 = PHY_1_TRD2_6_CMP PHY1_MDI2_N | from line 105 of enet_j14_trans1_fpga_mezz_nets 15 = PHY_1_TRD2_6_DIR PHY1_MDI2_P | from line 104 of enet_j14_trans1_fpga_mezz_nets 9 = PHY_1_TRD3_6_CMP PHY1_MDI3_N | from line 108 of enet_j14_trans1_fpga_mezz_nets 11 = PHY_1_TRD3_6_DIR PHY1_MDI3_P | from line 107 of enet_j14_trans1_fpga_mezz_nets 37 = PHY_2_TRD0_6_CMP PHY2_MDI0_N | from line 138 of enet_j14_trans1_fpga_mezz_nets 39 = PHY_2_TRD0_6_DIR PHY2_MDI0_P | from line 137 of enet_j14_trans1_fpga_mezz_nets 33 = PHY_2_TRD1_6_CMP PHY2_MDI1_N | from line 141 of enet_j14_trans1_fpga_mezz_nets 35 = PHY_2_TRD1_6_DIR PHY2_MDI1_P | from line 140 of enet_j14_trans1_fpga_mezz_nets 29 = PHY_2_TRD2_6_CMP PHY2_MDI2_N | from line 144 of enet_j14_trans1_fpga_mezz_nets 31 = PHY_2_TRD2_6_DIR PHY2_MDI2_P | from line 143 of enet_j14_trans1_fpga_mezz_nets 25 = PHY_2_TRD3_6_CMP PHY2_MDI3_N | from line 147 of enet_j14_trans1_fpga_mezz_nets 27 = PHY_2_TRD3_6_DIR PHY2_MDI3_P | from line 146 of enet_j14_trans1_fpga_mezz_nets 158 = Spare_Osc_to_FPGA_Cmp J2_RX19_N | AD28 from line 257 of clock_generation_nets 156 = Spare_Osc_to_FPGA_Dir J2_RX19_P | AC28 from line 256 of clock_generation_nets