DFM report of job DEBRON ELECTRONICS hub_100416
|
Id |
Title |
Priority |
Value-Found
(") |
All-Discussions |
Image |
X-Location
(") |
Y-location
(") |
Layers
|
|
1 |
Missing Holes |
hot |
0.000000 |
In two locations, it appears that the data is missing
holes. Should these two pads have
vias? See also note 10. |
|
6.348425 |
7.500000 |
drill_data_plated_holes.txt artwork_1_trace_l1_top.txt artwork_12_trace_l22_bot.txt drill_data_plated_holes.txt |
|
2 |
Annular ring |
critical |
0.000000 |
In one location, a trace is causing unintended shorts. |
|
8.226446 |
1.171331 |
artwork_11_trace_l20.txt artwork_11_trace_l20.txt drill_data_plated_holes.txt |
|
3 |
Stubs |
FYI |
0.006299 |
Several stubs found.
These should be cleaned up. |
|
0.889764 |
2.551181 |
artwork_2_trace_l3.txt artwork_2_trace_l3.txt |
|
4 |
PTH to Copper |
hot |
0.004912 |
In a few locations, copper is too close to adjacent
drilled holes, increasing the risk of shorting to occur. All plated holes should be a minimum of 8 mil from adjacent copper features. |
|
11.487956 |
9.962656 |
artwork_6_trace_fill_l11.txt artwork_6_trace_fill_l11.txt drill_data_plated_holes.txt |
|
5 |
PTH annular ring |
hot |
0.004500 |
There is insufficient annular ring in the thermal pad
connections on the plane layers.
This is related to the annular ring issue described in note 7 below. Pad sizes need to be increased as per
note 7. |
|
10.458380 |
2.603944 |
artwork_13_gnd_plane_ls_2.txt artwork_13_gnd_plane_ls_2.txt drill_data_plated_holes.txt |
|
6 |
NPTH to Copper |
hot |
0.003837 |
Non-plated holes should be a minimum of
8 mil from all copper features. |
|
9.968554 |
12.271654 |
artwork_13_gnd_plane_ls_4.txt+1 artwork_13_gnd_plane_ls_4.txt+1 drill_data_un_plated_holes.txt |
|
7 |
PTH (Comp) Annular ring |
hot |
0.004500 |
The 18.11 mil finished holes (22.5 mil drill – 31.496
mil pad) do not meet IPC Class 2 annular ring. Pad size should be increased to 32.5 mil minimum in order to meet annular ring
requirements. |
|
10.505625 |
2.393701 |
artwork_1_trace_l1_top.txt artwork_1_trace_l1_top.txt drill_data_plated_holes.txt |
|
8 |
VIA Annular ring |
FYI |
0.003549 |
In order to meet annular ring requirements, the 0.2mm and
0.3mm vias will need to be drilled at the finished hole
size. |
|
9.088583 |
7.088782 |
artwork_1_trace_l1_top.txt artwork_1_trace_l1_top.txt drill_data_plated_holes.txt |
|
9 |
Undrilled pads Clearance |
FYI |
0.000000 |
There is silkscreen on pads everywhere in the design. Silkscreen needs to be cleaned up. |
|
8.655197 |
3.161811 |
artwork_17_silkscreen_top.txt artwork_17_silkscreen_top.txt artwork_1_trace_l1_top.txt artwork_19_solder_mask_top.txt |
|
10 |
Short |
FYI |
0.000000 |
No netlist provided.
Unable to determine the presence of design shorts or opens. If possible, please provide netlist in
the IPC-356-D format. |
|
N/A |
2N/A |
drill_data_plated_holes.txt artwork_13_gnd_plane_ls_2.txt artwork_13_gnd_plane_ls_4.txt+1 drill_data_plated_holes.txt |
