Compare the Motorola Fanout Chips for the Hub-Module 10 Gb/s circuits ---------------------------------------- Rev. 22-Dec-2014 NB7L11M NBSG11 NB7L14M NB7HQ14M NB7VQ14M NBSG14 NB7L14 ----------- ----------- ----------- ----------- ----------- ----------- ----------- Input Standards: LVPECL, NECL, PECL, LVPECL, LVPECL, LVPECL, NECL, PECL, LVPECL, LVDS, CML, LVDS, CML, LVDS, CML, LVDS, CML LVDS, CML LVDS, CML, LVDS, CML LVCMOS, LVCMOS, LVCMOS, LVCMOS, LVCMOS, LVTTL LVTTL LVTTL LVTTL LVTTL Output Standard: CML RS ECL CML CML CML RS ECL LVPECL Reduced Swing Reduced Swing Fanout: 1-->2 1-->2 1-->4 1-->4 1-->4 1-->4 1-->4 Freq Data Min: 10 10.5 10 10 10 - 10 i.e. Guaranteed Up To Gb/s Freq Clock Min: - 10.5 7 7 7 10 7 i.e. Guaranteed Up To Gb/s Prop Delay: 110 / 150 125 / 160 110 / 150 170 / 225 175 / 225 125 / 160 165 / 200 psec typ/max Rise/Fall: 30 / 60 30 / 55 30 / 60 30 / 45 30 / 45 30 / 55 45 / 60 psec typ/max Inherent Jitter: 0.2 / 0.5 0.2 / 1.0 0.2 / 0.5 0.2 / 0.8 0.2 / 0.8 0.2 / 1.0 0.5 / 0.8 RMS psec typ/max Jitter Pk-Pk: 5 / 10 10.7 typ 6 / 10 10 max 10 max 10 max 5 / 15 Data Dependent psec typ/max Output Swing mV Pk-Pk Full: 400 / 350 420 400 / 370 400 400 410 730 at 10 Gb/s: 250 / 205 220 240 / 220 200 200 200 0 my est Output Swing Break Pt Freq: 6 6 7 7.7 7.7 5 5 Gb/s DC Output Level High mV: Vcc-20 1565 / 2365 Vcc-20 Vcco-10 Vcc-5 1610 / 2410 1600 / 2400 Low mV: Vcc-420 1155 / 1955 Vcc-420 Vcco-400 Vcc-425 1205 / 1970 800 / 1600 Power Supply: 2.5/3.3 2.5/3.3 2.5/3.3 2.5V core 1.8/3.3 2.5/3.3 2.5/3.3 Voltage in V 1.8/2.5 Out Power Supply: 85 60 140 160 170 60 85 Current mA typ Watts for: 17/22.4 12/15.8 28/37 28.4/32 24.5/45 12/15.8 17/22.4 80 channels DC Input Common: 1163/Vcc-38 - 800/Vcc-38 1050/Vcc-50 1050/Vcc-50 - 950/Vcc-50 Mode Range mV Output Current: 25 25 25 40 40 25 50 Continuous mA Transistor: 285 125 387 290 210 158 173 Count Has an: No No No Yes, it can Yes, it can No No "Equalizer" be bypassed be bypassed Package: QFN-16 FCBGA-16 QFN-16 QFN-16 QFN-16 QFN-16 QFN-16 QFN-16 Suffix: MNG MNG MNG MNG MNG MNG MNG Data Sheet Date: Jan 2011 Jan 2011 Jun 2012 May 2009 Dec 2010 Jun 2014 May 2011 Rev. 3 Rev. 16 Rev. 6 Rev. 0 Rev. 0 Rev. 17 Rev. 4 Table Notes: ------------ - Freq Data Min is the minimum (not typical) guaranteed data stream frequency. This must depend upon the data encoding that is in use and upon how much closing of the eye one thinks is OK for this fanout chip to cause. Neither of these is always clearly specified. - I'm not certain that Jitter is always measured in the same way for the different parts. I tried to find numbers to show the inherent jitter in the part and to show the jitter generated by the part when it receives a changing data pattern at 10 Gb/s. - Output Swing is shown for 3.3V power / 2.5V power or for 2.5V / 1.8V output stage power. - I'm not certain the the Output Swing is always measured with the same amplitude input signal over the various parts. - The minimum Xilinx GTH Receiver Input Swing for operation at 10 Gb/s is specified on page 60 in their document "Virtex 7 T and XT FPGAs Data Sheet: DC and AC Switching Characteristics DS183" to be 150 mV differential Pk-Pk. Note that Xilinx has a rational but different from On-Semi way of specifying differential peak-peak swing. Yes, one does need to specify how they define this. - CML outputs internally terminate to Vcc and are externally terminated to Vcc. ECL outputs are open emitters that must terminate to GND (when running from a positive Vcc). - "Typical" High and Low Output Voltages are shown. Where different they are shown for 2V5/3V3 or for 1V8/2V5 output stage power. - Suffix is shown for Pb Free parts in rail packaging. The issue is that some of the basic part numbers end in "M" and that the part number extension starts with "M". - I don't always understand how On-Semi is specifying Common Mode Input Voltage range - but it does not really matter. - Power supply Watts was calculated for both the low and higher standard power supply voltages. This does not include power in the or caused by the far end load. - We need to know how the FEX cards are driving the lines to know how to setup the input terminators on the fanout chips. - The dates from the Data Sheets are assumed to imply either how new is the part or how recently was it worked on or characterized. Note that none of them are supper new. Should call On-Semi and ask what's new or what they recommend for 10 Gb/s data fanout. Cover Notes: ------------ - For this comparison I looked only at the On-Semi parts that were guaranteed for operation at 10 Gb/s. Note that the part selector pages on Digi-Key and the first page of the data sheets is showing a "typical" maximum data rate. What we care about the "guaranteed minimum", i.e. the part is guarantee to operate up to at least data rate xyz. - None of these parts are "transparent" at 10 Gb/s. That is given perfect input data waveform they all close the eye somewhat at the 10 Gb/s data rate. At 6.4 Gb/s they look more or less transparent. - Specifying the maximum data rate is a matter of making up a definition of how much eye closure is OK. There isn't really a natural cutoff point. One must be careful when comparing parts across manufactures. - AC coupling capacitors are required if the fanout's common mode output voltage does not match the input requirements of the Xilinx GTH receivers. None of the CML or ECL output structures will directly match the GTH input voltage level requirements - the "swing" is OK but all fanout drivers have too high of a common mode voltage to directly match the GTH input requirements. The input structure to the Xilinx GTH Receivers is nicely though out and provides a 50 Ohm terminator on each line. The center of these 50 Ohm terminators can be left floating or connected to Ground or connected to any voltage between Ground and its 1.2 Volt AVtt. The common mode is to be 2/3 of the AVtt. If the fanout's common mode output voltage matched the requirements of the GTH receiver, one could use the GTH input structure to provide both the 50 Ohm termination and the far-end pull-up to Vcc that is often indicated in the data sheet for the CML drives. Note that page 158 of Xilinx "7 Series FPGAs GTX/GTH Transceivers User Guide UG476" shows AC coupling caps but I think this is just illustrating that you can use them - not that they are always required. In any case this is a good section of the Xilinx docs to read. But CML ouputs can run OK without the far-end pull-up to Vcc. See section 3 of the On_Semi application note 8173, "Termination and Interfcae of On-Semi ECL Devices with CML Output Structure". So a CML driver with coupling caps to the GTH input sounds like the right setup. - I think that we all have been looking at the Digi-Key data fanout selector guide pages. I believe that there are some mistakes in these Digi-Key pages. Some of the links to the pdf data sheets are wrong. Some of the prices look way different than others, i.e. some prices drop a lot in going from single piece to qty of 100 and the price of other parts hardly drops at all. I *think* that the problem may be the "M" at the end of the basic part number for some of these ICs getting mixed up with the "M" at the beginning of the part number extension that indicates lead finish and packaging. I need to get a real price bid and talk to an On-Semi application engineer for 2 minutes to understand what they recommend at 10 Gb/s and what may be coming available soon. Because the footprint of the 1-->4 parts is basically the same as that of the 1-->4 parts it could be that they are dropping the 1-->2 line and that's why its price appears to be so high. - I did locate some other manufactures of high speed data fanout chips but in the 10 Gb/s range but until I understand the On-Semi prices it is not clear that they have an advantage over On-Semi. - We don't know how bad the input signals from the backplane are going to be - thus no guess about whether or not the un-documented "equalizer" in the NB7HQ14M and NB7VQ14M parts would be useful in our application. It's curious that the NB7HQ14M and NB7VQ14M data sheets are at Rev. 0 and are rather old or un-updated. Again - 2 minutes with the right person at On-Semi and all will be clear. ============================================= Recall: Hub uses a XC7VX550T in a FFG1927 package with 80 GTH Transceivers and 600 HP Select I/O pins with 1.8V max Vcc output GTH uses: AVcc = 1.0 or 1.05 V AVtt = 1.2 V AVaux = 1.8V