Hub Virtex FPGA MGT Transceiver Usage ------------------------------------------- Original Rev. 8-Dec-2015 Current Rev. 24-Jan-2019 A significant number of MGT Transceivers are used on the Hub Module's Virtex FPGA. The intent of this document is to describe in a single place all of the MGT Transceiver connections to this FPGA. Notes: - The xcvu125_flvc2104 FPGA on the Hub Module contains 80 MGT Transceivers. 40 of these are GTY type transceivers and 40 of them are GTH type transceivers. - Both the GTY and GTH type transceivers are split across the two Super-Logic-Region pieces of silcon in the xcvu125_flvc2104 FPGA. Half of each transceiver type is in each of the two Super-Logic-Regions. - Note that MGT Reference Clocks can NOT be shared across Super-Logic-Regions. - The Net List files that are used to assign pins on the Hub's FPGA (including the MGT pins) are listed in the file, aa_list_of_files_with_fpga_connection.txt that is in the Net List sub-directory. - All 80 of the MGT Receivers are used in the Hub Module design. The specific MGT Receiver used for a given application has been selected on the bases of providing the best PCB trace routing. - Only 30 of the MGT Transmitters are used in the Hub design. Again PCB trace routing was the bases for selecting a given MGT Transmitter for a specific application. In general this means that the MGT Transmitters with pins nearer the perimeter were selected for use. The following table lists only the MGT Transceiver inputs and outputs. The Reference Clock inputs and the MGTAVTTRCAL_LC and MGTRREF_LC pins are listed in a separate table at the end of this file. Super I/O Logic Pin Pin Name Type Region Hub Module Net Connection ---- -------- ---- ------ --------------------------- GTY Quad 133: ------------- A36 MGTYTXP3_133 GTY 1 'Comb_Data_to_Cap_to_FEX_08_Dir' A37 MGTYTXN3_133 GTY 1 'Comb_Data_to_Cap_to_FEX_08_Cmp' B38 MGTYTXP2_133 GTY 1 'Comb_Data_to_Cap_to_FEX_07_Dir' B39 MGTYTXN2_133 GTY 1 'Comb_Data_to_Cap_to_FEX_07_Cmp' C36 MGTYTXP1_133 GTY 1 C37 MGTYTXN1_133 GTY 1 D38 MGTYTXP0_133 GTY 1 D39 MGTYTXN0_133 GTY 1 A31 MGTYRXP3_133 GTY 1 'MGT_FO_CH_37_OUT_Hub_DIR' A32 MGTYRXN3_133 GTY 1 'MGT_FO_CH_37_OUT_Hub_CMP' B33 MGTYRXP2_133 GTY 1 'MGT_FO_CH_38_OUT_Hub_DIR' B34 MGTYRXN2_133 GTY 1 'MGT_FO_CH_38_OUT_Hub_CMP' C31 MGTYRXP1_133 GTY 1 'MGT_FO_CH_39_OUT_Hub_CMP' C32 MGTYRXN1_133 GTY 1 'MGT_FO_CH_39_OUT_Hub_DIR' D33 MGTYRXP0_133 GTY 1 'MGT_FO_CH_40_OUT_Hub_DIR' D34 MGTYRXN0_133 GTY 1 'MGT_FO_CH_40_OUT_Hub_CMP' GTY Quad 132: ------------- A40 MGTYTXP3_132 GTY 1 'Comb_Data_to_Cap_to_FEX_06_Dir' A41 MGTYTXN3_132 GTY 1 'Comb_Data_to_Cap_to_FEX_06_Cmp' C40 MGTYTXP2_132 GTY 1 C41 MGTYTXN2_132 GTY 1 E36 MGTYTXP1_132 GTY 1 E37 MGTYTXN1_132 GTY 1 E40 MGTYTXP0_132 GTY 1 E41 MGTYTXN0_132 GTY 1 B43 MGTYRXP3_132 GTY 1 'MGT_FO_CH_25_OUT_Hub_CMP' B44 MGTYRXN3_132 GTY 1 'MGT_FO_CH_25_OUT_Hub_DIR' C45 MGTYRXP2_132 GTY 1 'MGT_FO_CH_26_OUT_Hub_DIR' C46 MGTYRXN2_132 GTY 1 'MGT_FO_CH_26_OUT_Hub_CMP' D43 MGTYRXP1_132 GTY 1 'MGT_FO_CH_27_OUT_Hub_CMP' D44 MGTYRXN1_132 GTY 1 'MGT_FO_CH_27_OUT_Hub_DIR' E45 MGTYRXP0_132 GTY 1 'MGT_FO_CH_28_OUT_Hub_DIR' E46 MGTYRXN0_132 GTY 1 'MGT_FO_CH_28_OUT_Hub_CMP' GTY Quad 131: ------------- F34 MGTYTXP3_131 GTY 1 F35 MGTYTXN3_131 GTY 1 G36 MGTYTXP2_131 GTY 1 G37 MGTYTXN2_131 GTY 1 F38 MGTYTXP1_131 GTY 1 F39 MGTYTXN1_131 GTY 1 G40 MGTYTXP0_131 GTY 1 G41 MGTYTXN0_131 GTY 1 E31 MGTYRXP3_131 GTY 1 'MGT_FO_CH_35_OUT_Hub_CMP' E32 MGTYRXN3_131 GTY 1 'MGT_FO_CH_35_OUT_Hub_DIR' G31 MGTYRXP2_131 GTY 1 'MGT_FO_CH_36_OUT_Hub_DIR' G32 MGTYRXN2_131 GTY 1 'MGT_FO_CH_36_OUT_Hub_CMP' F43 MGTYRXP1_131 GTY 1 'MGT_FO_CH_29_OUT_Hub_CMP' F44 MGTYRXN1_131 GTY 1 'MGT_FO_CH_29_OUT_Hub_DIR' G45 MGTYRXP0_131 GTY 1 'MGT_FO_CH_30_OUT_Hub_DIR' G46 MGTYRXN0_131 GTY 1 'MGT_FO_CH_30_OUT_Hub_CMP' GTY Quad 130: ------------- H38 MGTYTXP3_130 GTY 1 H39 MGTYTXN3_130 GTY 1 J40 MGTYTXP2_130 GTY 1 'Comb_Data_to_Cap_to_FEX_05_Dir' J41 MGTYTXN2_130 GTY 1 'Comb_Data_to_Cap_to_FEX_05_Cmp' K38 MGTYTXP1_130 GTY 1 K39 MGTYTXN1_130 GTY 1 L40 MGTYTXP0_130 GTY 1 'Comb_Data_to_Cap_to_FEX_04_Dir' L41 MGTYTXN0_130 GTY 1 'Comb_Data_to_Cap_to_FEX_04_Cmp' H43 MGTYRXP3_130 GTY 1 'MGT_FO_CH_31_OUT_Hub_CMP' H44 MGTYRXN3_130 GTY 1 'MGT_FO_CH_31_OUT_Hub_DIR' J45 MGTYRXP2_130 GTY 1 'MGT_FO_CH_32_OUT_Hub_DIR' J46 MGTYRXN2_130 GTY 1 'MGT_FO_CH_32_OUT_Hub_CMP' K43 MGTYRXP1_130 GTY 1 'MGT_FO_CH_17_OUT_Hub_CMP' K44 MGTYRXN1_130 GTY 1 'MGT_FO_CH_17_OUT_Hub_DIR' L45 MGTYRXP0_130 GTY 1 'MGT_FO_CH_18_OUT_Hub_DIR' L46 MGTYRXN0_130 GTY 1 'MGT_FO_CH_18_OUT_Hub_CMP' GTY Quad 129: ------------- M38 MGTYTXP3_129 GTY 1 M39 MGTYTXN3_129 GTY 1 N40 MGTYTXP2_129 GTY 1 'Comb_Data_to_Cap_to_FEX_03_Dir' N41 MGTYTXN2_129 GTY 1 'Comb_Data_to_Cap_to_FEX_03_Cmp' P38 MGTYTXP1_129 GTY 1 P39 MGTYTXN1_129 GTY 1 R40 MGTYTXP0_129 GTY 1 'Comb_Data_to_Cap_to_Other_Hub_Dir' R41 MGTYTXN0_129 GTY 1 'Comb_Data_to_Cap_to_Other_Hub_Cmp' M43 MGTYRXP3_129 GTY 1 'MGT_FO_CH_19_OUT_Hub_CMP' M44 MGTYRXN3_129 GTY 1 'MGT_FO_CH_19_OUT_Hub_DIR' N45 MGTYRXP2_129 GTY 1 'MGT_FO_CH_20_OUT_Hub_DIR' N46 MGTYRXN2_129 GTY 1 'MGT_FO_CH_20_OUT_Hub_CMP' P43 MGTYRXP1_129 GTY 1 'MGT_FO_CH_21_OUT_Hub_CMP' P44 MGTYRXN1_129 GTY 1 'MGT_FO_CH_21_OUT_Hub_DIR' R45 MGTYRXP0_129 GTY 1 'MGT_FO_CH_22_OUT_Hub_DIR' R46 MGTYRXN0_129 GTY 1 'MGT_FO_CH_22_OUT_Hub_CMP' GTY Quad 128: ------------- T38 MGTYTXP3_128 GTY 0 T39 MGTYTXN3_128 GTY 0 U40 MGTYTXP2_128 GTY 0 U41 MGTYTXN2_128 GTY 0 V38 MGTYTXP1_128 GTY 0 V39 MGTYTXN1_128 GTY 0 W40 MGTYTXP0_128 GTY 0 W41 MGTYTXN0_128 GTY 0 T43 MGTYRXP3_128 GTY 0 'MGT_FO_CH_23_OUT_Hub_CMP' T44 MGTYRXN3_128 GTY 0 'MGT_FO_CH_23_OUT_Hub_DIR' U45 MGTYRXP2_128 GTY 0 'MGT_FO_CH_24_OUT_Hub_DIR' U46 MGTYRXN2_128 GTY 0 'MGT_FO_CH_24_OUT_Hub_CMP' V43 MGTYRXP1_128 GTY 0 'MGT_FO_CH_09_OUT_Hub_CMP' V44 MGTYRXN1_128 GTY 0 'MGT_FO_CH_09_OUT_Hub_DIR' W45 MGTYRXP0_128 GTY 0 'MGT_FO_CH_10_OUT_Hub_DIR' W46 MGTYRXN0_128 GTY 0 'MGT_FO_CH_10_OUT_Hub_CMP' GTY Quad 127: ------------- Y38 MGTYTXP3_127 GTY 0 Y39 MGTYTXN3_127 GTY 0 AA40 MGTYTXP2_127 GTY 0 'This_Hubs_RO_0_to_Cap_Other_ROD_Dir' AA41 MGTYTXN2_127 GTY 0 'This_Hubs_RO_0_to_Cap_Other_ROD_Cmp' AB38 MGTYTXP1_127 GTY 0 AB39 MGTYTXN1_127 GTY 0 AC40 MGTYTXP0_127 GTY 0 'This_Hubs_RO_1_to_Cap_Other_ROD_Cmp' AC41 MGTYTXN0_127 GTY 0 'This_Hubs_RO_1_to_Cap_Other_ROD_Dir' Y43 MGTYRXP3_127 GTY 0 'MGT_FO_CH_11_OUT_Hub_CMP' Y44 MGTYRXN3_127 GTY 0 'MGT_FO_CH_11_OUT_Hub_DIR' AA45 MGTYRXP2_127 GTY 0 'MGT_FO_CH_12_OUT_Hub_DIR' AA46 MGTYRXN2_127 GTY 0 'MGT_FO_CH_12_OUT_Hub_CMP' AB43 MGTYRXP1_127 GTY 0 'MGT_FO_CH_13_OUT_Hub_CMP' AB44 MGTYRXN1_127 GTY 0 'MGT_FO_CH_13_OUT_Hub_DIR' AC45 MGTYRXP0_127 GTY 0 'MGT_FO_CH_14_OUT_Hub_DIR' AC46 MGTYRXN0_127 GTY 0 'MGT_FO_CH_14_OUT_Hub_CMP' GTY Quad 126: ------------- AD38 MGTYTXP3_126 GTY 0 AD39 MGTYTXN3_126 GTY 0 AE40 MGTYTXP2_126 GTY 0 AE41 MGTYTXN2_126 GTY 0 AF38 MGTYTXP1_126 GTY 0 AF39 MGTYTXN1_126 GTY 0 AG40 MGTYTXP0_126 GTY 0 AG41 MGTYTXN0_126 GTY 0 AD43 MGTYRXP3_126 GTY 0 'MGT_FO_CH_15_OUT_Hub_CMP' AD44 MGTYRXN3_126 GTY 0 'MGT_FO_CH_15_OUT_Hub_DIR' AE45 MGTYRXP2_126 GTY 0 'MGT_FO_CH_16_OUT_Hub_DIR' AE46 MGTYRXN2_126 GTY 0 'MGT_FO_CH_16_OUT_Hub_CMP' AF43 MGTYRXP1_126 GTY 0 'MGT_FO_CH_01_OUT_Hub_CMP' AF44 MGTYRXN1_126 GTY 0 'MGT_FO_CH_01_OUT_Hub_DIR' AG45 MGTYRXP0_126 GTY 0 'MGT_FO_CH_02_OUT_Hub_DIR' AG46 MGTYRXN0_126 GTY 0 'MGT_FO_CH_02_OUT_Hub_CMP' GTY Quad 125: ------------- AH38 MGTYTXP3_125 GTY 0 AH39 MGTYTXN3_125 GTY 0 AJ40 MGTYTXP2_125 GTY 0 AJ41 MGTYTXN2_125 GTY 0 AK38 MGTYTXP1_125 GTY 0 AK39 MGTYTXN1_125 GTY 0 AL40 MGTYTXP0_125 GTY 0 AL41 MGTYTXN0_125 GTY 0 AH43 MGTYRXP3_125 GTY 0 'MGT_FO_CH_03_OUT_Hub_CMP' AH44 MGTYRXN3_125 GTY 0 'MGT_FO_CH_03_OUT_Hub_DIR' AJ45 MGTYRXP2_125 GTY 0 'MGT_FO_CH_04_OUT_Hub_DIR' AJ46 MGTYRXN2_125 GTY 0 'MGT_FO_CH_04_OUT_Hub_CMP' AK43 MGTYRXP1_125 GTY 0 'MGT_FO_CH_05_OUT_Hub_CMP' AK44 MGTYRXN1_125 GTY 0 'MGT_FO_CH_05_OUT_Hub_DIR' AL45 MGTYRXP0_125 GTY 0 'MGT_FO_CH_06_OUT_Hub_DIR' AL46 MGTYRXN0_125 GTY 0 'MGT_FO_CH_06_OUT_Hub_CMP' GTY Quad 124: ------------- AM38 MGTYTXP3_124 GTY 0 AM39 MGTYTXN3_124 GTY 0 AN40 MGTYTXP2_124 GTY 0 AN41 MGTYTXN2_124 GTY 0 AP38 MGTYTXP1_124 GTY 0 AP39 MGTYTXN1_124 GTY 0 AR40 MGTYTXP0_124 GTY 0 AR41 MGTYTXN0_124 GTY 0 AM43 MGTYRXP3_124 GTY 0 'MGT_FO_CH_07_OUT_Hub_CMP' AM44 MGTYRXN3_124 GTY 0 'MGT_FO_CH_07_OUT_Hub_DIR' AN45 MGTYRXP2_124 GTY 0 'MGT_FO_CH_08_OUT_Hub_DIR' AN46 MGTYRXN2_124 GTY 0 'MGT_FO_CH_08_OUT_Hub_CMP' AP43 MGTYRXP1_124 GTY 0 'Combined_Data_from_OTHER_Hub_Cmp' AP44 MGTYRXN1_124 GTY 0 'Combined_Data_from_OTHER_Hub_Dir' AR45 MGTYRXP0_124 GTY 0 'Rec_MP_Fiber_8_to_FPGA_Dir' AR46 MGTYRXN0_124 GTY 0 'Rec_MP_Fiber_8_to_FPGA_Cmp' Super I/O Logic Pin Pin Name Type Region Hub Module Net Connection ---- -------- ---- ------ --------------------------- GTH Quad 233: ------------- A11 MGTHTXP3_233 GTH 1 'Comb_Data_to_Cap_to_FEX_09_Cmp' A10 MGTHTXN3_233 GTH 1 'Comb_Data_to_Cap_to_FEX_09_Dir' B9 MGTHTXP2_233 GTH 1 'Comb_Data_to_Cap_to_FEX_10_Cmp' B8 MGTHTXN2_233 GTH 1 'Comb_Data_to_Cap_to_FEX_10_Dir' C11 MGTHTXP1_233 GTH 1 C10 MGTHTXN1_233 GTH 1 D9 MGTHTXP0_233 GTH 1 D8 MGTHTXN0_233 GTH 1 A16 MGTHRXP3_233 GTH 1 'MGT_FO_CH_48_OUT_Hub_DIR' A15 MGTHRXN3_233 GTH 1 'MGT_FO_CH_48_OUT_Hub_CMP' B14 MGTHRXP2_233 GTH 1 'MGT_FO_CH_47_OUT_Hub_DIR' B13 MGTHRXN2_233 GTH 1 'MGT_FO_CH_47_OUT_Hub_CMP' C16 MGTHRXP1_233 GTH 1 'MGT_FO_CH_46_OUT_Hub_CMP' C15 MGTHRXN1_233 GTH 1 'MGT_FO_CH_46_OUT_Hub_DIR' D14 MGTHRXP0_233 GTH 1 'MGT_FO_CH_45_OUT_Hub_DIR' D13 MGTHRXN0_233 GTH 1 'MGT_FO_CH_45_OUT_Hub_CMP' GTH Quad 232: ------------- A7 MGTHTXP3_232 GTH 1 'Comb_Data_to_Cap_to_FEX_11_Cmp' A6 MGTHTXN3_232 GTH 1 'Comb_Data_to_Cap_to_FEX_11_Dir' C7 MGTHTXP2_232 GTH 1 C6 MGTHTXN2_232 GTH 1 E11 MGTHTXP1_232 GTH 1 E10 MGTHTXN1_232 GTH 1 E7 MGTHTXP0_232 GTH 1 E6 MGTHTXN0_232 GTH 1 B4 MGTHRXP3_232 GTH 1 'MGT_FO_CH_44_OUT_Hub_CMP' B3 MGTHRXN3_232 GTH 1 'MGT_FO_CH_44_OUT_Hub_DIR' C2 MGTHRXP2_232 GTH 1 'MGT_FO_CH_43_OUT_Hub_DIR' C1 MGTHRXN2_232 GTH 1 'MGT_FO_CH_43_OUT_Hub_CMP' D4 MGTHRXP1_232 GTH 1 'MGT_FO_CH_42_OUT_Hub_CMP' D3 MGTHRXN1_232 GTH 1 'MGT_FO_CH_42_OUT_Hub_DIR' E2 MGTHRXP0_232 GTH 1 'MGT_FO_CH_41_OUT_Hub_DIR' E1 MGTHRXN0_232 GTH 1 'MGT_FO_CH_41_OUT_Hub_CMP' GTH Quad 231: ------------- F13 MGTHTXP3_231 GTH 1 F12 MGTHTXN3_231 GTH 1 G11 MGTHTXP2_231 GTH 1 G10 MGTHTXN2_231 GTH 1 F9 MGTHTXP1_231 GTH 1 F8 MGTHTXN1_231 GTH 1 G7 MGTHTXP0_231 GTH 1 G6 MGTHTXN0_231 GTH 1 E16 MGTHRXP3_231 GTH 1 'MGT_FO_CH_34_OUT_Hub_CMP' E15 MGTHRXN3_231 GTH 1 'MGT_FO_CH_34_OUT_Hub_DIR' G16 MGTHRXP2_231 GTH 1 'MGT_FO_CH_33_OUT_Hub_DIR' G15 MGTHRXN2_231 GTH 1 'MGT_FO_CH_33_OUT_Hub_CMP' F4 MGTHRXP1_231 GTH 1 'MGT_FO_CH_56_OUT_Hub_CMP' F3 MGTHRXN1_231 GTH 1 'MGT_FO_CH_56_OUT_Hub_DIR' G2 MGTHRXP0_231 GTH 1 'MGT_FO_CH_55_OUT_Hub_DIR' G1 MGTHRXN0_231 GTH 1 'MGT_FO_CH_55_OUT_Hub_CMP' GTH Quad 230: ------------- H9 MGTHTXP3_230 GTH 1 H8 MGTHTXN3_230 GTH 1 J7 MGTHTXP2_230 GTH 1 'Comb_Data_to_Cap_to_FEX_12_Cmp' J6 MGTHTXN2_230 GTH 1 'Comb_Data_to_Cap_to_FEX_12_Dir' K9 MGTHTXP1_230 GTH 1 K8 MGTHTXN1_230 GTH 1 L7 MGTHTXP0_230 GTH 1 'Comb_Data_to_Cap_to_FEX_13_Cmp' L6 MGTHTXN0_230 GTH 1 'Comb_Data_to_Cap_to_FEX_13_Dir' H4 MGTHRXP3_230 GTH 1 'MGT_FO_CH_54_OUT_Hub_CMP' H3 MGTHRXN3_230 GTH 1 'MGT_FO_CH_54_OUT_Hub_DIR' J2 MGTHRXP2_230 GTH 1 'MGT_FO_CH_53_OUT_Hub_DIR' J1 MGTHRXN2_230 GTH 1 'MGT_FO_CH_53_OUT_Hub_CMP' K4 MGTHRXP1_230 GTH 1 'MGT_FO_CH_52_OUT_Hub_CMP' K3 MGTHRXN1_230 GTH 1 'MGT_FO_CH_52_OUT_Hub_DIR' L2 MGTHRXP0_230 GTH 1 'MGT_FO_CH_51_OUT_Hub_DIR' L1 MGTHRXN0_230 GTH 1 'MGT_FO_CH_51_OUT_Hub_CMP' GTH Quad 229: ------------- M9 MGTHTXP3_229 GTH 1 M8 MGTHTXN3_229 GTH 1 N7 MGTHTXP2_229 GTH 1 'Comb_Data_to_Cap_to_FEX_14_Cmp' N6 MGTHTXN2_229 GTH 1 'Comb_Data_to_Cap_to_FEX_14_Dir' P9 MGTHTXP1_229 GTH 1 P8 MGTHTXN1_229 GTH 1 R7 MGTHTXP0_229 GTH 1 'This_Hubs_RO_0_to_Cap_Its_ROD_Dir' R6 MGTHTXN0_229 GTH 1 'This_Hubs_RO_0_to_Cap_Its_ROD_Cmp' M4 MGTHRXP3_229 GTH 1 'MGT_FO_CH_50_OUT_Hub_CMP' M3 MGTHRXN3_229 GTH 1 'MGT_FO_CH_50_OUT_Hub_DIR' N2 MGTHRXP2_229 GTH 1 'MGT_FO_CH_49_OUT_Hub_DIR' N1 MGTHRXN2_229 GTH 1 'MGT_FO_CH_49_OUT_Hub_CMP' P4 MGTHRXP1_229 GTH 1 'MGT_FO_CH_64_OUT_Hub_CMP' P3 MGTHRXN1_229 GTH 1 'MGT_FO_CH_64_OUT_Hub_DIR' R2 MGTHRXP0_229 GTH 1 'MGT_FO_CH_63_OUT_Hub_DIR' R1 MGTHRXN0_229 GTH 1 'MGT_FO_CH_63_OUT_Hub_CMP' GTH Quad 228: ------------- T9 MGTHTXP3_228 GTH 0 T8 MGTHTXN3_228 GTH 0 U7 MGTHTXP2_228 GTH 0 'This_Hubs_RO_1_to_Cap_Its_ROD_Dir' U6 MGTHTXN2_228 GTH 0 'This_Hubs_RO_1_to_Cap_Its_ROD_Cmp' V9 MGTHTXP1_228 GTH 0 V8 MGTHTXN1_228 GTH 0 W7 MGTHTXP0_228 GTH 0 'Comb_Data_to_Cap_to_ROD_Dir' W6 MGTHTXN0_228 GTH 0 'Comb_Data_to_Cap_to_ROD_Cmp' T4 MGTHRXP3_228 GTH 0 'MGT_FO_CH_62_OUT_Hub_CMP' T3 MGTHRXN3_228 GTH 0 'MGT_FO_CH_62_OUT_Hub_DIR' U2 MGTHRXP2_228 GTH 0 'MGT_FO_CH_61_OUT_Hub_DIR' U1 MGTHRXN2_228 GTH 0 'MGT_FO_CH_61_OUT_Hub_CMP' V4 MGTHRXP1_228 GTH 0 'MGT_FO_CH_60_OUT_Hub_CMP' V3 MGTHRXN1_228 GTH 0 'MGT_FO_CH_60_OUT_Hub_DIR' W2 MGTHRXP0_228 GTH 0 'MGT_FO_CH_59_OUT_Hub_DIR' W1 MGTHRXN0_228 GTH 0 'MGT_FO_CH_59_OUT_Hub_CMP' GTH Quad 227: ------------- Y9 MGTHTXP3_227 GTH 0 Y8 MGTHTXN3_227 GTH 0 AA7 MGTHTXP2_227 GTH 0 'MiniPOD_Trans_Fiber_0_Data_Cmp' AA6 MGTHTXN2_227 GTH 0 'MiniPOD_Trans_Fiber_0_Data_Dir' AB9 MGTHTXP1_227 GTH 0 AB8 MGTHTXN1_227 GTH 0 AC7 MGTHTXP0_227 GTH 0 'MiniPOD_Trans_Fiber_1_Data_Cmp' AC6 MGTHTXN0_227 GTH 0 'MiniPOD_Trans_Fiber_1_Data_Dir' Y4 MGTHRXP3_227 GTH 0 'MGT_FO_CH_58_OUT_Hub_CMP' Y3 MGTHRXN3_227 GTH 0 'MGT_FO_CH_58_OUT_Hub_DIR' AA2 MGTHRXP2_227 GTH 0 'MGT_FO_CH_57_OUT_Hub_DIR' AA1 MGTHRXN2_227 GTH 0 'MGT_FO_CH_57_OUT_Hub_CMP' AB4 MGTHRXP1_227 GTH 0 'MGT_FO_CH_74_OUT_Hub_CMP' AB3 MGTHRXN1_227 GTH 0 'MGT_FO_CH_74_OUT_Hub_DIR' AC2 MGTHRXP0_227 GTH 0 'MGT_FO_CH_73_OUT_Hub_DIR' AC1 MGTHRXN0_227 GTH 0 'MGT_FO_CH_73_OUT_Hub_CMP' GTH Quad 226: ------------- AD9 MGTHTXP3_226 GTH 0 AD8 MGTHTXN3_226 GTH 0 AE7 MGTHTXP2_226 GTH 0 'MiniPOD_Trans_Fiber_2_Data_Dir' AE6 MGTHTXN2_226 GTH 0 'MiniPOD_Trans_Fiber_2_Data_Cmp' AF9 MGTHTXP1_226 GTH 0 AF8 MGTHTXN1_226 GTH 0 AG7 MGTHTXP0_226 GTH 0 'MiniPOD_Trans_Fiber_4_Data_Dir' AG6 MGTHTXN0_226 GTH 0 'MiniPOD_Trans_Fiber_4_Data_Cmp' AD4 MGTHRXP3_226 GTH 0 'MGT_FO_CH_72_OUT_Hub_CMP' AD3 MGTHRXN3_226 GTH 0 'MGT_FO_CH_72_OUT_Hub_DIR' AE2 MGTHRXP2_226 GTH 0 'MGT_FO_CH_71_OUT_Hub_DIR' AE1 MGTHRXN2_226 GTH 0 'MGT_FO_CH_71_OUT_Hub_CMP' AF4 MGTHRXP1_226 GTH 0 'MGT_FO_CH_70_OUT_Hub_CMP' AF3 MGTHRXN1_226 GTH 0 'MGT_FO_CH_70_OUT_Hub_DIR' AG2 MGTHRXP0_226 GTH 0 'MGT_FO_CH_69_OUT_Hub_DIR' AG1 MGTHRXN0_226 GTH 0 'MGT_FO_CH_69_OUT_Hub_CMP' GTH Quad 225: ------------- AH9 MGTHTXP3_225 GTH 0 AH8 MGTHTXN3_225 GTH 0 AJ7 MGTHTXP2_225 GTH 0 'MiniPOD_Trans_Fiber_6_Data_Dir' AJ6 MGTHTXN2_225 GTH 0 'MiniPOD_Trans_Fiber_6_Data_Cmp' AK9 MGTHTXP1_225 GTH 0 AK8 MGTHTXN1_225 GTH 0 AL7 MGTHTXP0_225 GTH 0 'MiniPOD_Trans_Fiber_8_Data_Dir' AL6 MGTHTXN0_225 GTH 0 'MiniPOD_Trans_Fiber_8_Data_Cmp' AH4 MGTHRXP3_225 GTH 0 'MGT_FO_CH_68_OUT_Hub_CMP' AH3 MGTHRXN3_225 GTH 0 'MGT_FO_CH_68_OUT_Hub_DIR' AJ2 MGTHRXP2_225 GTH 0 'MGT_FO_CH_67_OUT_Hub_DIR' AJ1 MGTHRXN2_225 GTH 0 'MGT_FO_CH_67_OUT_Hub_CMP' AK4 MGTHRXP1_225 GTH 0 'MGT_FO_CH_66_OUT_Hub_CMP' AK3 MGTHRXN1_225 GTH 0 'MGT_FO_CH_66_OUT_Hub_DIR' AL2 MGTHRXP0_225 GTH 0 'MGT_FO_CH_65_OUT_Hub_DIR' AL1 MGTHRXN0_225 GTH 0 'MGT_FO_CH_65_OUT_Hub_CMP' GTH Quad 224: ------------- AM9 MGTHTXP3_224 GTH 0 AM8 MGTHTXN3_224 GTH 0 AN7 MGTHTXP2_224 GTH 0 'MiniPOD_Trans_Fiber_10_Data_Dir' AN6 MGTHTXN2_224 GTH 0 'MiniPOD_Trans_Fiber_10_Data_Cmp' AP9 MGTHTXP1_224 GTH 0 AP8 MGTHTXN1_224 GTH 0 AR7 MGTHTXP0_224 GTH 0 'MiniPOD_Trans_Fiber_11_Data_Dir' AR6 MGTHTXN0_224 GTH 0 'MiniPOD_Trans_Fiber_11_Data_Cmp' AM4 MGTHRXP3_224 GTH 0 'This_RODs_Readout_Ctrl_to_GTH_Input_Cmp' AM3 MGTHRXN3_224 GTH 0 'This_RODs_Readout_Ctrl_to_GTH_Input_Dir' AN2 MGTHRXP2_224 GTH 0 'Rec_MP_Fiber_2_to_FPGA_Dir' AN1 MGTHRXN2_224 GTH 0 'Rec_MP_Fiber_2_to_FPGA_Cmp' AP4 MGTHRXP1_224 GTH 0 'Rec_MP_Fiber_4_to_FPGA_Dir' AP3 MGTHRXN1_224 GTH 0 'Rec_MP_Fiber_4_to_FPGA_Cmp' AR2 MGTHRXP0_224 GTH 0 'Rec_MP_Fiber_6_to_FPGA_Dir' AR1 MGTHRXN0_224 GTH 0 'Rec_MP_Fiber_6_to_FPGA_Cmp' Now list the Reference Clock inputs and the MGTAVTTRCAL_LC and MGTRREF_LC pin connections. All Quads that have MGTAVTTRCAL_LC and MGTRREF_LC pins have the appropriate resistors and supplies connected to them. These connections are listed in the nets file: ultra_dci_vref_mgt_calib_resistors_nets In this file I'm just listing the reference designators of the MGT Termination Calibration Resistors. Super I/O Logic Pin Pin Name Type Region Hub Module Net Connection ---- -------- ---- ------ --------------------------- GTY Quad 133: ------------- H34 MGTREFCLK1P_133 GTY 1 H35 MGTREFCLK1N_133 GTY 1 J36 MGTREFCLK0P_133 GTY 1 J37 MGTREFCLK0N_133 GTY 1 GTY Quad 132: ------------- K34 MGTREFCLK1P_132 GTY 1 'MHZ_320.64_COPY_2_DIR' K35 MGTREFCLK1N_132 GTY 1 'MHZ_320.64_COPY_2_CMP' L36 MGTREFCLK0P_132 GTY 1 L37 MGTREFCLK0N_132 GTY 1 GTY Quad 131: ------------- M34 MGTREFCLK1P_131 GTY 1 M35 MGTREFCLK1N_131 GTY 1 N36 MGTREFCLK0P_131 GTY 1 N37 MGTREFCLK0N_131 GTY 1 GTY Quad 130: ------------- P34 MGTREFCLK1P_130 GTY 1 P35 MGTREFCLK1N_130 GTY 1 R36 MGTREFCLK0P_130 GTY 1 'MHZ_320.64_COPY_1_DIR' R37 MGTREFCLK0N_130 GTY 1 'MHZ_320.64_COPY_1_CMP' D40 MGTAVTTRCAL_LN NA NA R114 D41 MGTRREF_LN NA NA R114 GTY Quad 129: ------------- T34 MGTREFCLK1P_129 GTY 1 T35 MGTREFCLK1N_129 GTY 1 U36 MGTREFCLK0P_129 GTY 1 U37 MGTREFCLK0N_129 GTY 1 GTY Quad 128: ------------- V34 MGTREFCLK1P_128 GTY 0 V35 MGTREFCLK1N_128 GTY 0 W36 MGTREFCLK0P_128 GTY 0 W37 MGTREFCLK0N_128 GTY 0 GTY Quad 127: ------------- Y34 MGTREFCLK1P_127 GTY 0 'MHZ_320.64_COPY_3_DIR' Y35 MGTREFCLK1N_127 GTY 0 'MHZ_320.64_COPY_3_CMP' AA36 MGTREFCLK0P_127 GTY 0 AA37 MGTREFCLK0N_127 GTY 0 GTY Quad 126: ------------- AB34 MGTREFCLK1P_126 GTY 0 AB35 MGTREFCLK1N_126 GTY 0 AC36 MGTREFCLK0P_126 GTY 0 AC37 MGTREFCLK0N_126 GTY 0 GTY Quad 125: ------------- AE36 MGTREFCLK0P_125 GTY 0 'MHZ_320.64_COPY_0_DIR' AE37 MGTREFCLK0N_125 GTY 0 'MHZ_320.64_COPY_0_CMP' AD34 MGTREFCLK1P_125 GTY 0 AD35 MGTREFCLK1N_125 GTY 0 AH40 MGTAVTTRCAL_LC NA NA R113 AH41 MGTRREF_LC NA NA R113 GTY Quad 124: ------------- AF34 MGTREFCLK1P_124 GTY 0 AF35 MGTREFCLK1N_124 GTY 0 AG36 MGTREFCLK0P_124 GTY 0 AG37 MGTREFCLK0N_124 GTY 0 Super I/O Logic Pin Pin Name Type Region Hub Module Net Connection ---- -------- ---- ------ --------------------------- GTH Quad 233: ------------- H13 MGTREFCLK1P_233 GTH 1 H12 MGTREFCLK1N_233 GTH 1 J11 MGTREFCLK0P_233 GTH 1 J10 MGTREFCLK0N_233 GTH 1 GTH Quad 232: ------------- K13 MGTREFCLK1P_232 GTH 1 'MHZ_320.64_COPY_7_DIR' K12 MGTREFCLK1N_232 GTH 1 'MHZ_320.64_COPY_7_CMP' L11 MGTREFCLK0P_232 GTH 1 L10 MGTREFCLK0N_232 GTH 1 GTH Quad 231: ------------- M13 MGTREFCLK1P_231 GTH 1 M12 MGTREFCLK1N_231 GTH 1 N11 MGTREFCLK0P_231 GTH 1 N10 MGTREFCLK0N_231 GTH 1 D6 MGTRREF_RN NA NA R116 D7 MGTAVTTRCAL_RN NA NA R116 GTH Quad 230: ------------- P13 MGTREFCLK1P_230 GTH 1 P12 MGTREFCLK1N_230 GTH 1 R11 MGTREFCLK0P_230 GTH 1 'MHZ_320.64_COPY_8_DIR' R10 MGTREFCLK0N_230 GTH 1 'MHZ_320.64_COPY_8_CMP' GTH Quad 229: ------------- T13 MGTREFCLK1P_229 GTH 1 T12 MGTREFCLK1N_229 GTH 1 U11 MGTREFCLK0P_229 GTH 1 U10 MGTREFCLK0N_229 GTH 1 GTH Quad 228: ------------- V13 MGTREFCLK1P_228 GTH 0 V12 MGTREFCLK1N_228 GTH 0 W11 MGTREFCLK0P_228 GTH 0 W10 MGTREFCLK0N_228 GTH 0 GTH Quad 227: ------------- Y13 MGTREFCLK1P_227 GTH 0 'MHZ_320.64_COPY_6_DIR' Y12 MGTREFCLK1N_227 GTH 0 'MHZ_320.64_COPY_6_CMP' AA11 MGTREFCLK0P_227 GTH 0 AA10 MGTREFCLK0N_227 GTH 0 GTH Quad 226: ------------- AB13 MGTREFCLK1P_226 GTH 0 AB12 MGTREFCLK1N_226 GTH 0 AC11 MGTREFCLK0P_226 GTH 0 AC10 MGTREFCLK0N_226 GTH 0 AH6 MGTRREF_RC NA NA R115 AH7 MGTAVTTRCAL_RC NA NA R115 GTH Quad 225: ------------- AD13 MGTREFCLK1P_225 GTH 0 AD12 MGTREFCLK1N_225 GTH 0 AE11 MGTREFCLK0P_225 GTH 0 'MHZ_320.64_COPY_9_DIR' AE10 MGTREFCLK0N_225 GTH 0 'MHZ_320.64_COPY_9_CMP' GTH Quad 224: ------------- AF13 MGTREFCLK1P_224 GTH 0 AF12 MGTREFCLK1N_224 GTH 0 AG11 MGTREFCLK0P_224 GTH 0 AG10 MGTREFCLK0N_224 GTH 0