Hub-Module  JTAG String
              ---------------------------


                                         Original Rev.  20-Nov-2015
                                          Current Rev.  18-Feb-2016


The Hub Module provides a front panel JTAG connection via
its J2 "Access Connector".  The layout of the Hub Module's
JTAG string is shown is drawing #33.

This JTAG string runs to components on both the ROD and Hub:

 - On the ROD this JTAG string connects
   only to the ROD's FPGA.

 - On the Hub this JTAG string connects
   only to the Hub's FPGA.

This JTAG string is  not  connected to either the IPMC's
"master" or "slave" JTAG ports.

Jumpers locations are provided so that the JTAG string can
be jumpered around the Hub's FPGA if necessary.

An automatic jumper is provided so that this JTAG string
jumpers around the ROD when the ROD Power Control signal #2
is not asserted.  Power Control #2 is the ROD's "Power Good"
signal.

Note that even though the Hub provides this automatic jumper
around the ROD for cases when the ROD is either not installed
or is installed but not yet powered up,  one will probably
still need to reset the JTAG string when a new device appears
on it or a device drops out.

The JTAG signal level at the Hub's from panel is 3V3
CMOS.  The pinout of the Hub front panel JTAG connection
is standard for Xilinx signal/ground pair type of JTAG
wiring and includes a fused 3V3 reference pin.

The front panel pinout and a typical JTAG cable setup to
plug a JTAG "pod" into the Hub's front panel access
connector is shown in drawing #44.

On the Hub Module the JTAG signals are buffered and
translated to 1V8 levels.  The JTAG signal level to the
ROD is 1.8 Volt.