Hub Module Drawing Number vs Source File --------------------------------- Original Rev. 21-Oct-2015 Current Rev. 30-Nov-2017 This file just lists all of the Hub Module drawings by their Drawing Number and then gives: - the name of the source file for this drawing in the /home2/designs/boards/Hub_0/Work/Drawings/ directory. - the status of this drawing, e.g. current, obsolete, ... - the filename of this drawing in the Hub web-site in the web directory: ww.pa.msu.edu/hep/atlas/l1calo/hub/hardware/drawings/ Drawing Number Source File Status Web FileName ------- ------------------------- -------- -------------------------------------- 1 hub_0_design_drawings.dgn Current 01_hub_clock_and_combined_data_distribution.pdf 2 hub_0_design_drawings.dgn Current 02_hub_readout_data_distribution.pdf 3 hub_0_design_drawings.dgn Current 03_hub_ethernet_switch_connections.pdf 4 hub_0_design_drawings.dgn Current 04_hub_ethernet_switch_details.pdf 5 hub_0_design_drawings.dgn Current 05_data_path_fex_hub_rod.pdf 6 hub_0_design_drawings.dgn Current 06_hub_atca_power_entry.pdf 7 hub_0_design_drawings.dgn Current 07_hub_isolated_12v_supply.pdf 8 hub_0_design_drawings.dgn Current 08_hub_ground_connections.pdf 9 hub_0_design_drawings.dgn Current 09_ipmc_general.pdf 10 hub_0_mechanical_drawings.dgn Obsolete - Never used on Hub web-site 11 hub_0_mechanical_drawings.dgn Current 11_front_panel_4_column_led.pdf 12 hub_0_mechanical_drawings.dgn Current 12_front_panel_1_column_led.pdf 13 hub_0_design_drawings.dgn Current 13_ipmc_hw_adrs_switch_ipmb.pdf 14 hub_0_design_drawings.dgn Current 14_ipmc_mgt_i2c_alarm_enb_leds.pdf 15 hub_0_design_drawings.dgn Current 15_hub_to_hub_backplane_connections.pdf 16 hub_0_design_drawings.dgn Current 16_ipmc_jtag_ethernet_sensor_i2c_user.pdf 17 hub_0_design_drawings.dgn Current 17_switch_clk_reset_md_loop_eeprom.pdf 18 hub_0_design_drawings.dgn Current 18_switch_power_ground_rdac.pdf 19 hub_0_design_drawings.dgn Current 19_switch_control_jumpers.pdf 20 hub_0_optical_modules.dgn Obsolete - Removed from the web. It had been: 20_sfp_plus_tcc_optical_module.pdf 21 hub_0_optical_modules.dgn Current 21_minipod_optical_modules.pdf 22 hub_0_gth_ports.dgn Current 22_gty_banks_11x_assignments.pdf 23 hub_0_gth_ports.dgn Current 23_gth_banks_21x_assignments.pdf 24 hub_0_power.dgn Current 24_hub_power_supplies_overall.pdf 25 hub_0_power.dgn Current 25_hub_sys_mon_reference_supply.pdf 26a hub_0_power.dgn Current 26a_hub_40_amp_dcdc_converter.pdf 26b hub_0_power.dgn Current 26b_hub_20_amp_dcdc_converter.pdf 26c hub_0_power.dgn Current 26c_hub_12_amp_dcdc_converter.pdf 27 hub_0_power.dgn Current 27_hub_linear_regulators.pdf 28 hub_0_power.dgn Current 28_hub_power_supply_startup.pdf 29 hub_0_power.dgn Current 29_hub_power_supply_shutdown.pdf 30 hub_0_power.dgn Current 30_hub_power_supply_control.pdf 30_Blk hub_0_power.dgn Current 30_blk_diag_power_supply_control.pdf 31 hub_0_power.dgn Current 31_power_supply_good_board_reset.pdf 31_Blk hub_0_power.dgn Current 30_blk_diag_power_good_and_reset.pdf 32 hub_0_power.dgn Current 32_reset_distribution_ROD_enable.pdf 33 hub_0_design_drawings.dgn Current 33_hub_JTAG_string.pdf 34 hub_0_design_drawings.dgn Current 34_phys_chip_power_clock_reset_led.pdf 35 hub_0_design_drawings.dgn Current 35_phys_chip_rgmii_mdc_mdio_base_t.pdf 36 hub_0_design_drawings.dgn Current 36_fpga_configuration_banks_0_65.pdf 37 hub_0_design_drawings.dgn Current 37_hub_module_sensor_i2c_bus.pdf 38 hub_0_design_drawings.dgn Current 38_fpga_dci_vref_mgt_calib_resistors.pdf 39 hub_0_clocks.dgn Current 39_hub_25_MHz_ethernet_clock.pdf 40a hub_0_clocks.dgn Current 40a_hub_48.08_MHz_lhc_clock_generation.pdf 40b hub_0_clocks.dgn Current 40b_hub_48.08_MHz_lhc_clock_distribution.pdf 41 hub_0_clocks.dgn Current 41_hub_320.64_MHz_lhc_clock_gen_and_dist.pdf 42 hub_0_power.dgn Current 42_ROD_present_smbalert_4_power_control.pdf 43 hub_0_design_drawings.dgn Current 43_hub_ethernet_magnetics.pdf 44 hub_0_cables.dgn Current 44_hub_fp_connectors_and_cables.pdf 45 hub_0_breakout_designs.dgn Current 45_hub_phys_fpga_breakout.jpg 46 hub_0_breakout_designs.dgn Current 46_hub_mgt_south_fpga_breakout.jpg 47 hub_0_breakout_designs.dgn --- 47_hub_mgt_east_fpga_breakout.jpg 48 hub_0_blocks_overall.dgn Current 48_hub_overall_block_diagram.pdf 49 hub_0_blocks_overall.dgn --- 49_hub_overall_I/O_diagram.pdf 50 hub_0_design_drawings.dgn Current 50_hub_front_panel_ROD_resources.pdf 51 Brian --- 51_blk_diag_power_system.pdf 52 hub_0_mgt_fanout.dgn Current 52_hub_fex_mgt_data_fanout_channel.pdf 53 hub_0_cables.dgn Current 53_hub_access_signals_and_spares.pdf 54 hub_0_power.dgn Current 54_ti_40400_standard_control_loop.pdf 55 hub_0_power.dgn Current 55_dcdc_20_amp_stardard_setup.pdf 56 hub_0_power.dgn Current 56_dcdc_20_amp_special_setup.pdf 57 hub_0_design_drawings.dgn Current 57_hub_plus_rod_sensor_i2c_bus.pdf 58 hub_0_design_drawings.dgn Current 58_hub_readout_data_connections.pdf