Release Process for the Hub Module Manufacturing Data ---------------------------------------------------------- Original Rev. 19-Sep-2016 Current Rev. 1-Feb-2017 This document is the instructions for generating all of the Manufacturing Data for the Hub Module. The files that make up this Manufacturing Data are typically all placed in a Release_x directory. This document contains the instructions to: - Generate the Bill of Materials - Generate the XY Component Placement Data - Generate the Back-Drill Data - Generate the pcb Fills - Generate the Drill Files for the PCB Through Holes - Generate the 24 Gerber Files - List of Miscellaneous Scripts to Run backdrill_most_change_back_drill_file_names.sh backdrill_zone2_change_back_drill_file_names.sh remove_most_ground_thermal_relief.sh remove_r255_r256_paste_stencil_openings.sh Generate the Bill of Materials: -------------------------------- 1. This whole process assumes that we running the design from a human written comps file that comes out of the directory: /home2/designs/boards/Hub_0/Work/Components/ 2. The first step is to hack-up this good normal human written comps file and make a special version of it. This is needed because for example: We don't want to tell the assembly house about Receiver and Transmitter MiniPODs rather we need to tell them about an 81 pin FCI connector. The top side and bottom side fanout chips have different geometries and this makes them different "company parts" in the Mentor generate BOM file but we want just one IC_NB7VQ14M part in the Bill of Materials. From the Tools directory.Run the script: make_special_comps_file_for_bom.sh The make_special_comps_file_for_bom.sh script does the following: - It makes a local copy of the full comps file that it gets from .../Hub_0/Work/Components/ - It makes the necessary edits on this local file. - Finally it passes this local file to Mentor in its directory: /home2/designs/boards/Hub_0/Hub_0_pcb/pcb Note: When you are finished generating the Mentor BOM file you need to restore the real comps file to the Mentor directory before running layout or anything like that. That is you need to run aaa_hub_0_data_path_comps.sh in the /home2/designs/boards/Hub_0/Work/Components directory. 3. Now from the Tools directory.run the script: generate_bill_of_materials.sh This runs the Mentor FabLink program and writes out a BOM file in the Text directory named: .../Hub_0/Work/Text/bill_of_materials_current.txt This script contains documentation about what information is put into the BOM file, i.e. only a subset of what Mentor can stick into the BOM file that it generates. 4. Start the cleanup of the BOM file as written by Mentor. Run the script: clean_up_bom_file.sh This script starts the BOM clean up by: Delete some of the Mentor header text Making some obvious substitutions, e.g. Tant_V_Case for Tant_D_THD Delete the first 4 space characters from all lines. Delete the trailing space characters from all lines. Finally this script copies the now some what cleaned up BOM into the main text directory as: ../Text/bill_of_materials_cleaned_current.txt and it finishes by deleting the temporary files that it has used to get the BOM to this point. 5. By hand edit the above "cleaned" BOM file in the main text directory to put the proper date and header at top of each bom section. In the Text directory I've kept a file called: bill_of_materials_headers.txt that contains just the headers that I've been using for the Hub Module BOM files. Before doing a lot of editing read through at least the first section of this file and make certain that random stuff has not snuk into the design, e.g. funny resistor values which cause a new component type to appear in the BOM. Does this current BOM looks similar the the previous one ? Continue editing by changing the format of how many spaces there are in and between columns as required. In the first section put a blank line between each part type. This finishes generating the Hub Fill of Materials. Recall that choosing to include or exclude from the BOM the various specialized value capacitors and resistors (e.g. in the DCDC Converters) is as simple as assigning them or not to use the _1sb version of the component (one solder blob version). Generate the XY Component Placement Data: ------------------------------------------ 1. This whole process assumes that we running the design from a human written comps file that comes out of the directory: /home2/designs/boards/Hub_0/Work/Components/ 2. From the Tools directory run the following script to make a special version of the components file: make_special_smd_installed_comps.sh Only the SMD components that the Assembly House will actually install are included in this special version of the comps file. Note that this special version of the comps file is NOT passed to Mentor so we do not need to worry about restoring the normal comps file to Mentor when this X,Y generation process is finished. While running this script it reports the total number of placements and the number of "component types" as used on both the Top and Bottom sides of the card. Running this script generates the following temporary files: temp_smd_top_side_comps_all_data.txt temp_smd_bot_side_comps_all_data.txt temp_smd_top_side_comps_list.txt temp_smd_bot_side_comps_list.txt temp_smd_top_side_comps_types.txt temp_smd_bot_side_comps_types.txt temp_smd_top_side_usage_counts.txt temp_smd_bot_side_usage_counts.txt Some of these temporaty files are used in the next step in generating the XY placement data. The two "usage" files provide the content for the twp "component counts" files that are sent to the assembly house. 3. From the Tools directory run the following script to make the XY placement data file generate_smd_xy_placement_data.sh This script makes the files: temp_top_smd_xy_place_data.txt and temp_bot_smd_xy_place_data.txt 4. Rename and Edit the "usage" and "xy_placement" files to make the versions that will actually be released to the assembly house. The editing work mainly involves adding a header and date as the body of the file is already rationally formated. Just delete the other unused temp files from the Tools directory once this editing work is finished. Generate the Back-Drill Data: ------------------------------ - update the BackDrillGen configuration files to target the current "official" Mentor traces file, i.e. edit: /home2/designs/boards/Hub_0/Work/Tools/BackDrillGen/BackDrillGen.cfg.Most /home2/designs/boards/Hub_0/Work/Tools/BackDrillGen/BackDrillGen.cfg.Zone2 - run the BackDrill file generator for "Most" of the board and separate its output into its own sub-directory cd /home2/designs/boards/Hub_0/Work/Tools/BackDrillGen python BackDrillGen.py -c BackDrillGen.cfg.Most mv BackDrillGen.log most_BackDrillGen.log mkdir Most_"current date" mv most_* ./Most_"current_date" Reminder: the files generated by the Most configurate file: > ls -1 Most_09_Dec_2016/ most_BackDrillGen.log most_drill_from_bot_keep_L16toL1.drl most_drill_from_bot_keep_L20toL1.drl most_drill_from_bot_keep_L5toL1.drl most_drill_from_bot_keep_L9toL1.drl most_drill_from_top_keep_L14toL22.drl most_drill_from_top_keep_L18toL22.drl most_drill_from_top_keep_L3toL22.drl most_drill_from_top_keep_L7toL22.drl most_mentor_check_backdrill.txt - run the BackDrill file generator for the "Zone2" area, i.e. run it with the Zone2 configuration file and then separate this output into its own sub-area cd /home2/designs/boards/Hub_0/Work/Tools/BackDrillGen python BackDrillGen.py -c BackDrillGen.cfg.Zone2 mv BackDrillGen.log zone2_BackDrillGen.log mkdir Zone2_"current_date" mv zone2_* Zone2_"current_date" Reminder: the files generated were > ls -1 Zone2_09_Dec_2016/ zone2_BackDrillGen.log zone2_drill_from_bot_keep_L10toL1.drl zone2_drill_from_bot_keep_L16toL1.drl zone2_drill_from_bot_keep_L20toL1.drl zone2_mentor_check_backdrill.txt - Now the two files of "Back-Drill Indicator Circles" for Mentor visual check need to be put into the pcb board geometry. cd /home2/designs/boards/Hub_0/Work/Geometries/Design_Hub_0_PCB/ edit: aa_hub_0_pcb_geom_build_it.sh so that it points to the Most_"current_date" and Zone2_"current_date" directories that you just created above. execute the aa_hub_0_pcb_geom_build_it.sh script to build a new version of the overall pcb ascii geometry file: aa_hub_0_pcb_geom replace aka restore this new version of the overall Hub pcb geometry file to the Hub's Mentor Geometry Library using either the Librarian or the .../Tools/replace_geometry.sh - Rename the Back-Drill files as described below under the Miscellaneous Scripts section and copy them to the release area. Generate the PCB Fills: ----------------------- Make sure that the correct good pre fill generation Traces file is in place and being pointed to by Mentor. Then run the script: generate_all_fills_on_all_layers.sh Note that this script calls 5 "sub scripts", one for each pcb layers that has fills on it. Each of these calls will cause Mentor to make a new version of the Traces file. --> You probably need to save (aka rename) your --> known good pre-fill Traces file after the first --> sub-script of fill generation has run so that --> Mentor does not purge it. The overall fill --> generation script provides a long pause for --> you to do this. Note that this Fill Generation process changes the pcb Design Rules. At the end of the fill generation process it restores a rational set of rules but when next working on the design after the Fill Generation Script has been run you may need to verify and correct the design rules that are in use. Note that this script reports any errors that happen while it is running. The fill generation script provides a pause between calling the sub-scripts so that there is a nice clean place to stop this fill generation sequence if you need to. You can run any one of the fill generation sub-scripts by itself if you need/want to. During production the intent is to end up with traces files: traces_official_pre_fill, traces_official_with_fills and then copy whichever one of these you need for your current work to the traces_xyz that is pointed to by the traces_attr attribute file. Generate the Drill Data: ------------------------ As the Hub Module does not have Blind Vias - we have just the Plated and non-Plated through hole drill files. Run the script: generate_drill_table_and_drill_files.sh Look at the simulation of the drill files to verify that you can account for all hole sizes, to record the drill counts, and to verify that two drill sizes are not right next to each other and thus should be concatenated. Generally I have renamed these two drill files by hand to: drill_through_hole_plated and drill_through_hole_unplated as these are nice complete names that the bare board house will recognize and that the Mentor drill simulator will also recognize. Generate the Gerber Files: -------------------------- Assume that you have already generated the Aperture Table and hand edited the Power Apertures as required. Do NOT overwrite the Aperture Table. One might think that it would be OK to generate the bulk of the gerber files (for all of the trace layers that do not include any Fills) before adding in the Fills to the traces file that is in use for gerber generation - but this is not so. First add all Fills to the Traces file and then generate the gerbers for the various trace layers. The Gerber generation process assumes that the Aperture Table is correctly setup the way that you want it both regular and power apertures. Then run the script: generate_gerber_all_24_plots_for_hub.sh Note that this script calls 12 or so "sub scripts", one for each set of gerber files that is being generated. Note that this script reports any missing apertures that it finds while it is running. There is a pause between calling the sub-scripts so there is a nice clean place to stop this sequence if that is needed. Post Gerber Generation ASCII Edits: Currently in the Hub Project there are two required post gerber generation ascii edits: one removes most of the Thermal Aperture flashes from the three negative data Ground Plane plots, and the section removes the R255 and R256 paste stencil flashes from the Bottom Paste Stencil plot. See below for more information about these two Gerber file Editing scrips. Note about generating Gerbers before Fills: Note that it is necessary the Fills before generating the Gerber plots even for the pcb layers that do not include fills. This is because some extra pads may occur if you generate gerber files for certain layers from a traces file that does not include the fills. This is because, before the fills are generated and in the traces file, the traces file does not know that a given net will eventually be connected to a fill, and the routing for a given trace may have gotten as far as a via that is going to a non surface layer, and the pad for that via may appear in your gerber for an internal layer. List of Miscellaneous Scripts to Run: ------------------------------------- After the Back-Drill, Fill, Drill, and Gerber data has been generated there are some sripts to run to put it into the final form that we want to release: backdrill_most_change_back_drill_file_names.sh and backdrill_zone2_change_back_drill_file_names.sh are copied to and then executed from the "Most" and "Zone2" sub-directories where you have placed the back-drill data that you just generated. These dumb scripts just rename the vaious back-drill files with standard filenames that indicate - That this is a Back-Drill file - Indicate if this is a Back-Drill for vias/pins based on a 0.25 mm or a 0.46 mm drills - Indicate whether these back-drills are from the Top or from the Bottom - Indicate the back-drill depth, i.e. which Layers must Remain Connected remove_most_ground_thermal_relief.sh This script is executed from the .../Tools sub-directory and it acts on the three Ground Plane gerber plots in the .../pcb/mfg/ sub-directory. It removes from the three Ground plane plots all of the Thermal Apertures except for the one that is used just for the hand install Geound-Loops aka Scope Loops. The result is to bury/flood all of the rest of the via and pin ground connections into these Ground Planes. remove_r255_r256_paste_stencil_openings.sh This script is executed from the .../Tools sub-directory and it acts on the Bottom Paste Stencil gerber plot in the .../pcb/mfg/ sub-directory. It removes from the Bottom Paste Stencil the openings for the not installed resistors R255 and R256 which are under the RJ45 connectors so that we do not want even their normal, "not installed one solder blob" of paste in these locations.