Interface to each FEX
              
  Interface with HUB 1 (i.e the HUB slot handling TTC control and IPbus network)

    Base Interface
      The 2 ports of Base Channel 1 (4 pairs of differential signals) of the base interface are used to provide a Gigabit Ethernet connection to be used by the FEX module for its IPbus port
      The usage of the ports on this channel follows the ATCA PICMG 3.0 specification for 1000BASE-T ethernet

    Fabric Interface
      The ports of the Fabric Interface Channel 1 are not used according to the ATCA convention and notation
      The 4 ports of Fabric Channel 1 (8 pairs of differential signals) are defined by ATCA as 4 trasmitting and 4 receiving pairs 
      HUB 1 is instead transmitting on only 2 of these pairs and receiving readout data from the FEX on the other 6 pairs 
      As seen from a FEX 
         The FEX is receiving the LHC clock on the receive signal pair of Fabric Interface Channel 1 port 0
           Note: this clock is provided by the TTC FMC mezanine on HUB 1.  
           This signal is meant to be received as a logic clock and not as data stream.
           It is not driven by an FPGA MGT Transceiver on the HUB and is not meant to be received by an MGT on a FEX.
         The FEX is receiving the combined TTC and ROD control data stream on the receive signal pair of Fabric Interface Channel 1 port 1
           Note: the TTC control information is provided by the TTC FMC mezanine on HUB 1.
           The two RODs on HUB 1 and HUB 2 may need to also send control information to the FEXs.
           This optional ROD control is merged with the TTC control data stream according to a format to be determined. 
         The FEX is sending its primary readout data streams 0-3 destined to the ROD on HUB 1 on the transmit signal pair of Fabric Interface Channel 1 port 0-3
         The FEX is SENDING its secondary readout data streams 4-5 destined to the ROD on HUB 1 on the RECEIVE signal pair of Fabric Interface Channel 1 port 2-3
 
  Interface with HUB 2 (i.e. the HUB slot handling the IPMC network)

    Base Interface
      The 2 ports of Base Channel 2 (4 pairs of differential signals) of the base interface are used to provide a Gigabit Ethernet connection to be used by the FEX module for its IPMC port
      The usage of the ports on this channel follows the ATCA PICMG 3.0 specification for 1000BASE-T ethernet

    Fabric Interface
      The ports of Fabric Interface channel 2 are not used according to the ATCA convention and notation
      The 4 ports of Fabric Channel 2 (8 pairs of differential signal) are defined by ATCA as 4 trasmitting and 4 receiving pairs 
      HUB 2 is instead transmitting nothing on 2 of these pairs and receiving readout data from the FEX on the other 6 pairs 
      As seen from a FEX 
         The receive signal pair of Fabric Interface Channel 2 port 0 is unused on the FEX
         The receive signal pair of Fabric Interface Channel 2 port 1 is unused on the FEX
         The FEX is sending its primary readout data streams 0-3 destined to the ROD on HUB 2 on the transmit signal pair of Fabric Interface Channel 2 port 0-3
         The FEX is SENDING its secondary readout data streams 4-5 destined to the ROD on HUB 2 on the RECEIVE signal pair of Fabric Interface Channel 2 port 2-3

HUB to HUB Interface

    Base Interface
      The Base Channel 1 is reserved for the Shelf Manager Controller and is unused
      The Base Channel 2 port (4 pairs of differential signals) is not currently allocated

    Fabric Interface
      The Fabric Interface channels are used according to the ATCA convention and notation with one caveat for HUB 2
      HUB 2 is transmitting nothing on its 2 of transmit pairs
      As seen from HUB 2 
         HUB 2 is receiving the LHC clock on the receive signal pair of Fabric Interface Channel 1 port 0
         HUB 2 is receiving the the combined TTC and ROD control data stream on the receive signal pair of Fabric Interface Channel 1 port 1
         HUB 2 is sending its readout data streams 0-1 destined to the ROD on HUB 1 on the transmit signal pair of Fabric Interface Channel 1 port 0-1

      As seen from HUB 1
         The receive signal pair of Fabric Interface Channel 1 port 0 is unused on HUB 1
         HUB 1 is receiving the readout control information from the ROD on HUB 2 on the receive signal pair of Fabric Interface Channel 1 port 1
         HUB 1 is sending its readout data streams 0-1 destined to the ROD on HUB 2 on the transmit signal pair of Fabric Interface Channel 1 port 0-1

    Update Channel Interface
      The first 4 ports of the Update Channel Interface are not used according to the ATCA convention and notation
      The 5 ports of the Update Channel (10 pairs of differential signal) are defined by ATCA as 5 trasmitting and 5 receiving pairs 
      The 4 Transmit pairs of Update Channel port 0-4 form one Gigabit Ethernet link and are connected to a Switch port of the HUB
      The 4 Receive pairs of Update Channel port 0-4 form one Gigabit Ethernet link and are connected to the HUB FPGA
      Note: the exact pin assignment of each port to the four 1000BASE-T signal pairs will be specified later and this assignement only involves the HUB.
      Note: this privides the required HUB FPGA on HUB 2 ehernet connection to the IPbus Network serviced by the switch on HUB 1.
      Note: the HUB FPGA on HUB 1 is already directly connected to IP bus Network switch on HUB 1 and simply ignores this additional ethernet port.
      The fifth port of the Update Channel Interface is not currently allocated


HUB to ROD Interface

    MGT channels (not: maximum 80 available on Virtex 7)
      Inputs to ROD

        12x 6 = 72 from FEX
        2x from local HUB FPGA
        2x from other HUB FPGA
        1x TTC and ROD control data stream

      Outputs from ROD

        1x Readout Control information to be merged with TTC control data stream

    LHC Clock

    Geographic Address

    IPbus port

    Power Supply

    Power Control

    I2C interface