# MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #1/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #1 # # The components in TOP side Channel #1 MGT Fanout are: # # U401 NB7VQ14M 4 way fanout chip # # C401:C404 100 nFd 0201 Output DC Blocking caps # # C405 10 nFd 0402 VRef Input ByPass cap # # C406 47 nFd 0402 Fanout VCC ByPass cap # C407 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U401-8 U401-13 NET 'FAN_1V8' C406-2 C407-2 NET 'GROUND' U401-16 NET 'GROUND' C406-1 C407-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_1' U401-2 U401-3 NET 'MGT_FO_CMR_CH_1' C405-1 NET 'GROUND' C405-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_1_IN_DIR' U401-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_1_IN_CMP' U401-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_1_OCP_ROD_DIR' U401-10 C403-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_1_OCP_ROD_CMP' U401-9 C404-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_1_OCP_HUB_DIR' U401-12 C401-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_1_OCP_HUB_CMP' U401-11 C402-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_1_OUT_ROD_DIR' C403-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_1_OUT_ROD_CMP' C404-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_1_OUT_HUB_DIR' C401-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_1_OUT_HUB_CMP' C402-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_1_Pin_6' U401-6 NET 'No_Conn_FO_CH_1_Pin_7' U401-7 NET 'No_Conn_FO_CH_1_Pin_14' U401-14 NET 'No_Conn_FO_CH_1_Pin_15' U401-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_1_OUT_ROD_DIR' DPV403-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_1_OUT_ROD_CMP' DPV403-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV403-1 DPV403-4 NET 'MGT_FO_CH_1_IN_DIR' DPV401-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_1_IN_CMP' DPV401-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV401-1 # # MGT FanOut Channel #2 # # # The components in BOTTOM side Channel #2 MGT Fanout are: # # U402 NB7VQ14M 4 way fanout chip # # C408:C411 100 nFd 0201 Output DC Blocking caps # # C412 10 nFd 0402 VRef Input ByPass cap # # C413 47 nFd 0402 Fanout VCC ByPass cap # C414 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U402-8 U402-13 NET 'FAN_1V8' C413-2 C414-1 NET 'GROUND' U402-16 NET 'GROUND' C413-1 C414-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_2' U402-2 U402-3 NET 'MGT_FO_CMR_CH_2' C412-1 NET 'GROUND' C412-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_2_IN_DIR' U402-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_IN_CMP' U402-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_2_OCP_HUB_DIR' U402-10 C410-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_OCP_HUB_CMP' U402-9 C411-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_OCP_ROD_DIR' U402-12 C408-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_OCP_ROD_CMP' U402-11 C409-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_2_OUT_HUB_DIR' C410-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_OUT_HUB_CMP' C411-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_OUT_ROD_DIR' C408-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_OUT_ROD_CMP' C409-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_2_Pin_6' U402-6 NET 'No_Conn_FO_CH_2_Pin_7' U402-7 NET 'No_Conn_FO_CH_2_Pin_14' U402-14 NET 'No_Conn_FO_CH_2_Pin_15' U402-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_2_OUT_ROD_DIR' DPV406-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_OUT_ROD_CMP' DPV406-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV406-1 DPV406-4 NET 'MGT_FO_CH_2_OUT_HUB_DIR' DPV405-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_OUT_HUB_CMP' DPV405-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV405-1 NET 'MGT_FO_CH_2_IN_DIR' DPV404-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_IN_CMP' DPV404-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV404-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #2/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #3 # # The components in TOP side Channel #3 MGT Fanout are: # # U403 NB7VQ14M 4 way fanout chip # # C415:C418 100 nFd 0201 Output DC Blocking caps # # C419 10 nFd 0402 VRef Input ByPass cap # # C420 47 nFd 0402 Fanout VCC ByPass cap # C421 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U403-8 U403-13 NET 'FAN_1V8' C420-2 C421-2 NET 'GROUND' U403-16 NET 'GROUND' C420-1 C421-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_3' U403-2 U403-3 NET 'MGT_FO_CMR_CH_3' C419-1 NET 'GROUND' C419-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_3_IN_DIR' U403-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_IN_CMP' U403-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_3_OCP_ROD_DIR' U403-10 C417-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_OCP_ROD_CMP' U403-9 C418-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_OCP_HUB_DIR' U403-12 C415-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_OCP_HUB_CMP' U403-11 C416-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_3_OUT_ROD_DIR' C417-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_OUT_ROD_CMP' C418-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_OUT_HUB_DIR' C415-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_OUT_HUB_CMP' C416-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_3_Pin_6' U403-6 NET 'No_Conn_FO_CH_3_Pin_7' U403-7 NET 'No_Conn_FO_CH_3_Pin_14' U403-14 NET 'No_Conn_FO_CH_3_Pin_15' U403-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_3_OUT_ROD_DIR' DPV409-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_OUT_ROD_CMP' DPV409-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV409-1 DPV409-4 NET 'MGT_FO_CH_3_OUT_HUB_DIR' DPV408-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_OUT_HUB_CMP' DPV408-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV408-1 NET 'MGT_FO_CH_3_IN_DIR' DPV407-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_IN_CMP' DPV407-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV407-1 # # MGT FanOut Channel #4 # # # The components in BOTTOM side Channel #4 MGT Fanout are: # # U404 NB7VQ14M 4 way fanout chip # # C422:C425 100 nFd 0201 Output DC Blocking caps # # C426 10 nFd 0402 VRef Input ByPass cap # # C427 47 nFd 0402 Fanout VCC ByPass cap # C428 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U404-8 U404-13 NET 'FAN_1V8' C427-2 C428-1 NET 'GROUND' U404-16 NET 'GROUND' C427-1 C428-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_4' U404-2 U404-3 NET 'MGT_FO_CMR_CH_4' C426-1 NET 'GROUND' C426-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_4_IN_DIR' U404-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_IN_CMP' U404-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_4_OCP_HUB_DIR' U404-10 C424-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_OCP_HUB_CMP' U404-9 C425-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_OCP_ROD_DIR' U404-12 C422-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_OCP_ROD_CMP' U404-11 C423-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_4_OUT_HUB_DIR' C424-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_OUT_HUB_CMP' C425-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_OUT_ROD_DIR' C422-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_OUT_ROD_CMP' C423-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_4_Pin_6' U404-6 NET 'No_Conn_FO_CH_4_Pin_7' U404-7 NET 'No_Conn_FO_CH_4_Pin_14' U404-14 NET 'No_Conn_FO_CH_4_Pin_15' U404-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_4_OUT_ROD_DIR' DPV412-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_OUT_ROD_CMP' DPV412-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV412-1 DPV412-4 NET 'MGT_FO_CH_4_OUT_HUB_DIR' DPV411-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_OUT_HUB_CMP' DPV411-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV411-1 NET 'MGT_FO_CH_4_IN_DIR' DPV410-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_IN_CMP' DPV410-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV410-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #3/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #5 # # The components in TOP side Channel #5 MGT Fanout are: # # U405 NB7VQ14M 4 way fanout chip # # C429:C432 100 nFd 0201 Output DC Blocking caps # # C433 10 nFd 0402 VRef Input ByPass cap # # C434 47 nFd 0402 Fanout VCC ByPass cap # C435 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U405-8 U405-13 NET 'FAN_1V8' C434-2 C435-2 NET 'GROUND' U405-16 NET 'GROUND' C434-1 C435-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_5' U405-2 U405-3 NET 'MGT_FO_CMR_CH_5' C433-1 NET 'GROUND' C433-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_5_IN_DIR' U405-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_IN_CMP' U405-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_5_OCP_ROD_DIR' U405-10 C431-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_OCP_ROD_CMP' U405-9 C432-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_OCP_HUB_DIR' U405-12 C429-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_OCP_HUB_CMP' U405-11 C430-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_5_OUT_ROD_DIR' C431-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_OUT_ROD_CMP' C432-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_OUT_HUB_DIR' C429-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_OUT_HUB_CMP' C430-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_5_Pin_6' U405-6 NET 'No_Conn_FO_CH_5_Pin_7' U405-7 NET 'No_Conn_FO_CH_5_Pin_14' U405-14 NET 'No_Conn_FO_CH_5_Pin_15' U405-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_5_OUT_ROD_DIR' DPV415-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_OUT_ROD_CMP' DPV415-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV415-1 DPV415-4 NET 'MGT_FO_CH_5_OUT_HUB_DIR' DPV414-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_OUT_HUB_CMP' DPV414-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV414-1 NET 'MGT_FO_CH_5_IN_DIR' DPV413-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_IN_CMP' DPV413-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV413-1 # # MGT FanOut Channel #6 # # # The components in BOTTOM side Channel #6 MGT Fanout are: # # U406 NB7VQ14M 4 way fanout chip # # C436:C439 100 nFd 0201 Output DC Blocking caps # # C440 10 nFd 0402 VRef Input ByPass cap # # C441 47 nFd 0402 Fanout VCC ByPass cap # C442 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U406-8 U406-13 NET 'FAN_1V8' C441-2 C442-1 NET 'GROUND' U406-16 NET 'GROUND' C441-1 C442-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_6' U406-2 U406-3 NET 'MGT_FO_CMR_CH_6' C440-1 NET 'GROUND' C440-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_6_IN_DIR' U406-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_IN_CMP' U406-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_6_OCP_HUB_DIR' U406-10 C438-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_OCP_HUB_CMP' U406-9 C439-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_OCP_ROD_DIR' U406-12 C436-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_OCP_ROD_CMP' U406-11 C437-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_6_OUT_HUB_DIR' C438-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_OUT_HUB_CMP' C439-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_OUT_ROD_DIR' C436-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_OUT_ROD_CMP' C437-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_6_Pin_6' U406-6 NET 'No_Conn_FO_CH_6_Pin_7' U406-7 NET 'No_Conn_FO_CH_6_Pin_14' U406-14 NET 'No_Conn_FO_CH_6_Pin_15' U406-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_6_OUT_ROD_DIR' DPV418-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_OUT_ROD_CMP' DPV418-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV418-1 DPV418-4 NET 'MGT_FO_CH_6_OUT_HUB_DIR' DPV417-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_OUT_HUB_CMP' DPV417-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV417-1 NET 'MGT_FO_CH_6_IN_DIR' DPV416-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_IN_CMP' DPV416-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV416-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #4/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #7 # # The components in TOP side Channel #7 MGT Fanout are: # # U407 NB7VQ14M 4 way fanout chip # # C443:C446 100 nFd 0201 Output DC Blocking caps # # C447 10 nFd 0402 VRef Input ByPass cap # # C448 47 nFd 0402 Fanout VCC ByPass cap # C449 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U407-8 U407-13 NET 'FAN_1V8' C448-2 C449-2 NET 'GROUND' U407-16 NET 'GROUND' C448-1 C449-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_7' U407-2 U407-3 NET 'MGT_FO_CMR_CH_7' C447-1 NET 'GROUND' C447-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_7_IN_DIR' U407-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_7_IN_CMP' U407-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_7_OCP_ROD_DIR' U407-10 C445-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_7_OCP_ROD_CMP' U407-9 C446-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_7_OCP_HUB_DIR' U407-12 C443-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_7_OCP_HUB_CMP' U407-11 C444-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_7_OUT_ROD_DIR' C445-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_7_OUT_ROD_CMP' C446-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_7_OUT_HUB_DIR' C443-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_7_OUT_HUB_CMP' C444-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_7_Pin_6' U407-6 NET 'No_Conn_FO_CH_7_Pin_7' U407-7 NET 'No_Conn_FO_CH_7_Pin_14' U407-14 NET 'No_Conn_FO_CH_7_Pin_15' U407-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_7_OUT_ROD_DIR' DPV421-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_7_OUT_ROD_CMP' DPV421-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV421-1 DPV421-4 NET 'MGT_FO_CH_7_OUT_HUB_DIR' DPV420-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_7_OUT_HUB_CMP' DPV420-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV420-1 NET 'MGT_FO_CH_7_IN_DIR' DPV419-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_7_IN_CMP' DPV419-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV419-1 # # MGT FanOut Channel #8 # # # The components in BOTTOM side Channel #8 MGT Fanout are: # # U408 NB7VQ14M 4 way fanout chip # # C450:C453 100 nFd 0201 Output DC Blocking caps # # C454 10 nFd 0402 VRef Input ByPass cap # # C455 47 nFd 0402 Fanout VCC ByPass cap # C456 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U408-8 U408-13 NET 'FAN_1V8' C455-2 C456-1 NET 'GROUND' U408-16 NET 'GROUND' C455-1 C456-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_8' U408-2 U408-3 NET 'MGT_FO_CMR_CH_8' C454-1 NET 'GROUND' C454-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_8_IN_DIR' U408-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_8_IN_CMP' U408-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_8_OCP_HUB_DIR' U408-10 C452-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_8_OCP_HUB_CMP' U408-9 C453-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_8_OCP_ROD_DIR' U408-12 C450-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_8_OCP_ROD_CMP' U408-11 C451-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_8_OUT_HUB_DIR' C452-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_8_OUT_HUB_CMP' C453-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_8_OUT_ROD_DIR' C450-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_8_OUT_ROD_CMP' C451-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_8_Pin_6' U408-6 NET 'No_Conn_FO_CH_8_Pin_7' U408-7 NET 'No_Conn_FO_CH_8_Pin_14' U408-14 NET 'No_Conn_FO_CH_8_Pin_15' U408-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_8_OUT_ROD_DIR' DPV424-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_8_OUT_ROD_CMP' DPV424-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV424-1 DPV424-4 NET 'MGT_FO_CH_8_OUT_HUB_DIR' DPV423-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_8_OUT_HUB_CMP' DPV423-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV423-1 NET 'MGT_FO_CH_8_IN_DIR' DPV422-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_8_IN_CMP' DPV422-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV422-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #5/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #9 # # The components in TOP side Channel #9 MGT Fanout are: # # U409 NB7VQ14M 4 way fanout chip # # C457:C460 100 nFd 0201 Output DC Blocking caps # # C461 10 nFd 0402 VRef Input ByPass cap # # C462 47 nFd 0402 Fanout VCC ByPass cap # C463 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U409-8 U409-13 NET 'FAN_1V8' C462-2 C463-2 NET 'GROUND' U409-16 NET 'GROUND' C462-1 C463-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_9' U409-2 U409-3 NET 'MGT_FO_CMR_CH_9' C461-1 NET 'GROUND' C461-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_9_IN_DIR' U409-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_9_IN_CMP' U409-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_9_OCP_ROD_DIR' U409-10 C459-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_9_OCP_ROD_CMP' U409-9 C460-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_9_OCP_HUB_DIR' U409-12 C457-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_9_OCP_HUB_CMP' U409-11 C458-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_9_OUT_ROD_DIR' C459-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_9_OUT_ROD_CMP' C460-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_9_OUT_HUB_DIR' C457-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_9_OUT_HUB_CMP' C458-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_9_Pin_6' U409-6 NET 'No_Conn_FO_CH_9_Pin_7' U409-7 NET 'No_Conn_FO_CH_9_Pin_14' U409-14 NET 'No_Conn_FO_CH_9_Pin_15' U409-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_9_OUT_ROD_DIR' DPV427-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_9_OUT_ROD_CMP' DPV427-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV427-1 DPV427-4 NET 'MGT_FO_CH_9_IN_DIR' DPV425-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_9_IN_CMP' DPV425-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV425-1 # # MGT FanOut Channel #10 # # # The components in BOTTOM side Channel #10 MGT Fanout are: # # U410 NB7VQ14M 4 way fanout chip # # C464:C467 100 nFd 0201 Output DC Blocking caps # # C468 10 nFd 0402 VRef Input ByPass cap # # C469 47 nFd 0402 Fanout VCC ByPass cap # C470 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U410-8 U410-13 NET 'FAN_1V8' C469-2 C470-1 NET 'GROUND' U410-16 NET 'GROUND' C469-1 C470-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_10' U410-2 U410-3 NET 'MGT_FO_CMR_CH_10' C468-1 NET 'GROUND' C468-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_10_IN_DIR' U410-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_IN_CMP' U410-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_10_OCP_HUB_DIR' U410-10 C466-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_OCP_HUB_CMP' U410-9 C467-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_OCP_ROD_DIR' U410-12 C464-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_OCP_ROD_CMP' U410-11 C465-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_10_OUT_HUB_DIR' C466-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_OUT_HUB_CMP' C467-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_OUT_ROD_DIR' C464-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_OUT_ROD_CMP' C465-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_10_Pin_6' U410-6 NET 'No_Conn_FO_CH_10_Pin_7' U410-7 NET 'No_Conn_FO_CH_10_Pin_14' U410-14 NET 'No_Conn_FO_CH_10_Pin_15' U410-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_10_OUT_ROD_DIR' DPV430-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_OUT_ROD_CMP' DPV430-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV430-1 DPV430-4 NET 'MGT_FO_CH_10_OUT_HUB_DIR' DPV429-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_OUT_HUB_CMP' DPV429-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV429-1 NET 'MGT_FO_CH_10_IN_DIR' DPV428-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_IN_CMP' DPV428-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV428-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #6/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #11 # # The components in TOP side Channel #11 MGT Fanout are: # # U411 NB7VQ14M 4 way fanout chip # # C471:C474 100 nFd 0201 Output DC Blocking caps # # C475 10 nFd 0402 VRef Input ByPass cap # # C476 47 nFd 0402 Fanout VCC ByPass cap # C477 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U411-8 U411-13 NET 'FAN_1V8' C476-2 C477-2 NET 'GROUND' U411-16 NET 'GROUND' C476-1 C477-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_11' U411-2 U411-3 NET 'MGT_FO_CMR_CH_11' C475-1 NET 'GROUND' C475-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_11_IN_DIR' U411-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_IN_CMP' U411-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_11_OCP_ROD_DIR' U411-10 C473-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_OCP_ROD_CMP' U411-9 C474-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_OCP_HUB_DIR' U411-12 C471-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_OCP_HUB_CMP' U411-11 C472-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_11_OUT_ROD_DIR' C473-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_OUT_ROD_CMP' C474-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_OUT_HUB_DIR' C471-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_OUT_HUB_CMP' C472-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_11_Pin_6' U411-6 NET 'No_Conn_FO_CH_11_Pin_7' U411-7 NET 'No_Conn_FO_CH_11_Pin_14' U411-14 NET 'No_Conn_FO_CH_11_Pin_15' U411-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_11_OUT_ROD_DIR' DPV433-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_OUT_ROD_CMP' DPV433-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV433-1 DPV433-4 NET 'MGT_FO_CH_11_OUT_HUB_DIR' DPV432-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_OUT_HUB_CMP' DPV432-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV432-1 NET 'MGT_FO_CH_11_IN_DIR' DPV431-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_IN_CMP' DPV431-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV431-1 # # MGT FanOut Channel #12 # # # The components in BOTTOM side Channel #12 MGT Fanout are: # # U412 NB7VQ14M 4 way fanout chip # # C478:C481 100 nFd 0201 Output DC Blocking caps # # C482 10 nFd 0402 VRef Input ByPass cap # # C483 47 nFd 0402 Fanout VCC ByPass cap # C484 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U412-8 U412-13 NET 'FAN_1V8' C483-2 C484-1 NET 'GROUND' U412-16 NET 'GROUND' C483-1 C484-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_12' U412-2 U412-3 NET 'MGT_FO_CMR_CH_12' C482-1 NET 'GROUND' C482-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_12_IN_DIR' U412-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_IN_CMP' U412-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_12_OCP_HUB_DIR' U412-10 C480-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_OCP_HUB_CMP' U412-9 C481-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_OCP_ROD_DIR' U412-12 C478-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_OCP_ROD_CMP' U412-11 C479-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_12_OUT_HUB_DIR' C480-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_OUT_HUB_CMP' C481-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_OUT_ROD_DIR' C478-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_OUT_ROD_CMP' C479-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_12_Pin_6' U412-6 NET 'No_Conn_FO_CH_12_Pin_7' U412-7 NET 'No_Conn_FO_CH_12_Pin_14' U412-14 NET 'No_Conn_FO_CH_12_Pin_15' U412-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_12_OUT_ROD_DIR' DPV436-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_OUT_ROD_CMP' DPV436-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV436-1 DPV436-4 NET 'MGT_FO_CH_12_OUT_HUB_DIR' DPV435-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_OUT_HUB_CMP' DPV435-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV435-1 NET 'MGT_FO_CH_12_IN_DIR' DPV434-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_IN_CMP' DPV434-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV434-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #7/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #13 # # The components in TOP side Channel #13 MGT Fanout are: # # U413 NB7VQ14M 4 way fanout chip # # C485:C488 100 nFd 0201 Output DC Blocking caps # # C489 10 nFd 0402 VRef Input ByPass cap # # C490 47 nFd 0402 Fanout VCC ByPass cap # C491 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U413-8 U413-13 NET 'FAN_1V8' C490-2 C491-2 NET 'GROUND' U413-16 NET 'GROUND' C490-1 C491-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_13' U413-2 U413-3 NET 'MGT_FO_CMR_CH_13' C489-1 NET 'GROUND' C489-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_13_IN_DIR' U413-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_13_IN_CMP' U413-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_13_OCP_ROD_DIR' U413-10 C487-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_13_OCP_ROD_CMP' U413-9 C488-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_13_OCP_HUB_DIR' U413-12 C485-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_13_OCP_HUB_CMP' U413-11 C486-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_13_OUT_ROD_DIR' C487-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_13_OUT_ROD_CMP' C488-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_13_OUT_HUB_DIR' C485-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_13_OUT_HUB_CMP' C486-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_13_Pin_6' U413-6 NET 'No_Conn_FO_CH_13_Pin_7' U413-7 NET 'No_Conn_FO_CH_13_Pin_14' U413-14 NET 'No_Conn_FO_CH_13_Pin_15' U413-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_13_OUT_ROD_DIR' DPV439-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_13_OUT_ROD_CMP' DPV439-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV439-1 DPV439-4 NET 'MGT_FO_CH_13_OUT_HUB_DIR' DPV438-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_13_OUT_HUB_CMP' DPV438-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV438-1 NET 'MGT_FO_CH_13_IN_DIR' DPV437-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_13_IN_CMP' DPV437-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV437-1 # # MGT FanOut Channel #14 # # # The components in BOTTOM side Channel #14 MGT Fanout are: # # U414 NB7VQ14M 4 way fanout chip # # C492:C495 100 nFd 0201 Output DC Blocking caps # # C496 10 nFd 0402 VRef Input ByPass cap # # C497 47 nFd 0402 Fanout VCC ByPass cap # C498 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U414-8 U414-13 NET 'FAN_1V8' C497-2 C498-1 NET 'GROUND' U414-16 NET 'GROUND' C497-1 C498-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_14' U414-2 U414-3 NET 'MGT_FO_CMR_CH_14' C496-1 NET 'GROUND' C496-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_14_IN_DIR' U414-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_IN_CMP' U414-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_14_OCP_HUB_DIR' U414-10 C494-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_OCP_HUB_CMP' U414-9 C495-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_OCP_ROD_DIR' U414-12 C492-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_OCP_ROD_CMP' U414-11 C493-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_14_OUT_HUB_DIR' C494-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_OUT_HUB_CMP' C495-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_OUT_ROD_DIR' C492-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_OUT_ROD_CMP' C493-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_14_Pin_6' U414-6 NET 'No_Conn_FO_CH_14_Pin_7' U414-7 NET 'No_Conn_FO_CH_14_Pin_14' U414-14 NET 'No_Conn_FO_CH_14_Pin_15' U414-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_14_OUT_ROD_DIR' DPV442-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_OUT_ROD_CMP' DPV442-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV442-1 DPV442-4 NET 'MGT_FO_CH_14_OUT_HUB_DIR' DPV441-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_OUT_HUB_CMP' DPV441-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV441-1 NET 'MGT_FO_CH_14_IN_DIR' DPV440-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_IN_CMP' DPV440-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV440-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #8/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #15 # # The components in TOP side Channel #15 MGT Fanout are: # # U415 NB7VQ14M 4 way fanout chip # # C499:C502 100 nFd 0201 Output DC Blocking caps # # C503 10 nFd 0402 VRef Input ByPass cap # # C504 47 nFd 0402 Fanout VCC ByPass cap # C505 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U415-8 U415-13 NET 'FAN_1V8' C504-2 C505-2 NET 'GROUND' U415-16 NET 'GROUND' C504-1 C505-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_15' U415-2 U415-3 NET 'MGT_FO_CMR_CH_15' C503-1 NET 'GROUND' C503-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_15_IN_DIR' U415-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_IN_CMP' U415-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_15_OCP_ROD_DIR' U415-10 C501-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_OCP_ROD_CMP' U415-9 C502-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_OCP_HUB_DIR' U415-12 C499-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_OCP_HUB_CMP' U415-11 C500-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_15_OUT_ROD_DIR' C501-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_OUT_ROD_CMP' C502-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_OUT_HUB_DIR' C499-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_OUT_HUB_CMP' C500-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_15_Pin_6' U415-6 NET 'No_Conn_FO_CH_15_Pin_7' U415-7 NET 'No_Conn_FO_CH_15_Pin_14' U415-14 NET 'No_Conn_FO_CH_15_Pin_15' U415-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_15_OUT_ROD_DIR' DPV445-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_OUT_ROD_CMP' DPV445-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV445-1 DPV445-4 NET 'MGT_FO_CH_15_OUT_HUB_DIR' DPV444-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_OUT_HUB_CMP' DPV444-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV444-1 NET 'MGT_FO_CH_15_IN_DIR' DPV443-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_IN_CMP' DPV443-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV443-1 # # MGT FanOut Channel #16 # # # The components in BOTTOM side Channel #16 MGT Fanout are: # # U416 NB7VQ14M 4 way fanout chip # # C506:C509 100 nFd 0201 Output DC Blocking caps # # C510 10 nFd 0402 VRef Input ByPass cap # # C511 47 nFd 0402 Fanout VCC ByPass cap # C512 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U416-8 U416-13 NET 'FAN_1V8' C511-2 C512-1 NET 'GROUND' U416-16 NET 'GROUND' C511-1 C512-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_16' U416-2 U416-3 NET 'MGT_FO_CMR_CH_16' C510-1 NET 'GROUND' C510-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_16_IN_DIR' U416-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_IN_CMP' U416-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_16_OCP_HUB_DIR' U416-10 C508-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_OCP_HUB_CMP' U416-9 C509-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_OCP_ROD_DIR' U416-12 C506-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_OCP_ROD_CMP' U416-11 C507-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_16_OUT_HUB_DIR' C508-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_OUT_HUB_CMP' C509-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_OUT_ROD_DIR' C506-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_OUT_ROD_CMP' C507-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_16_Pin_6' U416-6 NET 'No_Conn_FO_CH_16_Pin_7' U416-7 NET 'No_Conn_FO_CH_16_Pin_14' U416-14 NET 'No_Conn_FO_CH_16_Pin_15' U416-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_16_OUT_ROD_DIR' DPV448-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_OUT_ROD_CMP' DPV448-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV448-1 DPV448-4 NET 'MGT_FO_CH_16_OUT_HUB_DIR' DPV447-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_OUT_HUB_CMP' DPV447-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV447-1 NET 'MGT_FO_CH_16_IN_DIR' DPV446-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_IN_CMP' DPV446-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV446-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #9/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #17 # # The components in TOP side Channel #17 MGT Fanout are: # # U417 NB7VQ14M 4 way fanout chip # # C513:C516 100 nFd 0201 Output DC Blocking caps # # C517 10 nFd 0402 VRef Input ByPass cap # # C518 47 nFd 0402 Fanout VCC ByPass cap # C519 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U417-8 U417-13 NET 'FAN_1V8' C518-2 C519-2 NET 'GROUND' U417-16 NET 'GROUND' C518-1 C519-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_17' U417-2 U417-3 NET 'MGT_FO_CMR_CH_17' C517-1 NET 'GROUND' C517-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_17_IN_DIR' U417-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_17_IN_CMP' U417-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_17_OCP_ROD_DIR' U417-10 C515-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_17_OCP_ROD_CMP' U417-9 C516-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_17_OCP_HUB_DIR' U417-12 C513-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_17_OCP_HUB_CMP' U417-11 C514-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_17_OUT_ROD_DIR' C515-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_17_OUT_ROD_CMP' C516-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_17_OUT_HUB_DIR' C513-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_17_OUT_HUB_CMP' C514-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_17_Pin_6' U417-6 NET 'No_Conn_FO_CH_17_Pin_7' U417-7 NET 'No_Conn_FO_CH_17_Pin_14' U417-14 NET 'No_Conn_FO_CH_17_Pin_15' U417-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_17_OUT_ROD_DIR' DPV451-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_17_OUT_ROD_CMP' DPV451-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV451-1 DPV451-4 NET 'MGT_FO_CH_17_IN_DIR' DPV449-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_17_IN_CMP' DPV449-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV449-1 # # MGT FanOut Channel #18 # # # The components in BOTTOM side Channel #18 MGT Fanout are: # # U418 NB7VQ14M 4 way fanout chip # # C520:C523 100 nFd 0201 Output DC Blocking caps # # C524 10 nFd 0402 VRef Input ByPass cap # # C525 47 nFd 0402 Fanout VCC ByPass cap # C526 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U418-8 U418-13 NET 'FAN_1V8' C525-2 C526-1 NET 'GROUND' U418-16 NET 'GROUND' C525-1 C526-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_18' U418-2 U418-3 NET 'MGT_FO_CMR_CH_18' C524-1 NET 'GROUND' C524-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_18_IN_DIR' U418-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_IN_CMP' U418-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_18_OCP_HUB_DIR' U418-10 C522-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_OCP_HUB_CMP' U418-9 C523-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_OCP_ROD_DIR' U418-12 C520-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_OCP_ROD_CMP' U418-11 C521-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_18_OUT_HUB_DIR' C522-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_OUT_HUB_CMP' C523-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_OUT_ROD_DIR' C520-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_OUT_ROD_CMP' C521-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_18_Pin_6' U418-6 NET 'No_Conn_FO_CH_18_Pin_7' U418-7 NET 'No_Conn_FO_CH_18_Pin_14' U418-14 NET 'No_Conn_FO_CH_18_Pin_15' U418-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_18_OUT_ROD_DIR' DPV454-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_OUT_ROD_CMP' DPV454-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV454-1 DPV454-4 NET 'MGT_FO_CH_18_OUT_HUB_DIR' DPV453-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_OUT_HUB_CMP' DPV453-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV453-1 NET 'MGT_FO_CH_18_IN_DIR' DPV452-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_IN_CMP' DPV452-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV452-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #10/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #19 # # The components in TOP side Channel #19 MGT Fanout are: # # U419 NB7VQ14M 4 way fanout chip # # C527:C530 100 nFd 0201 Output DC Blocking caps # # C531 10 nFd 0402 VRef Input ByPass cap # # C532 47 nFd 0402 Fanout VCC ByPass cap # C533 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U419-8 U419-13 NET 'FAN_1V8' C532-2 C533-2 NET 'GROUND' U419-16 NET 'GROUND' C532-1 C533-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_19' U419-2 U419-3 NET 'MGT_FO_CMR_CH_19' C531-1 NET 'GROUND' C531-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_19_IN_DIR' U419-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_19_IN_CMP' U419-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_19_OCP_ROD_DIR' U419-10 C529-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_19_OCP_ROD_CMP' U419-9 C530-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_19_OCP_HUB_DIR' U419-12 C527-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_19_OCP_HUB_CMP' U419-11 C528-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_19_OUT_ROD_DIR' C529-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_19_OUT_ROD_CMP' C530-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_19_OUT_HUB_DIR' C527-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_19_OUT_HUB_CMP' C528-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_19_Pin_6' U419-6 NET 'No_Conn_FO_CH_19_Pin_7' U419-7 NET 'No_Conn_FO_CH_19_Pin_14' U419-14 NET 'No_Conn_FO_CH_19_Pin_15' U419-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_19_OUT_ROD_DIR' DPV457-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_19_OUT_ROD_CMP' DPV457-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV457-1 DPV457-4 NET 'MGT_FO_CH_19_OUT_HUB_DIR' DPV456-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_19_OUT_HUB_CMP' DPV456-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV456-1 NET 'MGT_FO_CH_19_IN_DIR' DPV455-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_19_IN_CMP' DPV455-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV455-1 # # MGT FanOut Channel #20 # # # The components in BOTTOM side Channel #20 MGT Fanout are: # # U420 NB7VQ14M 4 way fanout chip # # C534:C537 100 nFd 0201 Output DC Blocking caps # # C538 10 nFd 0402 VRef Input ByPass cap # # C539 47 nFd 0402 Fanout VCC ByPass cap # C540 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U420-8 U420-13 NET 'FAN_1V8' C539-2 C540-1 NET 'GROUND' U420-16 NET 'GROUND' C539-1 C540-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_20' U420-2 U420-3 NET 'MGT_FO_CMR_CH_20' C538-1 NET 'GROUND' C538-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_20_IN_DIR' U420-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_IN_CMP' U420-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_20_OCP_HUB_DIR' U420-10 C536-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_OCP_HUB_CMP' U420-9 C537-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_OCP_ROD_DIR' U420-12 C534-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_OCP_ROD_CMP' U420-11 C535-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_20_OUT_HUB_DIR' C536-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_OUT_HUB_CMP' C537-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_OUT_ROD_DIR' C534-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_OUT_ROD_CMP' C535-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_20_Pin_6' U420-6 NET 'No_Conn_FO_CH_20_Pin_7' U420-7 NET 'No_Conn_FO_CH_20_Pin_14' U420-14 NET 'No_Conn_FO_CH_20_Pin_15' U420-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_20_OUT_ROD_DIR' DPV460-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_OUT_ROD_CMP' DPV460-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV460-1 DPV460-4 NET 'MGT_FO_CH_20_OUT_HUB_DIR' DPV459-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_OUT_HUB_CMP' DPV459-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV459-1 NET 'MGT_FO_CH_20_IN_DIR' DPV458-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_IN_CMP' DPV458-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV458-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #11/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #21 # # The components in TOP side Channel #21 MGT Fanout are: # # U421 NB7VQ14M 4 way fanout chip # # C541:C544 100 nFd 0201 Output DC Blocking caps # # C545 10 nFd 0402 VRef Input ByPass cap # # C546 47 nFd 0402 Fanout VCC ByPass cap # C547 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U421-8 U421-13 NET 'FAN_1V8' C546-2 C547-2 NET 'GROUND' U421-16 NET 'GROUND' C546-1 C547-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_21' U421-2 U421-3 NET 'MGT_FO_CMR_CH_21' C545-1 NET 'GROUND' C545-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_21_IN_DIR' U421-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_IN_CMP' U421-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_21_OCP_ROD_DIR' U421-10 C543-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_OCP_ROD_CMP' U421-9 C544-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_OCP_HUB_DIR' U421-12 C541-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_OCP_HUB_CMP' U421-11 C542-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_21_OUT_ROD_DIR' C543-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_OUT_ROD_CMP' C544-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_OUT_HUB_DIR' C541-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_OUT_HUB_CMP' C542-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_21_Pin_6' U421-6 NET 'No_Conn_FO_CH_21_Pin_7' U421-7 NET 'No_Conn_FO_CH_21_Pin_14' U421-14 NET 'No_Conn_FO_CH_21_Pin_15' U421-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_21_OUT_ROD_DIR' DPV463-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_OUT_ROD_CMP' DPV463-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV463-1 DPV463-4 NET 'MGT_FO_CH_21_OUT_HUB_DIR' DPV462-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_OUT_HUB_CMP' DPV462-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV462-1 NET 'MGT_FO_CH_21_IN_DIR' DPV461-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_IN_CMP' DPV461-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV461-1 # # MGT FanOut Channel #22 # # # The components in BOTTOM side Channel #22 MGT Fanout are: # # U422 NB7VQ14M 4 way fanout chip # # C548:C551 100 nFd 0201 Output DC Blocking caps # # C552 10 nFd 0402 VRef Input ByPass cap # # C553 47 nFd 0402 Fanout VCC ByPass cap # C554 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U422-8 U422-13 NET 'FAN_1V8' C553-2 C554-1 NET 'GROUND' U422-16 NET 'GROUND' C553-1 C554-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_22' U422-2 U422-3 NET 'MGT_FO_CMR_CH_22' C552-1 NET 'GROUND' C552-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_22_IN_DIR' U422-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_IN_CMP' U422-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_22_OCP_HUB_DIR' U422-10 C550-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_OCP_HUB_CMP' U422-9 C551-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_OCP_ROD_DIR' U422-12 C548-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_OCP_ROD_CMP' U422-11 C549-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_22_OUT_HUB_DIR' C550-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_OUT_HUB_CMP' C551-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_OUT_ROD_DIR' C548-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_OUT_ROD_CMP' C549-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_22_Pin_6' U422-6 NET 'No_Conn_FO_CH_22_Pin_7' U422-7 NET 'No_Conn_FO_CH_22_Pin_14' U422-14 NET 'No_Conn_FO_CH_22_Pin_15' U422-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_22_OUT_ROD_DIR' DPV466-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_OUT_ROD_CMP' DPV466-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV466-1 DPV466-4 NET 'MGT_FO_CH_22_OUT_HUB_DIR' DPV465-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_OUT_HUB_CMP' DPV465-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV465-1 NET 'MGT_FO_CH_22_IN_DIR' DPV464-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_IN_CMP' DPV464-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV464-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #12/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #23 # # The components in TOP side Channel #23 MGT Fanout are: # # U423 NB7VQ14M 4 way fanout chip # # C555:C558 100 nFd 0201 Output DC Blocking caps # # C559 10 nFd 0402 VRef Input ByPass cap # # C560 47 nFd 0402 Fanout VCC ByPass cap # C561 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U423-8 U423-13 NET 'FAN_1V8' C560-2 C561-2 NET 'GROUND' U423-16 NET 'GROUND' C560-1 C561-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_23' U423-2 U423-3 NET 'MGT_FO_CMR_CH_23' C559-1 NET 'GROUND' C559-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_23_IN_DIR' U423-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_IN_CMP' U423-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_23_OCP_ROD_DIR' U423-10 C557-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_OCP_ROD_CMP' U423-9 C558-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_OCP_HUB_DIR' U423-12 C555-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_OCP_HUB_CMP' U423-11 C556-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_23_OUT_ROD_DIR' C557-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_OUT_ROD_CMP' C558-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_OUT_HUB_DIR' C555-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_OUT_HUB_CMP' C556-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_23_Pin_6' U423-6 NET 'No_Conn_FO_CH_23_Pin_7' U423-7 NET 'No_Conn_FO_CH_23_Pin_14' U423-14 NET 'No_Conn_FO_CH_23_Pin_15' U423-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_23_OUT_ROD_DIR' DPV469-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_OUT_ROD_CMP' DPV469-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV469-1 DPV469-4 NET 'MGT_FO_CH_23_OUT_HUB_DIR' DPV468-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_OUT_HUB_CMP' DPV468-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV468-1 NET 'MGT_FO_CH_23_IN_DIR' DPV467-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_IN_CMP' DPV467-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV467-1 # # MGT FanOut Channel #24 # # # The components in BOTTOM side Channel #24 MGT Fanout are: # # U424 NB7VQ14M 4 way fanout chip # # C562:C565 100 nFd 0201 Output DC Blocking caps # # C566 10 nFd 0402 VRef Input ByPass cap # # C567 47 nFd 0402 Fanout VCC ByPass cap # C568 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U424-8 U424-13 NET 'FAN_1V8' C567-2 C568-1 NET 'GROUND' U424-16 NET 'GROUND' C567-1 C568-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_24' U424-2 U424-3 NET 'MGT_FO_CMR_CH_24' C566-1 NET 'GROUND' C566-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_24_IN_DIR' U424-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_IN_CMP' U424-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_24_OCP_HUB_DIR' U424-10 C564-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_OCP_HUB_CMP' U424-9 C565-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_OCP_ROD_DIR' U424-12 C562-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_OCP_ROD_CMP' U424-11 C563-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_24_OUT_HUB_DIR' C564-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_OUT_HUB_CMP' C565-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_OUT_ROD_DIR' C562-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_OUT_ROD_CMP' C563-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_24_Pin_6' U424-6 NET 'No_Conn_FO_CH_24_Pin_7' U424-7 NET 'No_Conn_FO_CH_24_Pin_14' U424-14 NET 'No_Conn_FO_CH_24_Pin_15' U424-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_24_OUT_ROD_DIR' DPV472-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_OUT_ROD_CMP' DPV472-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV472-1 DPV472-4 NET 'MGT_FO_CH_24_OUT_HUB_DIR' DPV471-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_OUT_HUB_CMP' DPV471-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV471-1 NET 'MGT_FO_CH_24_IN_DIR' DPV470-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_IN_CMP' DPV470-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV470-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #13/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #25 # # The components in TOP side Channel #25 MGT Fanout are: # # U425 NB7VQ14M 4 way fanout chip # # C569:C572 100 nFd 0201 Output DC Blocking caps # # C573 10 nFd 0402 VRef Input ByPass cap # # C574 47 nFd 0402 Fanout VCC ByPass cap # C575 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U425-8 U425-13 NET 'FAN_1V8' C574-2 C575-2 NET 'GROUND' U425-16 NET 'GROUND' C574-1 C575-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_25' U425-2 U425-3 NET 'MGT_FO_CMR_CH_25' C573-1 NET 'GROUND' C573-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_25_IN_DIR' U425-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_25_IN_CMP' U425-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_25_OCP_ROD_DIR' U425-10 C571-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_25_OCP_ROD_CMP' U425-9 C572-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_25_OCP_HUB_DIR' U425-12 C569-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_25_OCP_HUB_CMP' U425-11 C570-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_25_OUT_ROD_DIR' C571-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_25_OUT_ROD_CMP' C572-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_25_OUT_HUB_DIR' C569-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_25_OUT_HUB_CMP' C570-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_25_Pin_6' U425-6 NET 'No_Conn_FO_CH_25_Pin_7' U425-7 NET 'No_Conn_FO_CH_25_Pin_14' U425-14 NET 'No_Conn_FO_CH_25_Pin_15' U425-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_25_OUT_ROD_DIR' DPV475-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_25_OUT_ROD_CMP' DPV475-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV475-1 DPV475-4 NET 'MGT_FO_CH_25_IN_DIR' DPV473-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_25_IN_CMP' DPV473-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV473-1 # # MGT FanOut Channel #26 # # # The components in BOTTOM side Channel #26 MGT Fanout are: # # U426 NB7VQ14M 4 way fanout chip # # C576:C579 100 nFd 0201 Output DC Blocking caps # # C580 10 nFd 0402 VRef Input ByPass cap # # C581 47 nFd 0402 Fanout VCC ByPass cap # C582 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U426-8 U426-13 NET 'FAN_1V8' C581-2 C582-1 NET 'GROUND' U426-16 NET 'GROUND' C581-1 C582-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_26' U426-2 U426-3 NET 'MGT_FO_CMR_CH_26' C580-1 NET 'GROUND' C580-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_26_IN_DIR' U426-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_IN_CMP' U426-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_26_OCP_HUB_DIR' U426-10 C578-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_OCP_HUB_CMP' U426-9 C579-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_OCP_ROD_DIR' U426-12 C576-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_OCP_ROD_CMP' U426-11 C577-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_26_OUT_HUB_DIR' C578-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_OUT_HUB_CMP' C579-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_OUT_ROD_DIR' C576-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_OUT_ROD_CMP' C577-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_26_Pin_6' U426-6 NET 'No_Conn_FO_CH_26_Pin_7' U426-7 NET 'No_Conn_FO_CH_26_Pin_14' U426-14 NET 'No_Conn_FO_CH_26_Pin_15' U426-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_26_OUT_ROD_DIR' DPV478-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_OUT_ROD_CMP' DPV478-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV478-1 DPV478-4 NET 'MGT_FO_CH_26_OUT_HUB_DIR' DPV477-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_OUT_HUB_CMP' DPV477-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV477-1 NET 'MGT_FO_CH_26_IN_DIR' DPV476-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_IN_CMP' DPV476-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV476-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #14/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #27 # # The components in TOP side Channel #27 MGT Fanout are: # # U427 NB7VQ14M 4 way fanout chip # # C583:C586 100 nFd 0201 Output DC Blocking caps # # C587 10 nFd 0402 VRef Input ByPass cap # # C588 47 nFd 0402 Fanout VCC ByPass cap # C589 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U427-8 U427-13 NET 'FAN_1V8' C588-2 C589-2 NET 'GROUND' U427-16 NET 'GROUND' C588-1 C589-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_27' U427-2 U427-3 NET 'MGT_FO_CMR_CH_27' C587-1 NET 'GROUND' C587-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_27_IN_DIR' U427-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_IN_CMP' U427-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_27_OCP_ROD_DIR' U427-10 C585-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_OCP_ROD_CMP' U427-9 C586-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_OCP_HUB_DIR' U427-12 C583-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_OCP_HUB_CMP' U427-11 C584-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_27_OUT_ROD_DIR' C585-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_OUT_ROD_CMP' C586-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_OUT_HUB_DIR' C583-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_OUT_HUB_CMP' C584-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_27_Pin_6' U427-6 NET 'No_Conn_FO_CH_27_Pin_7' U427-7 NET 'No_Conn_FO_CH_27_Pin_14' U427-14 NET 'No_Conn_FO_CH_27_Pin_15' U427-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_27_OUT_ROD_DIR' DPV481-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_OUT_ROD_CMP' DPV481-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV481-1 DPV481-4 NET 'MGT_FO_CH_27_OUT_HUB_DIR' DPV480-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_OUT_HUB_CMP' DPV480-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV480-1 NET 'MGT_FO_CH_27_IN_DIR' DPV479-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_IN_CMP' DPV479-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV479-1 # # MGT FanOut Channel #28 # # # The components in BOTTOM side Channel #28 MGT Fanout are: # # U428 NB7VQ14M 4 way fanout chip # # C590:C593 100 nFd 0201 Output DC Blocking caps # # C594 10 nFd 0402 VRef Input ByPass cap # # C595 47 nFd 0402 Fanout VCC ByPass cap # C596 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U428-8 U428-13 NET 'FAN_1V8' C595-2 C596-1 NET 'GROUND' U428-16 NET 'GROUND' C595-1 C596-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_28' U428-2 U428-3 NET 'MGT_FO_CMR_CH_28' C594-1 NET 'GROUND' C594-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_28_IN_DIR' U428-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_IN_CMP' U428-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_28_OCP_HUB_DIR' U428-10 C592-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_OCP_HUB_CMP' U428-9 C593-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_OCP_ROD_DIR' U428-12 C590-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_OCP_ROD_CMP' U428-11 C591-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_28_OUT_HUB_DIR' C592-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_OUT_HUB_CMP' C593-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_OUT_ROD_DIR' C590-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_OUT_ROD_CMP' C591-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_28_Pin_6' U428-6 NET 'No_Conn_FO_CH_28_Pin_7' U428-7 NET 'No_Conn_FO_CH_28_Pin_14' U428-14 NET 'No_Conn_FO_CH_28_Pin_15' U428-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_28_OUT_ROD_DIR' DPV484-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_OUT_ROD_CMP' DPV484-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV484-1 DPV484-4 NET 'MGT_FO_CH_28_OUT_HUB_DIR' DPV483-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_OUT_HUB_CMP' DPV483-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV483-1 NET 'MGT_FO_CH_28_IN_DIR' DPV482-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_IN_CMP' DPV482-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV482-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #15/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #29 # # The components in TOP side Channel #29 MGT Fanout are: # # U429 NB7VQ14M 4 way fanout chip # # C597:C600 100 nFd 0201 Output DC Blocking caps # # C601 10 nFd 0402 VRef Input ByPass cap # # C602 47 nFd 0402 Fanout VCC ByPass cap # C603 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U429-8 U429-13 NET 'FAN_1V8' C602-2 C603-2 NET 'GROUND' U429-16 NET 'GROUND' C602-1 C603-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_29' U429-2 U429-3 NET 'MGT_FO_CMR_CH_29' C601-1 NET 'GROUND' C601-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_29_IN_DIR' U429-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_IN_CMP' U429-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_29_OCP_ROD_DIR' U429-10 C599-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_OCP_ROD_CMP' U429-9 C600-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_OCP_HUB_DIR' U429-12 C597-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_OCP_HUB_CMP' U429-11 C598-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_29_OUT_ROD_DIR' C599-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_OUT_ROD_CMP' C600-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_OUT_HUB_DIR' C597-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_OUT_HUB_CMP' C598-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_29_Pin_6' U429-6 NET 'No_Conn_FO_CH_29_Pin_7' U429-7 NET 'No_Conn_FO_CH_29_Pin_14' U429-14 NET 'No_Conn_FO_CH_29_Pin_15' U429-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_29_OUT_ROD_DIR' DPV487-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_OUT_ROD_CMP' DPV487-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV487-1 DPV487-4 NET 'MGT_FO_CH_29_OUT_HUB_DIR' DPV486-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_OUT_HUB_CMP' DPV486-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV486-1 NET 'MGT_FO_CH_29_IN_DIR' DPV485-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_IN_CMP' DPV485-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV485-1 # # MGT FanOut Channel #30 # # # The components in BOTTOM side Channel #30 MGT Fanout are: # # U430 NB7VQ14M 4 way fanout chip # # C604:C607 100 nFd 0201 Output DC Blocking caps # # C608 10 nFd 0402 VRef Input ByPass cap # # C609 47 nFd 0402 Fanout VCC ByPass cap # C610 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U430-8 U430-13 NET 'FAN_1V8' C609-2 C610-1 NET 'GROUND' U430-16 NET 'GROUND' C609-1 C610-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_30' U430-2 U430-3 NET 'MGT_FO_CMR_CH_30' C608-1 NET 'GROUND' C608-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_30_IN_DIR' U430-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_IN_CMP' U430-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_30_OCP_HUB_DIR' U430-10 C606-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_OCP_HUB_CMP' U430-9 C607-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_OCP_ROD_DIR' U430-12 C604-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_OCP_ROD_CMP' U430-11 C605-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_30_OUT_HUB_DIR' C606-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_OUT_HUB_CMP' C607-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_OUT_ROD_DIR' C604-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_OUT_ROD_CMP' C605-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_30_Pin_6' U430-6 NET 'No_Conn_FO_CH_30_Pin_7' U430-7 NET 'No_Conn_FO_CH_30_Pin_14' U430-14 NET 'No_Conn_FO_CH_30_Pin_15' U430-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_30_OUT_ROD_DIR' DPV490-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_OUT_ROD_CMP' DPV490-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV490-1 DPV490-4 NET 'MGT_FO_CH_30_OUT_HUB_DIR' DPV489-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_OUT_HUB_CMP' DPV489-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV489-1 NET 'MGT_FO_CH_30_IN_DIR' DPV488-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_IN_CMP' DPV488-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV488-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #16/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #31 # # The components in TOP side Channel #31 MGT Fanout are: # # U431 NB7VQ14M 4 way fanout chip # # C611:C614 100 nFd 0201 Output DC Blocking caps # # C615 10 nFd 0402 VRef Input ByPass cap # # C616 47 nFd 0402 Fanout VCC ByPass cap # C617 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U431-8 U431-13 NET 'FAN_1V8' C616-2 C617-2 NET 'GROUND' U431-16 NET 'GROUND' C616-1 C617-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_31' U431-2 U431-3 NET 'MGT_FO_CMR_CH_31' C615-1 NET 'GROUND' C615-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_31_IN_DIR' U431-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_31_IN_CMP' U431-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_31_OCP_ROD_DIR' U431-10 C613-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_31_OCP_ROD_CMP' U431-9 C614-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_31_OCP_HUB_DIR' U431-12 C611-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_31_OCP_HUB_CMP' U431-11 C612-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_31_OUT_ROD_DIR' C613-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_31_OUT_ROD_CMP' C614-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_31_OUT_HUB_DIR' C611-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_31_OUT_HUB_CMP' C612-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_31_Pin_6' U431-6 NET 'No_Conn_FO_CH_31_Pin_7' U431-7 NET 'No_Conn_FO_CH_31_Pin_14' U431-14 NET 'No_Conn_FO_CH_31_Pin_15' U431-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_31_OUT_ROD_DIR' DPV493-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_31_OUT_ROD_CMP' DPV493-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV493-1 DPV493-4 NET 'MGT_FO_CH_31_OUT_HUB_DIR' DPV492-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_31_OUT_HUB_CMP' DPV492-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV492-1 NET 'MGT_FO_CH_31_IN_DIR' DPV491-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_31_IN_CMP' DPV491-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV491-1 # # MGT FanOut Channel #32 # # # The components in BOTTOM side Channel #32 MGT Fanout are: # # U432 NB7VQ14M 4 way fanout chip # # C618:C621 100 nFd 0201 Output DC Blocking caps # # C622 10 nFd 0402 VRef Input ByPass cap # # C623 47 nFd 0402 Fanout VCC ByPass cap # C624 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U432-8 U432-13 NET 'FAN_1V8' C623-2 C624-1 NET 'GROUND' U432-16 NET 'GROUND' C623-1 C624-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_32' U432-2 U432-3 NET 'MGT_FO_CMR_CH_32' C622-1 NET 'GROUND' C622-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_32_IN_DIR' U432-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_IN_CMP' U432-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_32_OCP_HUB_DIR' U432-10 C620-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_OCP_HUB_CMP' U432-9 C621-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_OCP_ROD_DIR' U432-12 C618-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_OCP_ROD_CMP' U432-11 C619-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_32_OUT_HUB_DIR' C620-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_OUT_HUB_CMP' C621-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_OUT_ROD_DIR' C618-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_OUT_ROD_CMP' C619-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_32_Pin_6' U432-6 NET 'No_Conn_FO_CH_32_Pin_7' U432-7 NET 'No_Conn_FO_CH_32_Pin_14' U432-14 NET 'No_Conn_FO_CH_32_Pin_15' U432-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_32_OUT_ROD_DIR' DPV496-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_OUT_ROD_CMP' DPV496-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV496-1 DPV496-4 NET 'MGT_FO_CH_32_OUT_HUB_DIR' DPV495-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_OUT_HUB_CMP' DPV495-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV495-1 NET 'MGT_FO_CH_32_IN_DIR' DPV494-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_IN_CMP' DPV494-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV494-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #17/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #33 # # The components in TOP side Channel #33 MGT Fanout are: # # U433 NB7VQ14M 4 way fanout chip # # C625:C628 100 nFd 0201 Output DC Blocking caps # # C629 10 nFd 0402 VRef Input ByPass cap # # C630 47 nFd 0402 Fanout VCC ByPass cap # C631 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U433-8 U433-13 NET 'FAN_1V8' C630-2 C631-2 NET 'GROUND' U433-16 NET 'GROUND' C630-1 C631-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_33' U433-2 U433-3 NET 'MGT_FO_CMR_CH_33' C629-1 NET 'GROUND' C629-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_33_IN_DIR' U433-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_33_IN_CMP' U433-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_33_OCP_ROD_DIR' U433-10 C627-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_33_OCP_ROD_CMP' U433-9 C628-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_33_OCP_HUB_DIR' U433-12 C625-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_33_OCP_HUB_CMP' U433-11 C626-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_33_OUT_ROD_DIR' C627-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_33_OUT_ROD_CMP' C628-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_33_OUT_HUB_DIR' C625-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_33_OUT_HUB_CMP' C626-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_33_Pin_6' U433-6 NET 'No_Conn_FO_CH_33_Pin_7' U433-7 NET 'No_Conn_FO_CH_33_Pin_14' U433-14 NET 'No_Conn_FO_CH_33_Pin_15' U433-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_33_OUT_ROD_DIR' DPV499-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_33_OUT_ROD_CMP' DPV499-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV499-1 DPV499-4 NET 'MGT_FO_CH_33_IN_DIR' DPV497-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_33_IN_CMP' DPV497-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV497-1 # # MGT FanOut Channel #34 # # # The components in BOTTOM side Channel #34 MGT Fanout are: # # U434 NB7VQ14M 4 way fanout chip # # C632:C635 100 nFd 0201 Output DC Blocking caps # # C636 10 nFd 0402 VRef Input ByPass cap # # C637 47 nFd 0402 Fanout VCC ByPass cap # C638 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U434-8 U434-13 NET 'FAN_1V8' C637-2 C638-1 NET 'GROUND' U434-16 NET 'GROUND' C637-1 C638-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_34' U434-2 U434-3 NET 'MGT_FO_CMR_CH_34' C636-1 NET 'GROUND' C636-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_34_IN_DIR' U434-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_34_IN_CMP' U434-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_34_OCP_HUB_DIR' U434-10 C634-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_34_OCP_HUB_CMP' U434-9 C635-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_34_OCP_ROD_DIR' U434-12 C632-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_34_OCP_ROD_CMP' U434-11 C633-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_34_OUT_HUB_DIR' C634-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_34_OUT_HUB_CMP' C635-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_34_OUT_ROD_DIR' C632-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_34_OUT_ROD_CMP' C633-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_34_Pin_6' U434-6 NET 'No_Conn_FO_CH_34_Pin_7' U434-7 NET 'No_Conn_FO_CH_34_Pin_14' U434-14 NET 'No_Conn_FO_CH_34_Pin_15' U434-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_34_OUT_ROD_DIR' DPV502-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_34_OUT_ROD_CMP' DPV502-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV502-1 DPV502-4 NET 'MGT_FO_CH_34_OUT_HUB_DIR' DPV501-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_34_OUT_HUB_CMP' DPV501-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV501-1 NET 'MGT_FO_CH_34_IN_DIR' DPV500-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_34_IN_CMP' DPV500-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV500-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #18/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #35 # # The components in TOP side Channel #35 MGT Fanout are: # # U435 NB7VQ14M 4 way fanout chip # # C639:C642 100 nFd 0201 Output DC Blocking caps # # C643 10 nFd 0402 VRef Input ByPass cap # # C644 47 nFd 0402 Fanout VCC ByPass cap # C645 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U435-8 U435-13 NET 'FAN_1V8' C644-2 C645-2 NET 'GROUND' U435-16 NET 'GROUND' C644-1 C645-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_35' U435-2 U435-3 NET 'MGT_FO_CMR_CH_35' C643-1 NET 'GROUND' C643-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_35_IN_DIR' U435-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_IN_CMP' U435-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_35_OCP_ROD_DIR' U435-10 C641-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_OCP_ROD_CMP' U435-9 C642-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_OCP_HUB_DIR' U435-12 C639-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_OCP_HUB_CMP' U435-11 C640-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_35_OUT_ROD_DIR' C641-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_OUT_ROD_CMP' C642-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_OUT_HUB_DIR' C639-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_OUT_HUB_CMP' C640-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_35_Pin_6' U435-6 NET 'No_Conn_FO_CH_35_Pin_7' U435-7 NET 'No_Conn_FO_CH_35_Pin_14' U435-14 NET 'No_Conn_FO_CH_35_Pin_15' U435-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_35_OUT_ROD_DIR' DPV505-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_OUT_ROD_CMP' DPV505-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV505-1 DPV505-4 NET 'MGT_FO_CH_35_OUT_HUB_DIR' DPV504-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_OUT_HUB_CMP' DPV504-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV504-1 NET 'MGT_FO_CH_35_IN_DIR' DPV503-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_IN_CMP' DPV503-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV503-1 # # MGT FanOut Channel #36 # # # The components in BOTTOM side Channel #36 MGT Fanout are: # # U436 NB7VQ14M 4 way fanout chip # # C646:C649 100 nFd 0201 Output DC Blocking caps # # C650 10 nFd 0402 VRef Input ByPass cap # # C651 47 nFd 0402 Fanout VCC ByPass cap # C652 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U436-8 U436-13 NET 'FAN_1V8' C651-2 C652-1 NET 'GROUND' U436-16 NET 'GROUND' C651-1 C652-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_36' U436-2 U436-3 NET 'MGT_FO_CMR_CH_36' C650-1 NET 'GROUND' C650-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_36_IN_DIR' U436-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_IN_CMP' U436-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_36_OCP_HUB_DIR' U436-10 C648-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_OCP_HUB_CMP' U436-9 C649-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_OCP_ROD_DIR' U436-12 C646-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_OCP_ROD_CMP' U436-11 C647-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_36_OUT_HUB_DIR' C648-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_OUT_HUB_CMP' C649-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_OUT_ROD_DIR' C646-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_OUT_ROD_CMP' C647-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_36_Pin_6' U436-6 NET 'No_Conn_FO_CH_36_Pin_7' U436-7 NET 'No_Conn_FO_CH_36_Pin_14' U436-14 NET 'No_Conn_FO_CH_36_Pin_15' U436-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_36_OUT_ROD_DIR' DPV508-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_OUT_ROD_CMP' DPV508-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV508-1 DPV508-4 NET 'MGT_FO_CH_36_OUT_HUB_DIR' DPV507-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_OUT_HUB_CMP' DPV507-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV507-1 NET 'MGT_FO_CH_36_IN_DIR' DPV506-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_IN_CMP' DPV506-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV506-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #19/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #37 # # The components in TOP side Channel #37 MGT Fanout are: # # U437 NB7VQ14M 4 way fanout chip # # C653:C656 100 nFd 0201 Output DC Blocking caps # # C657 10 nFd 0402 VRef Input ByPass cap # # C658 47 nFd 0402 Fanout VCC ByPass cap # C659 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U437-8 U437-13 NET 'FAN_1V8' C658-2 C659-2 NET 'GROUND' U437-16 NET 'GROUND' C658-1 C659-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_37' U437-2 U437-3 NET 'MGT_FO_CMR_CH_37' C657-1 NET 'GROUND' C657-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_37_IN_DIR' U437-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_37_IN_CMP' U437-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_37_OCP_ROD_DIR' U437-10 C655-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_37_OCP_ROD_CMP' U437-9 C656-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_37_OCP_HUB_DIR' U437-12 C653-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_37_OCP_HUB_CMP' U437-11 C654-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_37_OUT_ROD_DIR' C655-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_37_OUT_ROD_CMP' C656-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_37_OUT_HUB_DIR' C653-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_37_OUT_HUB_CMP' C654-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_37_Pin_6' U437-6 NET 'No_Conn_FO_CH_37_Pin_7' U437-7 NET 'No_Conn_FO_CH_37_Pin_14' U437-14 NET 'No_Conn_FO_CH_37_Pin_15' U437-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_37_OUT_ROD_DIR' DPV511-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_37_OUT_ROD_CMP' DPV511-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV511-1 DPV511-4 NET 'MGT_FO_CH_37_OUT_HUB_DIR' DPV510-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_37_OUT_HUB_CMP' DPV510-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV510-1 NET 'MGT_FO_CH_37_IN_DIR' DPV509-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_37_IN_CMP' DPV509-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV509-1 # # MGT FanOut Channel #38 # # # The components in BOTTOM side Channel #38 MGT Fanout are: # # U438 NB7VQ14M 4 way fanout chip # # C660:C663 100 nFd 0201 Output DC Blocking caps # # C664 10 nFd 0402 VRef Input ByPass cap # # C665 47 nFd 0402 Fanout VCC ByPass cap # C666 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U438-8 U438-13 NET 'FAN_1V8' C665-2 C666-1 NET 'GROUND' U438-16 NET 'GROUND' C665-1 C666-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_38' U438-2 U438-3 NET 'MGT_FO_CMR_CH_38' C664-1 NET 'GROUND' C664-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_38_IN_DIR' U438-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_IN_CMP' U438-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_38_OCP_HUB_DIR' U438-10 C662-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_OCP_HUB_CMP' U438-9 C663-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_OCP_ROD_DIR' U438-12 C660-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_OCP_ROD_CMP' U438-11 C661-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_38_OUT_HUB_DIR' C662-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_OUT_HUB_CMP' C663-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_OUT_ROD_DIR' C660-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_OUT_ROD_CMP' C661-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_38_Pin_6' U438-6 NET 'No_Conn_FO_CH_38_Pin_7' U438-7 NET 'No_Conn_FO_CH_38_Pin_14' U438-14 NET 'No_Conn_FO_CH_38_Pin_15' U438-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_38_OUT_ROD_DIR' DPV514-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_OUT_ROD_CMP' DPV514-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV514-1 DPV514-4 NET 'MGT_FO_CH_38_OUT_HUB_DIR' DPV513-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_OUT_HUB_CMP' DPV513-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV513-1 NET 'MGT_FO_CH_38_IN_DIR' DPV512-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_IN_CMP' DPV512-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV512-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #20/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #39 # # The components in TOP side Channel #39 MGT Fanout are: # # U439 NB7VQ14M 4 way fanout chip # # C667:C670 100 nFd 0201 Output DC Blocking caps # # C671 10 nFd 0402 VRef Input ByPass cap # # C672 47 nFd 0402 Fanout VCC ByPass cap # C673 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U439-8 U439-13 NET 'FAN_1V8' C672-2 C673-2 NET 'GROUND' U439-16 NET 'GROUND' C672-1 C673-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_39' U439-2 U439-3 NET 'MGT_FO_CMR_CH_39' C671-1 NET 'GROUND' C671-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_39_IN_DIR' U439-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_39_IN_CMP' U439-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_39_OCP_ROD_DIR' U439-10 C669-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_39_OCP_ROD_CMP' U439-9 C670-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_39_OCP_HUB_DIR' U439-12 C667-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_39_OCP_HUB_CMP' U439-11 C668-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_39_OUT_ROD_DIR' C669-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_39_OUT_ROD_CMP' C670-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_39_OUT_HUB_DIR' C667-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_39_OUT_HUB_CMP' C668-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_39_Pin_6' U439-6 NET 'No_Conn_FO_CH_39_Pin_7' U439-7 NET 'No_Conn_FO_CH_39_Pin_14' U439-14 NET 'No_Conn_FO_CH_39_Pin_15' U439-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_39_OUT_ROD_DIR' DPV517-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_39_OUT_ROD_CMP' DPV517-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV517-1 DPV517-4 NET 'MGT_FO_CH_39_OUT_HUB_DIR' DPV516-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_39_OUT_HUB_CMP' DPV516-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV516-1 NET 'MGT_FO_CH_39_IN_DIR' DPV515-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_39_IN_CMP' DPV515-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV515-1 # # MGT FanOut Channel #40 # # # The components in BOTTOM side Channel #40 MGT Fanout are: # # U440 NB7VQ14M 4 way fanout chip # # C674:C677 100 nFd 0201 Output DC Blocking caps # # C678 10 nFd 0402 VRef Input ByPass cap # # C679 47 nFd 0402 Fanout VCC ByPass cap # C680 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U440-8 U440-13 NET 'FAN_1V8' C679-2 C680-1 NET 'GROUND' U440-16 NET 'GROUND' C679-1 C680-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_40' U440-2 U440-3 NET 'MGT_FO_CMR_CH_40' C678-1 NET 'GROUND' C678-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_40_IN_DIR' U440-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_IN_CMP' U440-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_40_OCP_HUB_DIR' U440-10 C676-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_OCP_HUB_CMP' U440-9 C677-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_OCP_ROD_DIR' U440-12 C674-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_OCP_ROD_CMP' U440-11 C675-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_40_OUT_HUB_DIR' C676-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_OUT_HUB_CMP' C677-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_OUT_ROD_DIR' C674-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_OUT_ROD_CMP' C675-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_40_Pin_6' U440-6 NET 'No_Conn_FO_CH_40_Pin_7' U440-7 NET 'No_Conn_FO_CH_40_Pin_14' U440-14 NET 'No_Conn_FO_CH_40_Pin_15' U440-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_40_OUT_ROD_DIR' DPV520-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_OUT_ROD_CMP' DPV520-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV520-1 DPV520-4 NET 'MGT_FO_CH_40_OUT_HUB_DIR' DPV519-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_OUT_HUB_CMP' DPV519-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV519-1 NET 'MGT_FO_CH_40_IN_DIR' DPV518-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_IN_CMP' DPV518-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV518-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #21/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #41 # # The components in TOP side Channel #41 MGT Fanout are: # # U441 NB7VQ14M 4 way fanout chip # # C681:C684 100 nFd 0201 Output DC Blocking caps # # C685 10 nFd 0402 VRef Input ByPass cap # # C686 47 nFd 0402 Fanout VCC ByPass cap # C687 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U441-8 U441-13 NET 'FAN_1V8' C686-2 C687-2 NET 'GROUND' U441-16 NET 'GROUND' C686-1 C687-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_41' U441-2 U441-3 NET 'MGT_FO_CMR_CH_41' C685-1 NET 'GROUND' C685-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_41_IN_DIR' U441-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_41_IN_CMP' U441-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_41_OCP_ROD_DIR' U441-10 C683-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_41_OCP_ROD_CMP' U441-9 C684-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_41_OCP_HUB_DIR' U441-12 C681-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_41_OCP_HUB_CMP' U441-11 C682-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_41_OUT_ROD_DIR' C683-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_41_OUT_ROD_CMP' C684-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_41_OUT_HUB_DIR' C681-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_41_OUT_HUB_CMP' C682-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_41_Pin_6' U441-6 NET 'No_Conn_FO_CH_41_Pin_7' U441-7 NET 'No_Conn_FO_CH_41_Pin_14' U441-14 NET 'No_Conn_FO_CH_41_Pin_15' U441-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_41_OUT_ROD_DIR' DPV523-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_41_OUT_ROD_CMP' DPV523-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV523-1 DPV523-4 NET 'MGT_FO_CH_41_IN_DIR' DPV521-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_41_IN_CMP' DPV521-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV521-1 # # MGT FanOut Channel #42 # # # The components in BOTTOM side Channel #42 MGT Fanout are: # # U442 NB7VQ14M 4 way fanout chip # # C688:C691 100 nFd 0201 Output DC Blocking caps # # C692 10 nFd 0402 VRef Input ByPass cap # # C693 47 nFd 0402 Fanout VCC ByPass cap # C694 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U442-8 U442-13 NET 'FAN_1V8' C693-2 C694-1 NET 'GROUND' U442-16 NET 'GROUND' C693-1 C694-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_42' U442-2 U442-3 NET 'MGT_FO_CMR_CH_42' C692-1 NET 'GROUND' C692-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_42_IN_DIR' U442-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_IN_CMP' U442-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_42_OCP_HUB_DIR' U442-10 C690-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_OCP_HUB_CMP' U442-9 C691-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_OCP_ROD_DIR' U442-12 C688-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_OCP_ROD_CMP' U442-11 C689-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_42_OUT_HUB_DIR' C690-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_OUT_HUB_CMP' C691-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_OUT_ROD_DIR' C688-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_OUT_ROD_CMP' C689-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_42_Pin_6' U442-6 NET 'No_Conn_FO_CH_42_Pin_7' U442-7 NET 'No_Conn_FO_CH_42_Pin_14' U442-14 NET 'No_Conn_FO_CH_42_Pin_15' U442-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_42_OUT_ROD_DIR' DPV526-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_OUT_ROD_CMP' DPV526-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV526-1 DPV526-4 NET 'MGT_FO_CH_42_OUT_HUB_DIR' DPV525-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_OUT_HUB_CMP' DPV525-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV525-1 NET 'MGT_FO_CH_42_IN_DIR' DPV524-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_IN_CMP' DPV524-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV524-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #22/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #43 # # The components in TOP side Channel #43 MGT Fanout are: # # U443 NB7VQ14M 4 way fanout chip # # C695:C698 100 nFd 0201 Output DC Blocking caps # # C699 10 nFd 0402 VRef Input ByPass cap # # C700 47 nFd 0402 Fanout VCC ByPass cap # C701 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U443-8 U443-13 NET 'FAN_1V8' C700-2 C701-2 NET 'GROUND' U443-16 NET 'GROUND' C700-1 C701-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_43' U443-2 U443-3 NET 'MGT_FO_CMR_CH_43' C699-1 NET 'GROUND' C699-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_43_IN_DIR' U443-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_IN_CMP' U443-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_43_OCP_ROD_DIR' U443-10 C697-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_OCP_ROD_CMP' U443-9 C698-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_OCP_HUB_DIR' U443-12 C695-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_OCP_HUB_CMP' U443-11 C696-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_43_OUT_ROD_DIR' C697-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_OUT_ROD_CMP' C698-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_OUT_HUB_DIR' C695-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_OUT_HUB_CMP' C696-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_43_Pin_6' U443-6 NET 'No_Conn_FO_CH_43_Pin_7' U443-7 NET 'No_Conn_FO_CH_43_Pin_14' U443-14 NET 'No_Conn_FO_CH_43_Pin_15' U443-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_43_OUT_ROD_DIR' DPV529-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_OUT_ROD_CMP' DPV529-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV529-1 DPV529-4 NET 'MGT_FO_CH_43_OUT_HUB_DIR' DPV528-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_OUT_HUB_CMP' DPV528-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV528-1 NET 'MGT_FO_CH_43_IN_DIR' DPV527-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_IN_CMP' DPV527-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV527-1 # # MGT FanOut Channel #44 # # # The components in BOTTOM side Channel #44 MGT Fanout are: # # U444 NB7VQ14M 4 way fanout chip # # C702:C705 100 nFd 0201 Output DC Blocking caps # # C706 10 nFd 0402 VRef Input ByPass cap # # C707 47 nFd 0402 Fanout VCC ByPass cap # C708 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U444-8 U444-13 NET 'FAN_1V8' C707-2 C708-1 NET 'GROUND' U444-16 NET 'GROUND' C707-1 C708-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_44' U444-2 U444-3 NET 'MGT_FO_CMR_CH_44' C706-1 NET 'GROUND' C706-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_44_IN_DIR' U444-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_IN_CMP' U444-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_44_OCP_HUB_DIR' U444-10 C704-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_OCP_HUB_CMP' U444-9 C705-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_OCP_ROD_DIR' U444-12 C702-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_OCP_ROD_CMP' U444-11 C703-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_44_OUT_HUB_DIR' C704-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_OUT_HUB_CMP' C705-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_OUT_ROD_DIR' C702-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_OUT_ROD_CMP' C703-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_44_Pin_6' U444-6 NET 'No_Conn_FO_CH_44_Pin_7' U444-7 NET 'No_Conn_FO_CH_44_Pin_14' U444-14 NET 'No_Conn_FO_CH_44_Pin_15' U444-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_44_OUT_ROD_DIR' DPV532-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_OUT_ROD_CMP' DPV532-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV532-1 DPV532-4 NET 'MGT_FO_CH_44_OUT_HUB_DIR' DPV531-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_OUT_HUB_CMP' DPV531-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV531-1 NET 'MGT_FO_CH_44_IN_DIR' DPV530-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_IN_CMP' DPV530-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV530-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #23/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #45 # # The components in TOP side Channel #45 MGT Fanout are: # # U445 NB7VQ14M 4 way fanout chip # # C709:C712 100 nFd 0201 Output DC Blocking caps # # C713 10 nFd 0402 VRef Input ByPass cap # # C714 47 nFd 0402 Fanout VCC ByPass cap # C715 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U445-8 U445-13 NET 'FAN_1V8' C714-2 C715-2 NET 'GROUND' U445-16 NET 'GROUND' C714-1 C715-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_45' U445-2 U445-3 NET 'MGT_FO_CMR_CH_45' C713-1 NET 'GROUND' C713-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_45_IN_DIR' U445-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_45_IN_CMP' U445-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_45_OCP_ROD_DIR' U445-10 C711-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_45_OCP_ROD_CMP' U445-9 C712-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_45_OCP_HUB_DIR' U445-12 C709-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_45_OCP_HUB_CMP' U445-11 C710-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_45_OUT_ROD_DIR' C711-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_45_OUT_ROD_CMP' C712-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_45_OUT_HUB_DIR' C709-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_45_OUT_HUB_CMP' C710-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_45_Pin_6' U445-6 NET 'No_Conn_FO_CH_45_Pin_7' U445-7 NET 'No_Conn_FO_CH_45_Pin_14' U445-14 NET 'No_Conn_FO_CH_45_Pin_15' U445-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_45_OUT_ROD_DIR' DPV535-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_45_OUT_ROD_CMP' DPV535-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV535-1 DPV535-4 NET 'MGT_FO_CH_45_OUT_HUB_DIR' DPV534-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_45_OUT_HUB_CMP' DPV534-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV534-1 NET 'MGT_FO_CH_45_IN_DIR' DPV533-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_45_IN_CMP' DPV533-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV533-1 # # MGT FanOut Channel #46 # # # The components in BOTTOM side Channel #46 MGT Fanout are: # # U446 NB7VQ14M 4 way fanout chip # # C716:C719 100 nFd 0201 Output DC Blocking caps # # C720 10 nFd 0402 VRef Input ByPass cap # # C721 47 nFd 0402 Fanout VCC ByPass cap # C722 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U446-8 U446-13 NET 'FAN_1V8' C721-2 C722-1 NET 'GROUND' U446-16 NET 'GROUND' C721-1 C722-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_46' U446-2 U446-3 NET 'MGT_FO_CMR_CH_46' C720-1 NET 'GROUND' C720-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_46_IN_DIR' U446-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_IN_CMP' U446-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_46_OCP_HUB_DIR' U446-10 C718-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_OCP_HUB_CMP' U446-9 C719-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_OCP_ROD_DIR' U446-12 C716-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_OCP_ROD_CMP' U446-11 C717-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_46_OUT_HUB_DIR' C718-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_OUT_HUB_CMP' C719-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_OUT_ROD_DIR' C716-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_OUT_ROD_CMP' C717-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_46_Pin_6' U446-6 NET 'No_Conn_FO_CH_46_Pin_7' U446-7 NET 'No_Conn_FO_CH_46_Pin_14' U446-14 NET 'No_Conn_FO_CH_46_Pin_15' U446-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_46_OUT_ROD_DIR' DPV538-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_OUT_ROD_CMP' DPV538-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV538-1 DPV538-4 NET 'MGT_FO_CH_46_OUT_HUB_DIR' DPV537-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_OUT_HUB_CMP' DPV537-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV537-1 NET 'MGT_FO_CH_46_IN_DIR' DPV536-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_IN_CMP' DPV536-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV536-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #24/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #47 # # The components in TOP side Channel #47 MGT Fanout are: # # U447 NB7VQ14M 4 way fanout chip # # C723:C726 100 nFd 0201 Output DC Blocking caps # # C727 10 nFd 0402 VRef Input ByPass cap # # C728 47 nFd 0402 Fanout VCC ByPass cap # C729 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U447-8 U447-13 NET 'FAN_1V8' C728-2 C729-2 NET 'GROUND' U447-16 NET 'GROUND' C728-1 C729-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_47' U447-2 U447-3 NET 'MGT_FO_CMR_CH_47' C727-1 NET 'GROUND' C727-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_47_IN_DIR' U447-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_IN_CMP' U447-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_47_OCP_ROD_DIR' U447-10 C725-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_OCP_ROD_CMP' U447-9 C726-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_OCP_HUB_DIR' U447-12 C723-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_OCP_HUB_CMP' U447-11 C724-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_47_OUT_ROD_DIR' C725-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_OUT_ROD_CMP' C726-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_OUT_HUB_DIR' C723-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_OUT_HUB_CMP' C724-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_47_Pin_6' U447-6 NET 'No_Conn_FO_CH_47_Pin_7' U447-7 NET 'No_Conn_FO_CH_47_Pin_14' U447-14 NET 'No_Conn_FO_CH_47_Pin_15' U447-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_47_OUT_ROD_DIR' DPV541-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_OUT_ROD_CMP' DPV541-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV541-1 DPV541-4 NET 'MGT_FO_CH_47_OUT_HUB_DIR' DPV540-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_OUT_HUB_CMP' DPV540-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV540-1 NET 'MGT_FO_CH_47_IN_DIR' DPV539-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_IN_CMP' DPV539-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV539-1 # # MGT FanOut Channel #48 # # # The components in BOTTOM side Channel #48 MGT Fanout are: # # U448 NB7VQ14M 4 way fanout chip # # C730:C733 100 nFd 0201 Output DC Blocking caps # # C734 10 nFd 0402 VRef Input ByPass cap # # C735 47 nFd 0402 Fanout VCC ByPass cap # C736 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U448-8 U448-13 NET 'FAN_1V8' C735-2 C736-1 NET 'GROUND' U448-16 NET 'GROUND' C735-1 C736-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_48' U448-2 U448-3 NET 'MGT_FO_CMR_CH_48' C734-1 NET 'GROUND' C734-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_48_IN_DIR' U448-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_IN_CMP' U448-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_48_OCP_HUB_DIR' U448-10 C732-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_OCP_HUB_CMP' U448-9 C733-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_OCP_ROD_DIR' U448-12 C730-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_OCP_ROD_CMP' U448-11 C731-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_48_OUT_HUB_DIR' C732-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_OUT_HUB_CMP' C733-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_OUT_ROD_DIR' C730-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_OUT_ROD_CMP' C731-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_48_Pin_6' U448-6 NET 'No_Conn_FO_CH_48_Pin_7' U448-7 NET 'No_Conn_FO_CH_48_Pin_14' U448-14 NET 'No_Conn_FO_CH_48_Pin_15' U448-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_48_OUT_ROD_DIR' DPV544-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_OUT_ROD_CMP' DPV544-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV544-1 DPV544-4 NET 'MGT_FO_CH_48_OUT_HUB_DIR' DPV543-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_OUT_HUB_CMP' DPV543-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV543-1 NET 'MGT_FO_CH_48_IN_DIR' DPV542-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_IN_CMP' DPV542-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV542-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #25/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #49 # # The components in TOP side Channel #49 MGT Fanout are: # # U449 NB7VQ14M 4 way fanout chip # # C737:C740 100 nFd 0201 Output DC Blocking caps # # C741 10 nFd 0402 VRef Input ByPass cap # # C742 47 nFd 0402 Fanout VCC ByPass cap # C743 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U449-8 U449-13 NET 'FAN_1V8' C742-2 C743-2 NET 'GROUND' U449-16 NET 'GROUND' C742-1 C743-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_49' U449-2 U449-3 NET 'MGT_FO_CMR_CH_49' C741-1 NET 'GROUND' C741-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_49_IN_DIR' U449-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_49_IN_CMP' U449-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_49_OCP_ROD_DIR' U449-10 C739-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_49_OCP_ROD_CMP' U449-9 C740-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_49_OCP_HUB_DIR' U449-12 C737-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_49_OCP_HUB_CMP' U449-11 C738-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_49_OUT_ROD_DIR' C739-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_49_OUT_ROD_CMP' C740-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_49_OUT_HUB_DIR' C737-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_49_OUT_HUB_CMP' C738-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_49_Pin_6' U449-6 NET 'No_Conn_FO_CH_49_Pin_7' U449-7 NET 'No_Conn_FO_CH_49_Pin_14' U449-14 NET 'No_Conn_FO_CH_49_Pin_15' U449-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_49_OUT_ROD_DIR' DPV547-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_49_OUT_ROD_CMP' DPV547-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV547-1 DPV547-4 NET 'MGT_FO_CH_49_IN_DIR' DPV545-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_49_IN_CMP' DPV545-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV545-1 # # MGT FanOut Channel #50 # # # The components in BOTTOM side Channel #50 MGT Fanout are: # # U450 NB7VQ14M 4 way fanout chip # # C744:C747 100 nFd 0201 Output DC Blocking caps # # C748 10 nFd 0402 VRef Input ByPass cap # # C749 47 nFd 0402 Fanout VCC ByPass cap # C750 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U450-8 U450-13 NET 'FAN_1V8' C749-2 C750-1 NET 'GROUND' U450-16 NET 'GROUND' C749-1 C750-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_50' U450-2 U450-3 NET 'MGT_FO_CMR_CH_50' C748-1 NET 'GROUND' C748-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_50_IN_DIR' U450-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_IN_CMP' U450-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_50_OCP_HUB_DIR' U450-10 C746-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_OCP_HUB_CMP' U450-9 C747-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_OCP_ROD_DIR' U450-12 C744-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_OCP_ROD_CMP' U450-11 C745-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_50_OUT_HUB_DIR' C746-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_OUT_HUB_CMP' C747-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_OUT_ROD_DIR' C744-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_OUT_ROD_CMP' C745-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_50_Pin_6' U450-6 NET 'No_Conn_FO_CH_50_Pin_7' U450-7 NET 'No_Conn_FO_CH_50_Pin_14' U450-14 NET 'No_Conn_FO_CH_50_Pin_15' U450-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_50_OUT_ROD_DIR' DPV550-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_OUT_ROD_CMP' DPV550-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV550-1 DPV550-4 NET 'MGT_FO_CH_50_OUT_HUB_DIR' DPV549-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_OUT_HUB_CMP' DPV549-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV549-1 NET 'MGT_FO_CH_50_IN_DIR' DPV548-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_IN_CMP' DPV548-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV548-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #26/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #51 # # The components in TOP side Channel #51 MGT Fanout are: # # U451 NB7VQ14M 4 way fanout chip # # C751:C754 100 nFd 0201 Output DC Blocking caps # # C755 10 nFd 0402 VRef Input ByPass cap # # C756 47 nFd 0402 Fanout VCC ByPass cap # C757 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U451-8 U451-13 NET 'FAN_1V8' C756-2 C757-2 NET 'GROUND' U451-16 NET 'GROUND' C756-1 C757-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_51' U451-2 U451-3 NET 'MGT_FO_CMR_CH_51' C755-1 NET 'GROUND' C755-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_51_IN_DIR' U451-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_51_IN_CMP' U451-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_51_OCP_ROD_DIR' U451-10 C753-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_51_OCP_ROD_CMP' U451-9 C754-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_51_OCP_HUB_DIR' U451-12 C751-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_51_OCP_HUB_CMP' U451-11 C752-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_51_OUT_ROD_DIR' C753-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_51_OUT_ROD_CMP' C754-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_51_OUT_HUB_DIR' C751-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_51_OUT_HUB_CMP' C752-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_51_Pin_6' U451-6 NET 'No_Conn_FO_CH_51_Pin_7' U451-7 NET 'No_Conn_FO_CH_51_Pin_14' U451-14 NET 'No_Conn_FO_CH_51_Pin_15' U451-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_51_OUT_ROD_DIR' DPV553-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_51_OUT_ROD_CMP' DPV553-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV553-1 DPV553-4 NET 'MGT_FO_CH_51_OUT_HUB_DIR' DPV552-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_51_OUT_HUB_CMP' DPV552-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV552-1 NET 'MGT_FO_CH_51_IN_DIR' DPV551-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_51_IN_CMP' DPV551-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV551-1 # # MGT FanOut Channel #52 # # # The components in BOTTOM side Channel #52 MGT Fanout are: # # U452 NB7VQ14M 4 way fanout chip # # C758:C761 100 nFd 0201 Output DC Blocking caps # # C762 10 nFd 0402 VRef Input ByPass cap # # C763 47 nFd 0402 Fanout VCC ByPass cap # C764 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U452-8 U452-13 NET 'FAN_1V8' C763-2 C764-1 NET 'GROUND' U452-16 NET 'GROUND' C763-1 C764-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_52' U452-2 U452-3 NET 'MGT_FO_CMR_CH_52' C762-1 NET 'GROUND' C762-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_52_IN_DIR' U452-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_IN_CMP' U452-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_52_OCP_HUB_DIR' U452-10 C760-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_OCP_HUB_CMP' U452-9 C761-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_OCP_ROD_DIR' U452-12 C758-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_OCP_ROD_CMP' U452-11 C759-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_52_OUT_HUB_DIR' C760-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_OUT_HUB_CMP' C761-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_OUT_ROD_DIR' C758-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_OUT_ROD_CMP' C759-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_52_Pin_6' U452-6 NET 'No_Conn_FO_CH_52_Pin_7' U452-7 NET 'No_Conn_FO_CH_52_Pin_14' U452-14 NET 'No_Conn_FO_CH_52_Pin_15' U452-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_52_OUT_ROD_DIR' DPV556-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_OUT_ROD_CMP' DPV556-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV556-1 DPV556-4 NET 'MGT_FO_CH_52_OUT_HUB_DIR' DPV555-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_OUT_HUB_CMP' DPV555-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV555-1 NET 'MGT_FO_CH_52_IN_DIR' DPV554-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_IN_CMP' DPV554-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV554-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #27/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #53 # # The components in TOP side Channel #53 MGT Fanout are: # # U453 NB7VQ14M 4 way fanout chip # # C765:C768 100 nFd 0201 Output DC Blocking caps # # C769 10 nFd 0402 VRef Input ByPass cap # # C770 47 nFd 0402 Fanout VCC ByPass cap # C771 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U453-8 U453-13 NET 'FAN_1V8' C770-2 C771-2 NET 'GROUND' U453-16 NET 'GROUND' C770-1 C771-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_53' U453-2 U453-3 NET 'MGT_FO_CMR_CH_53' C769-1 NET 'GROUND' C769-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_53_IN_DIR' U453-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_IN_CMP' U453-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_53_OCP_ROD_DIR' U453-10 C767-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_OCP_ROD_CMP' U453-9 C768-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_OCP_HUB_DIR' U453-12 C765-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_OCP_HUB_CMP' U453-11 C766-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_53_OUT_ROD_DIR' C767-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_OUT_ROD_CMP' C768-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_OUT_HUB_DIR' C765-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_OUT_HUB_CMP' C766-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_53_Pin_6' U453-6 NET 'No_Conn_FO_CH_53_Pin_7' U453-7 NET 'No_Conn_FO_CH_53_Pin_14' U453-14 NET 'No_Conn_FO_CH_53_Pin_15' U453-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_53_OUT_ROD_DIR' DPV559-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_OUT_ROD_CMP' DPV559-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV559-1 DPV559-4 NET 'MGT_FO_CH_53_OUT_HUB_DIR' DPV558-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_OUT_HUB_CMP' DPV558-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV558-1 NET 'MGT_FO_CH_53_IN_DIR' DPV557-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_IN_CMP' DPV557-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV557-1 # # MGT FanOut Channel #54 # # # The components in BOTTOM side Channel #54 MGT Fanout are: # # U454 NB7VQ14M 4 way fanout chip # # C772:C775 100 nFd 0201 Output DC Blocking caps # # C776 10 nFd 0402 VRef Input ByPass cap # # C777 47 nFd 0402 Fanout VCC ByPass cap # C778 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U454-8 U454-13 NET 'FAN_1V8' C777-2 C778-1 NET 'GROUND' U454-16 NET 'GROUND' C777-1 C778-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_54' U454-2 U454-3 NET 'MGT_FO_CMR_CH_54' C776-1 NET 'GROUND' C776-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_54_IN_DIR' U454-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_IN_CMP' U454-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_54_OCP_HUB_DIR' U454-10 C774-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_OCP_HUB_CMP' U454-9 C775-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_OCP_ROD_DIR' U454-12 C772-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_OCP_ROD_CMP' U454-11 C773-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_54_OUT_HUB_DIR' C774-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_OUT_HUB_CMP' C775-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_OUT_ROD_DIR' C772-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_OUT_ROD_CMP' C773-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_54_Pin_6' U454-6 NET 'No_Conn_FO_CH_54_Pin_7' U454-7 NET 'No_Conn_FO_CH_54_Pin_14' U454-14 NET 'No_Conn_FO_CH_54_Pin_15' U454-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_54_OUT_ROD_DIR' DPV562-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_OUT_ROD_CMP' DPV562-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV562-1 DPV562-4 NET 'MGT_FO_CH_54_OUT_HUB_DIR' DPV561-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_OUT_HUB_CMP' DPV561-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV561-1 NET 'MGT_FO_CH_54_IN_DIR' DPV560-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_IN_CMP' DPV560-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV560-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #28/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #55 # # The components in TOP side Channel #55 MGT Fanout are: # # U455 NB7VQ14M 4 way fanout chip # # C779:C782 100 nFd 0201 Output DC Blocking caps # # C783 10 nFd 0402 VRef Input ByPass cap # # C784 47 nFd 0402 Fanout VCC ByPass cap # C785 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U455-8 U455-13 NET 'FAN_1V8' C784-2 C785-2 NET 'GROUND' U455-16 NET 'GROUND' C784-1 C785-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_55' U455-2 U455-3 NET 'MGT_FO_CMR_CH_55' C783-1 NET 'GROUND' C783-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_55_IN_DIR' U455-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_IN_CMP' U455-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_55_OCP_ROD_DIR' U455-10 C781-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_OCP_ROD_CMP' U455-9 C782-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_OCP_HUB_DIR' U455-12 C779-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_OCP_HUB_CMP' U455-11 C780-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_55_OUT_ROD_DIR' C781-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_OUT_ROD_CMP' C782-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_OUT_HUB_DIR' C779-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_OUT_HUB_CMP' C780-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_55_Pin_6' U455-6 NET 'No_Conn_FO_CH_55_Pin_7' U455-7 NET 'No_Conn_FO_CH_55_Pin_14' U455-14 NET 'No_Conn_FO_CH_55_Pin_15' U455-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_55_OUT_ROD_DIR' DPV565-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_OUT_ROD_CMP' DPV565-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV565-1 DPV565-4 NET 'MGT_FO_CH_55_OUT_HUB_DIR' DPV564-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_OUT_HUB_CMP' DPV564-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV564-1 NET 'MGT_FO_CH_55_IN_DIR' DPV563-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_IN_CMP' DPV563-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV563-1 # # MGT FanOut Channel #56 # # # The components in BOTTOM side Channel #56 MGT Fanout are: # # U456 NB7VQ14M 4 way fanout chip # # C786:C789 100 nFd 0201 Output DC Blocking caps # # C790 10 nFd 0402 VRef Input ByPass cap # # C791 47 nFd 0402 Fanout VCC ByPass cap # C792 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U456-8 U456-13 NET 'FAN_1V8' C791-2 C792-1 NET 'GROUND' U456-16 NET 'GROUND' C791-1 C792-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_56' U456-2 U456-3 NET 'MGT_FO_CMR_CH_56' C790-1 NET 'GROUND' C790-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_56_IN_DIR' U456-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_IN_CMP' U456-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_56_OCP_HUB_DIR' U456-10 C788-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_OCP_HUB_CMP' U456-9 C789-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_OCP_ROD_DIR' U456-12 C786-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_OCP_ROD_CMP' U456-11 C787-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_56_OUT_HUB_DIR' C788-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_OUT_HUB_CMP' C789-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_OUT_ROD_DIR' C786-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_OUT_ROD_CMP' C787-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_56_Pin_6' U456-6 NET 'No_Conn_FO_CH_56_Pin_7' U456-7 NET 'No_Conn_FO_CH_56_Pin_14' U456-14 NET 'No_Conn_FO_CH_56_Pin_15' U456-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_56_OUT_ROD_DIR' DPV568-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_OUT_ROD_CMP' DPV568-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV568-1 DPV568-4 NET 'MGT_FO_CH_56_OUT_HUB_DIR' DPV567-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_OUT_HUB_CMP' DPV567-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV567-1 NET 'MGT_FO_CH_56_IN_DIR' DPV566-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_IN_CMP' DPV566-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV566-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #29/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #57 # # The components in TOP side Channel #57 MGT Fanout are: # # U457 NB7VQ14M 4 way fanout chip # # C793:C796 100 nFd 0201 Output DC Blocking caps # # C797 10 nFd 0402 VRef Input ByPass cap # # C798 47 nFd 0402 Fanout VCC ByPass cap # C799 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U457-8 U457-13 NET 'FAN_1V8' C798-2 C799-2 NET 'GROUND' U457-16 NET 'GROUND' C798-1 C799-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_57' U457-2 U457-3 NET 'MGT_FO_CMR_CH_57' C797-1 NET 'GROUND' C797-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_57_IN_DIR' U457-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_57_IN_CMP' U457-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_57_OCP_ROD_DIR' U457-10 C795-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_57_OCP_ROD_CMP' U457-9 C796-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_57_OCP_HUB_DIR' U457-12 C793-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_57_OCP_HUB_CMP' U457-11 C794-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_57_OUT_ROD_DIR' C795-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_57_OUT_ROD_CMP' C796-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_57_OUT_HUB_DIR' C793-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_57_OUT_HUB_CMP' C794-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_57_Pin_6' U457-6 NET 'No_Conn_FO_CH_57_Pin_7' U457-7 NET 'No_Conn_FO_CH_57_Pin_14' U457-14 NET 'No_Conn_FO_CH_57_Pin_15' U457-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_57_OUT_ROD_DIR' DPV571-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_57_OUT_ROD_CMP' DPV571-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV571-1 DPV571-4 NET 'MGT_FO_CH_57_IN_DIR' DPV569-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_57_IN_CMP' DPV569-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV569-1 # # MGT FanOut Channel #58 # # # The components in BOTTOM side Channel #58 MGT Fanout are: # # U458 NB7VQ14M 4 way fanout chip # # C800:C803 100 nFd 0201 Output DC Blocking caps # # C804 10 nFd 0402 VRef Input ByPass cap # # C805 47 nFd 0402 Fanout VCC ByPass cap # C806 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U458-8 U458-13 NET 'FAN_1V8' C805-2 C806-1 NET 'GROUND' U458-16 NET 'GROUND' C805-1 C806-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_58' U458-2 U458-3 NET 'MGT_FO_CMR_CH_58' C804-1 NET 'GROUND' C804-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_58_IN_DIR' U458-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_IN_CMP' U458-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_58_OCP_HUB_DIR' U458-10 C802-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_OCP_HUB_CMP' U458-9 C803-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_OCP_ROD_DIR' U458-12 C800-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_OCP_ROD_CMP' U458-11 C801-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_58_OUT_HUB_DIR' C802-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_OUT_HUB_CMP' C803-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_OUT_ROD_DIR' C800-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_OUT_ROD_CMP' C801-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_58_Pin_6' U458-6 NET 'No_Conn_FO_CH_58_Pin_7' U458-7 NET 'No_Conn_FO_CH_58_Pin_14' U458-14 NET 'No_Conn_FO_CH_58_Pin_15' U458-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_58_OUT_ROD_DIR' DPV574-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_OUT_ROD_CMP' DPV574-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV574-1 DPV574-4 NET 'MGT_FO_CH_58_OUT_HUB_DIR' DPV573-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_OUT_HUB_CMP' DPV573-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV573-1 NET 'MGT_FO_CH_58_IN_DIR' DPV572-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_IN_CMP' DPV572-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV572-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #30/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #59 # # The components in TOP side Channel #59 MGT Fanout are: # # U459 NB7VQ14M 4 way fanout chip # # C807:C810 100 nFd 0201 Output DC Blocking caps # # C811 10 nFd 0402 VRef Input ByPass cap # # C812 47 nFd 0402 Fanout VCC ByPass cap # C813 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U459-8 U459-13 NET 'FAN_1V8' C812-2 C813-2 NET 'GROUND' U459-16 NET 'GROUND' C812-1 C813-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_59' U459-2 U459-3 NET 'MGT_FO_CMR_CH_59' C811-1 NET 'GROUND' C811-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_59_IN_DIR' U459-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_IN_CMP' U459-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_59_OCP_ROD_DIR' U459-10 C809-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_OCP_ROD_CMP' U459-9 C810-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_OCP_HUB_DIR' U459-12 C807-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_OCP_HUB_CMP' U459-11 C808-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_59_OUT_ROD_DIR' C809-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_OUT_ROD_CMP' C810-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_OUT_HUB_DIR' C807-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_OUT_HUB_CMP' C808-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_59_Pin_6' U459-6 NET 'No_Conn_FO_CH_59_Pin_7' U459-7 NET 'No_Conn_FO_CH_59_Pin_14' U459-14 NET 'No_Conn_FO_CH_59_Pin_15' U459-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_59_OUT_ROD_DIR' DPV577-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_OUT_ROD_CMP' DPV577-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV577-1 DPV577-4 NET 'MGT_FO_CH_59_OUT_HUB_DIR' DPV576-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_OUT_HUB_CMP' DPV576-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV576-1 NET 'MGT_FO_CH_59_IN_DIR' DPV575-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_IN_CMP' DPV575-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV575-1 # # MGT FanOut Channel #60 # # # The components in BOTTOM side Channel #60 MGT Fanout are: # # U460 NB7VQ14M 4 way fanout chip # # C814:C817 100 nFd 0201 Output DC Blocking caps # # C818 10 nFd 0402 VRef Input ByPass cap # # C819 47 nFd 0402 Fanout VCC ByPass cap # C820 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U460-8 U460-13 NET 'FAN_1V8' C819-2 C820-1 NET 'GROUND' U460-16 NET 'GROUND' C819-1 C820-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_60' U460-2 U460-3 NET 'MGT_FO_CMR_CH_60' C818-1 NET 'GROUND' C818-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_60_IN_DIR' U460-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_IN_CMP' U460-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_60_OCP_HUB_DIR' U460-10 C816-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_OCP_HUB_CMP' U460-9 C817-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_OCP_ROD_DIR' U460-12 C814-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_OCP_ROD_CMP' U460-11 C815-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_60_OUT_HUB_DIR' C816-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_OUT_HUB_CMP' C817-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_OUT_ROD_DIR' C814-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_OUT_ROD_CMP' C815-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_60_Pin_6' U460-6 NET 'No_Conn_FO_CH_60_Pin_7' U460-7 NET 'No_Conn_FO_CH_60_Pin_14' U460-14 NET 'No_Conn_FO_CH_60_Pin_15' U460-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_60_OUT_ROD_DIR' DPV580-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_OUT_ROD_CMP' DPV580-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV580-1 DPV580-4 NET 'MGT_FO_CH_60_OUT_HUB_DIR' DPV579-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_OUT_HUB_CMP' DPV579-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV579-1 NET 'MGT_FO_CH_60_IN_DIR' DPV578-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_IN_CMP' DPV578-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV578-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #31/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #61 # # The components in TOP side Channel #61 MGT Fanout are: # # U461 NB7VQ14M 4 way fanout chip # # C821:C824 100 nFd 0201 Output DC Blocking caps # # C825 10 nFd 0402 VRef Input ByPass cap # # C826 47 nFd 0402 Fanout VCC ByPass cap # C827 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U461-8 U461-13 NET 'FAN_1V8' C826-2 C827-2 NET 'GROUND' U461-16 NET 'GROUND' C826-1 C827-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_61' U461-2 U461-3 NET 'MGT_FO_CMR_CH_61' C825-1 NET 'GROUND' C825-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_61_IN_DIR' U461-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_IN_CMP' U461-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_61_OCP_ROD_DIR' U461-10 C823-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_OCP_ROD_CMP' U461-9 C824-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_OCP_HUB_DIR' U461-12 C821-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_OCP_HUB_CMP' U461-11 C822-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_61_OUT_ROD_DIR' C823-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_OUT_ROD_CMP' C824-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_OUT_HUB_DIR' C821-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_OUT_HUB_CMP' C822-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_61_Pin_6' U461-6 NET 'No_Conn_FO_CH_61_Pin_7' U461-7 NET 'No_Conn_FO_CH_61_Pin_14' U461-14 NET 'No_Conn_FO_CH_61_Pin_15' U461-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_61_OUT_ROD_DIR' DPV583-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_OUT_ROD_CMP' DPV583-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV583-1 DPV583-4 NET 'MGT_FO_CH_61_OUT_HUB_DIR' DPV582-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_OUT_HUB_CMP' DPV582-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV582-1 NET 'MGT_FO_CH_61_IN_DIR' DPV581-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_IN_CMP' DPV581-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV581-1 # # MGT FanOut Channel #62 # # # The components in BOTTOM side Channel #62 MGT Fanout are: # # U462 NB7VQ14M 4 way fanout chip # # C828:C831 100 nFd 0201 Output DC Blocking caps # # C832 10 nFd 0402 VRef Input ByPass cap # # C833 47 nFd 0402 Fanout VCC ByPass cap # C834 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U462-8 U462-13 NET 'FAN_1V8' C833-2 C834-1 NET 'GROUND' U462-16 NET 'GROUND' C833-1 C834-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_62' U462-2 U462-3 NET 'MGT_FO_CMR_CH_62' C832-1 NET 'GROUND' C832-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_62_IN_DIR' U462-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_IN_CMP' U462-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_62_OCP_HUB_DIR' U462-10 C830-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_OCP_HUB_CMP' U462-9 C831-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_OCP_ROD_DIR' U462-12 C828-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_OCP_ROD_CMP' U462-11 C829-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_62_OUT_HUB_DIR' C830-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_OUT_HUB_CMP' C831-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_OUT_ROD_DIR' C828-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_OUT_ROD_CMP' C829-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_62_Pin_6' U462-6 NET 'No_Conn_FO_CH_62_Pin_7' U462-7 NET 'No_Conn_FO_CH_62_Pin_14' U462-14 NET 'No_Conn_FO_CH_62_Pin_15' U462-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_62_OUT_ROD_DIR' DPV586-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_OUT_ROD_CMP' DPV586-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV586-1 DPV586-4 NET 'MGT_FO_CH_62_OUT_HUB_DIR' DPV585-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_OUT_HUB_CMP' DPV585-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV585-1 NET 'MGT_FO_CH_62_IN_DIR' DPV584-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_IN_CMP' DPV584-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV584-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #32/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #63 # # The components in TOP side Channel #63 MGT Fanout are: # # U463 NB7VQ14M 4 way fanout chip # # C835:C838 100 nFd 0201 Output DC Blocking caps # # C839 10 nFd 0402 VRef Input ByPass cap # # C840 47 nFd 0402 Fanout VCC ByPass cap # C841 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U463-8 U463-13 NET 'FAN_1V8' C840-2 C841-2 NET 'GROUND' U463-16 NET 'GROUND' C840-1 C841-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_63' U463-2 U463-3 NET 'MGT_FO_CMR_CH_63' C839-1 NET 'GROUND' C839-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_63_IN_DIR' U463-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_63_IN_CMP' U463-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_63_OCP_ROD_DIR' U463-10 C837-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_63_OCP_ROD_CMP' U463-9 C838-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_63_OCP_HUB_DIR' U463-12 C835-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_63_OCP_HUB_CMP' U463-11 C836-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_63_OUT_ROD_DIR' C837-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_63_OUT_ROD_CMP' C838-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_63_OUT_HUB_DIR' C835-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_63_OUT_HUB_CMP' C836-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_63_Pin_6' U463-6 NET 'No_Conn_FO_CH_63_Pin_7' U463-7 NET 'No_Conn_FO_CH_63_Pin_14' U463-14 NET 'No_Conn_FO_CH_63_Pin_15' U463-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_63_OUT_ROD_DIR' DPV589-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_63_OUT_ROD_CMP' DPV589-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV589-1 DPV589-4 NET 'MGT_FO_CH_63_OUT_HUB_DIR' DPV588-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_63_OUT_HUB_CMP' DPV588-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV588-1 NET 'MGT_FO_CH_63_IN_DIR' DPV587-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_63_IN_CMP' DPV587-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV587-1 # # MGT FanOut Channel #64 # # # The components in BOTTOM side Channel #64 MGT Fanout are: # # U464 NB7VQ14M 4 way fanout chip # # C842:C845 100 nFd 0201 Output DC Blocking caps # # C846 10 nFd 0402 VRef Input ByPass cap # # C847 47 nFd 0402 Fanout VCC ByPass cap # C848 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U464-8 U464-13 NET 'FAN_1V8' C847-2 C848-1 NET 'GROUND' U464-16 NET 'GROUND' C847-1 C848-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_64' U464-2 U464-3 NET 'MGT_FO_CMR_CH_64' C846-1 NET 'GROUND' C846-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_64_IN_DIR' U464-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_IN_CMP' U464-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_64_OCP_HUB_DIR' U464-10 C844-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_OCP_HUB_CMP' U464-9 C845-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_OCP_ROD_DIR' U464-12 C842-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_OCP_ROD_CMP' U464-11 C843-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_64_OUT_HUB_DIR' C844-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_OUT_HUB_CMP' C845-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_OUT_ROD_DIR' C842-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_OUT_ROD_CMP' C843-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_64_Pin_6' U464-6 NET 'No_Conn_FO_CH_64_Pin_7' U464-7 NET 'No_Conn_FO_CH_64_Pin_14' U464-14 NET 'No_Conn_FO_CH_64_Pin_15' U464-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_64_OUT_ROD_DIR' DPV592-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_OUT_ROD_CMP' DPV592-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV592-1 DPV592-4 NET 'MGT_FO_CH_64_OUT_HUB_DIR' DPV591-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_OUT_HUB_CMP' DPV591-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV591-1 NET 'MGT_FO_CH_64_IN_DIR' DPV590-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_IN_CMP' DPV590-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV590-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #33/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #65 # # The components in TOP side Channel #65 MGT Fanout are: # # U465 NB7VQ14M 4 way fanout chip # # C849:C852 100 nFd 0201 Output DC Blocking caps # # C853 10 nFd 0402 VRef Input ByPass cap # # C854 47 nFd 0402 Fanout VCC ByPass cap # C855 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U465-8 U465-13 NET 'FAN_1V8' C854-2 C855-2 NET 'GROUND' U465-16 NET 'GROUND' C854-1 C855-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_65' U465-2 U465-3 NET 'MGT_FO_CMR_CH_65' C853-1 NET 'GROUND' C853-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_65_IN_DIR' U465-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_65_IN_CMP' U465-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_65_OCP_ROD_DIR' U465-10 C851-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_65_OCP_ROD_CMP' U465-9 C852-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_65_OCP_HUB_DIR' U465-12 C849-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_65_OCP_HUB_CMP' U465-11 C850-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_65_OUT_ROD_DIR' C851-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_65_OUT_ROD_CMP' C852-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_65_OUT_HUB_DIR' C849-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_65_OUT_HUB_CMP' C850-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_65_Pin_6' U465-6 NET 'No_Conn_FO_CH_65_Pin_7' U465-7 NET 'No_Conn_FO_CH_65_Pin_14' U465-14 NET 'No_Conn_FO_CH_65_Pin_15' U465-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_65_OUT_ROD_DIR' DPV595-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_65_OUT_ROD_CMP' DPV595-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV595-1 DPV595-4 NET 'MGT_FO_CH_65_IN_DIR' DPV593-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_65_IN_CMP' DPV593-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV593-1 # # MGT FanOut Channel #66 # # # The components in BOTTOM side Channel #66 MGT Fanout are: # # U466 NB7VQ14M 4 way fanout chip # # C856:C859 100 nFd 0201 Output DC Blocking caps # # C860 10 nFd 0402 VRef Input ByPass cap # # C861 47 nFd 0402 Fanout VCC ByPass cap # C862 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U466-8 U466-13 NET 'FAN_1V8' C861-2 C862-1 NET 'GROUND' U466-16 NET 'GROUND' C861-1 C862-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_66' U466-2 U466-3 NET 'MGT_FO_CMR_CH_66' C860-1 NET 'GROUND' C860-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_66_IN_DIR' U466-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_IN_CMP' U466-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_66_OCP_HUB_DIR' U466-10 C858-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_OCP_HUB_CMP' U466-9 C859-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_OCP_ROD_DIR' U466-12 C856-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_OCP_ROD_CMP' U466-11 C857-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_66_OUT_HUB_DIR' C858-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_OUT_HUB_CMP' C859-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_OUT_ROD_DIR' C856-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_OUT_ROD_CMP' C857-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_66_Pin_6' U466-6 NET 'No_Conn_FO_CH_66_Pin_7' U466-7 NET 'No_Conn_FO_CH_66_Pin_14' U466-14 NET 'No_Conn_FO_CH_66_Pin_15' U466-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_66_OUT_ROD_DIR' DPV598-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_OUT_ROD_CMP' DPV598-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV598-1 DPV598-4 NET 'MGT_FO_CH_66_OUT_HUB_DIR' DPV597-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_OUT_HUB_CMP' DPV597-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV597-1 NET 'MGT_FO_CH_66_IN_DIR' DPV596-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_IN_CMP' DPV596-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV596-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #34/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #67 # # The components in TOP side Channel #67 MGT Fanout are: # # U467 NB7VQ14M 4 way fanout chip # # C863:C866 100 nFd 0201 Output DC Blocking caps # # C867 10 nFd 0402 VRef Input ByPass cap # # C868 47 nFd 0402 Fanout VCC ByPass cap # C869 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U467-8 U467-13 NET 'FAN_1V8' C868-2 C869-2 NET 'GROUND' U467-16 NET 'GROUND' C868-1 C869-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_67' U467-2 U467-3 NET 'MGT_FO_CMR_CH_67' C867-1 NET 'GROUND' C867-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_67_IN_DIR' U467-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_IN_CMP' U467-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_67_OCP_ROD_DIR' U467-10 C865-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_OCP_ROD_CMP' U467-9 C866-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_OCP_HUB_DIR' U467-12 C863-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_OCP_HUB_CMP' U467-11 C864-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_67_OUT_ROD_DIR' C865-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_OUT_ROD_CMP' C866-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_OUT_HUB_DIR' C863-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_OUT_HUB_CMP' C864-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_67_Pin_6' U467-6 NET 'No_Conn_FO_CH_67_Pin_7' U467-7 NET 'No_Conn_FO_CH_67_Pin_14' U467-14 NET 'No_Conn_FO_CH_67_Pin_15' U467-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_67_OUT_ROD_DIR' DPV601-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_OUT_ROD_CMP' DPV601-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV601-1 DPV601-4 NET 'MGT_FO_CH_67_OUT_HUB_DIR' DPV600-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_OUT_HUB_CMP' DPV600-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV600-1 NET 'MGT_FO_CH_67_IN_DIR' DPV599-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_IN_CMP' DPV599-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV599-1 # # MGT FanOut Channel #68 # # # The components in BOTTOM side Channel #68 MGT Fanout are: # # U468 NB7VQ14M 4 way fanout chip # # C870:C873 100 nFd 0201 Output DC Blocking caps # # C874 10 nFd 0402 VRef Input ByPass cap # # C875 47 nFd 0402 Fanout VCC ByPass cap # C876 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U468-8 U468-13 NET 'FAN_1V8' C875-2 C876-1 NET 'GROUND' U468-16 NET 'GROUND' C875-1 C876-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_68' U468-2 U468-3 NET 'MGT_FO_CMR_CH_68' C874-1 NET 'GROUND' C874-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_68_IN_DIR' U468-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_IN_CMP' U468-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_68_OCP_HUB_DIR' U468-10 C872-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_OCP_HUB_CMP' U468-9 C873-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_OCP_ROD_DIR' U468-12 C870-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_OCP_ROD_CMP' U468-11 C871-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_68_OUT_HUB_DIR' C872-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_OUT_HUB_CMP' C873-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_OUT_ROD_DIR' C870-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_OUT_ROD_CMP' C871-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_68_Pin_6' U468-6 NET 'No_Conn_FO_CH_68_Pin_7' U468-7 NET 'No_Conn_FO_CH_68_Pin_14' U468-14 NET 'No_Conn_FO_CH_68_Pin_15' U468-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_68_OUT_ROD_DIR' DPV604-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_OUT_ROD_CMP' DPV604-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV604-1 DPV604-4 NET 'MGT_FO_CH_68_OUT_HUB_DIR' DPV603-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_OUT_HUB_CMP' DPV603-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV603-1 NET 'MGT_FO_CH_68_IN_DIR' DPV602-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_IN_CMP' DPV602-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV602-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #35/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #69 # # The components in TOP side Channel #69 MGT Fanout are: # # U469 NB7VQ14M 4 way fanout chip # # C877:C880 100 nFd 0201 Output DC Blocking caps # # C881 10 nFd 0402 VRef Input ByPass cap # # C882 47 nFd 0402 Fanout VCC ByPass cap # C883 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U469-8 U469-13 NET 'FAN_1V8' C882-2 C883-2 NET 'GROUND' U469-16 NET 'GROUND' C882-1 C883-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_69' U469-2 U469-3 NET 'MGT_FO_CMR_CH_69' C881-1 NET 'GROUND' C881-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_69_IN_DIR' U469-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_69_IN_CMP' U469-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_69_OCP_ROD_DIR' U469-10 C879-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_69_OCP_ROD_CMP' U469-9 C880-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_69_OCP_HUB_DIR' U469-12 C877-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_69_OCP_HUB_CMP' U469-11 C878-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_69_OUT_ROD_DIR' C879-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_69_OUT_ROD_CMP' C880-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_69_OUT_HUB_DIR' C877-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_69_OUT_HUB_CMP' C878-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_69_Pin_6' U469-6 NET 'No_Conn_FO_CH_69_Pin_7' U469-7 NET 'No_Conn_FO_CH_69_Pin_14' U469-14 NET 'No_Conn_FO_CH_69_Pin_15' U469-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_69_OUT_ROD_DIR' DPV607-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_69_OUT_ROD_CMP' DPV607-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV607-1 DPV607-4 NET 'MGT_FO_CH_69_OUT_HUB_DIR' DPV606-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_69_OUT_HUB_CMP' DPV606-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV606-1 NET 'MGT_FO_CH_69_IN_DIR' DPV605-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_69_IN_CMP' DPV605-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV605-1 # # MGT FanOut Channel #70 # # # The components in BOTTOM side Channel #70 MGT Fanout are: # # U470 NB7VQ14M 4 way fanout chip # # C884:C887 100 nFd 0201 Output DC Blocking caps # # C888 10 nFd 0402 VRef Input ByPass cap # # C889 47 nFd 0402 Fanout VCC ByPass cap # C890 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U470-8 U470-13 NET 'FAN_1V8' C889-2 C890-1 NET 'GROUND' U470-16 NET 'GROUND' C889-1 C890-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_70' U470-2 U470-3 NET 'MGT_FO_CMR_CH_70' C888-1 NET 'GROUND' C888-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_70_IN_DIR' U470-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_IN_CMP' U470-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_70_OCP_HUB_DIR' U470-10 C886-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_OCP_HUB_CMP' U470-9 C887-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_OCP_ROD_DIR' U470-12 C884-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_OCP_ROD_CMP' U470-11 C885-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_70_OUT_HUB_DIR' C886-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_OUT_HUB_CMP' C887-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_OUT_ROD_DIR' C884-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_OUT_ROD_CMP' C885-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_70_Pin_6' U470-6 NET 'No_Conn_FO_CH_70_Pin_7' U470-7 NET 'No_Conn_FO_CH_70_Pin_14' U470-14 NET 'No_Conn_FO_CH_70_Pin_15' U470-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_70_OUT_ROD_DIR' DPV610-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_OUT_ROD_CMP' DPV610-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV610-1 DPV610-4 NET 'MGT_FO_CH_70_OUT_HUB_DIR' DPV609-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_OUT_HUB_CMP' DPV609-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV609-1 NET 'MGT_FO_CH_70_IN_DIR' DPV608-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_IN_CMP' DPV608-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV608-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #36/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #71 # # The components in TOP side Channel #71 MGT Fanout are: # # U471 NB7VQ14M 4 way fanout chip # # C891:C894 100 nFd 0201 Output DC Blocking caps # # C895 10 nFd 0402 VRef Input ByPass cap # # C896 47 nFd 0402 Fanout VCC ByPass cap # C897 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U471-8 U471-13 NET 'FAN_1V8' C896-2 C897-2 NET 'GROUND' U471-16 NET 'GROUND' C896-1 C897-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_71' U471-2 U471-3 NET 'MGT_FO_CMR_CH_71' C895-1 NET 'GROUND' C895-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_71_IN_DIR' U471-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_IN_CMP' U471-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_71_OCP_ROD_DIR' U471-10 C893-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_OCP_ROD_CMP' U471-9 C894-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_OCP_HUB_DIR' U471-12 C891-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_OCP_HUB_CMP' U471-11 C892-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_71_OUT_ROD_DIR' C893-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_OUT_ROD_CMP' C894-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_OUT_HUB_DIR' C891-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_OUT_HUB_CMP' C892-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_71_Pin_6' U471-6 NET 'No_Conn_FO_CH_71_Pin_7' U471-7 NET 'No_Conn_FO_CH_71_Pin_14' U471-14 NET 'No_Conn_FO_CH_71_Pin_15' U471-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_71_OUT_ROD_DIR' DPV613-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_OUT_ROD_CMP' DPV613-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV613-1 DPV613-4 NET 'MGT_FO_CH_71_OUT_HUB_DIR' DPV612-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_OUT_HUB_CMP' DPV612-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV612-1 NET 'MGT_FO_CH_71_IN_DIR' DPV611-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_IN_CMP' DPV611-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV611-1 # # MGT FanOut Channel #72 # # # The components in BOTTOM side Channel #72 MGT Fanout are: # # U472 NB7VQ14M 4 way fanout chip # # C898:C901 100 nFd 0201 Output DC Blocking caps # # C902 10 nFd 0402 VRef Input ByPass cap # # C903 47 nFd 0402 Fanout VCC ByPass cap # C904 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U472-8 U472-13 NET 'FAN_1V8' C903-2 C904-1 NET 'GROUND' U472-16 NET 'GROUND' C903-1 C904-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_72' U472-2 U472-3 NET 'MGT_FO_CMR_CH_72' C902-1 NET 'GROUND' C902-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_72_IN_DIR' U472-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_IN_CMP' U472-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_72_OCP_HUB_DIR' U472-10 C900-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_OCP_HUB_CMP' U472-9 C901-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_OCP_ROD_DIR' U472-12 C898-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_OCP_ROD_CMP' U472-11 C899-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_72_OUT_HUB_DIR' C900-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_OUT_HUB_CMP' C901-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_OUT_ROD_DIR' C898-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_OUT_ROD_CMP' C899-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_72_Pin_6' U472-6 NET 'No_Conn_FO_CH_72_Pin_7' U472-7 NET 'No_Conn_FO_CH_72_Pin_14' U472-14 NET 'No_Conn_FO_CH_72_Pin_15' U472-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_72_OUT_ROD_DIR' DPV616-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_OUT_ROD_CMP' DPV616-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV616-1 DPV616-4 NET 'MGT_FO_CH_72_OUT_HUB_DIR' DPV615-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_OUT_HUB_CMP' DPV615-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV615-1 NET 'MGT_FO_CH_72_IN_DIR' DPV614-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_IN_CMP' DPV614-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV614-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # MIGT>---------------------------------------------- # MIGT> V1.0 -- Tue Jan 17 13:04:52 2017 # MIGT> begin substituting from -- instance #37/37 # MIGT>---------------------------------------------- # # Hub Module # # MGT Fanout Nets Template File # --------------------------------------- # # # Original Rev. 24-Mar-2015 # Most Recent Rev. 17-Jan-2017 # # # This file is the Nets for two channels of the Hub Module MGT Fanout. # One channel (e.g. Ch #1) is on the Top side of the card and # the other channel (e.g. Ch #2) is on the Bottom side of the card. # # # NOTE: The Ground connections to pins 17, 18, 19, 20 # of the fanout chips are not made in this file. # There is a separate nets file that holds just # these fanout chip DAP pad ground connections. # # # MGT FanOut Channel #73 # # The components in TOP side Channel #73 MGT Fanout are: # # U473 NB7VQ14M 4 way fanout chip # # C905:C908 100 nFd 0201 Output DC Blocking caps # # C909 10 nFd 0402 VRef Input ByPass cap # # C910 47 nFd 0402 Fanout VCC ByPass cap # C911 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U473-8 U473-13 NET 'FAN_1V8' C910-2 C911-2 NET 'GROUND' U473-16 NET 'GROUND' C910-1 C911-1 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_73' U473-2 U473-3 NET 'MGT_FO_CMR_CH_73' C909-1 NET 'GROUND' C909-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_73_IN_DIR' U473-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_IN_CMP' U473-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_73_OCP_ROD_DIR' U473-10 C907-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_OCP_ROD_CMP' U473-9 C908-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_OCP_HUB_DIR' U473-12 C905-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_OCP_HUB_CMP' U473-11 C906-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_73_OUT_ROD_DIR' C907-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_OUT_ROD_CMP' C908-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_OUT_HUB_DIR' C905-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_OUT_HUB_CMP' C906-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_73_Pin_6' U473-6 NET 'No_Conn_FO_CH_73_Pin_7' U473-7 NET 'No_Conn_FO_CH_73_Pin_14' U473-14 NET 'No_Conn_FO_CH_73_Pin_15' U473-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_73_OUT_ROD_DIR' DPV619-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_OUT_ROD_CMP' DPV619-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV619-1 DPV619-4 NET 'MGT_FO_CH_73_OUT_HUB_DIR' DPV618-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_OUT_HUB_CMP' DPV618-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV618-1 NET 'MGT_FO_CH_73_IN_DIR' DPV617-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_IN_CMP' DPV617-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV617-1 # # MGT FanOut Channel #74 # # # The components in BOTTOM side Channel #74 MGT Fanout are: # # U474 NB7VQ14M 4 way fanout chip # # C912:C915 100 nFd 0201 Output DC Blocking caps # # C916 10 nFd 0402 VRef Input ByPass cap # # C917 47 nFd 0402 Fanout VCC ByPass cap # C918 100 nFd 0402 Fanout VCC ByPass cap # # # Connect the 2.5 Volt VCC power, bypass caps, and grounds # NET 'FAN_1V8' U474-8 U474-13 NET 'FAN_1V8' C917-2 C918-1 NET 'GROUND' U474-16 NET 'GROUND' C917-1 C918-2 # # Connect the Input Common Mode Reference and its ByPass Cap # NET 'MGT_FO_CMR_CH_74' U474-2 U474-3 NET 'MGT_FO_CMR_CH_74' C916-1 NET 'GROUND' C916-2 # # Define the Input Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_74_IN_DIR' U474-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_IN_CMP' U474-4 (NET_TYPE, 'DIFF_PAIR_HS') # # Connect the Fanout Chip's Outputs to the DC Blocking Caps # NET 'MGT_FO_CH_74_OCP_HUB_DIR' U474-10 C914-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_OCP_HUB_CMP' U474-9 C915-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_OCP_ROD_DIR' U474-12 C912-1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_OCP_ROD_CMP' U474-11 C913-1 (NET_TYPE, 'DIFF_PAIR_HS') # # Define the Output Net-Name to this Channel of the MGT Fanout # NET 'MGT_FO_CH_74_OUT_HUB_DIR' C914-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_OUT_HUB_CMP' C915-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_OUT_ROD_DIR' C912-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_OUT_ROD_CMP' C913-2 (NET_TYPE, 'DIFF_PAIR_HS') # # Assign Net-Names to the UnUsed Pins on the Fanout Chip # NET 'No_Conn_FO_CH_74_Pin_6' U474-6 NET 'No_Conn_FO_CH_74_Pin_7' U474-7 NET 'No_Conn_FO_CH_74_Pin_14' U474-14 NET 'No_Conn_FO_CH_74_Pin_15' U474-15 # # Define the connections to the Via Arrays # NET 'MGT_FO_CH_74_OUT_ROD_DIR' DPV622-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_OUT_ROD_CMP' DPV622-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV622-1 DPV622-4 NET 'MGT_FO_CH_74_OUT_HUB_DIR' DPV621-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_OUT_HUB_CMP' DPV621-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV621-1 NET 'MGT_FO_CH_74_IN_DIR' DPV620-3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_IN_CMP' DPV620-2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'GROUND' DPV620-1 # MIGT>---------------------------------------------- # MIGT> done substituting from # # Additional Statements for the # # MGT Fanout Nets File # # # # Original Version: 23-Apr_2016 # Current Version: 23-Nov-2016 GTH->MGT # # # # This file contains additional statements that are needed # in the discription of the MGT Fanout Nets. # # Most of these nets statements have to do with # components at the edges of the MGT Fanout Array, # e.g. the ground vias at the East and West edges # of the array that complete the ground returns on # both sides of a differential via pair. # # These nets statements are not included in the # aa_build_gth_fanout_nets.sh file because the # sed editor called by that script seems to have # trouble with append comands that include appenging # a line that includes single quotes, i.e. '. # The single quotes are needed around netnames in # the net statements. # # ## ## ADD to the end of the MGT Fanout netlist some ## one-of-a-kind connections that were not generated ## during the Mighty multiple instances process. ## ## Ground the "Single Ground" needed at the ## end of a string of 3 pin DPVs to put 2 grounds ## around each differential pair via. NET 'GROUND' DPVSG419-1 NET 'GROUND' DPVSG443-1 NET 'GROUND' DPVSG467-1 NET 'GROUND' DPVSG491-1 NET 'GROUND' DPVSG515-1 NET 'GROUND' DPVSG539-1 NET 'GROUND' DPVSG563-1 NET 'GROUND' DPVSG587-1 NET 'GROUND' DPVSG617-1 ## ## Pulled from the above Add List the following on 11-Apr-2016 ## ## DPVSG414-1, 438, 462, 486, 510, 534, 558, 582, 606, 618 ## ## ## Re-Connect the Lower DPV just along the West edge ## now with their signal pins in the right order. ## ## These DPV pins had been disconnected above. ## NET 'MGT_FO_CH_1_OUT_HUB_DIR' DPV402-2 NET 'MGT_FO_CH_1_OUT_HUB_CMP' DPV402-3 NET 'GROUND' DPV402-1 NET 'MGT_FO_CH_9_OUT_HUB_DIR' DPV426-2 NET 'MGT_FO_CH_9_OUT_HUB_CMP' DPV426-3 NET 'GROUND' DPV426-1 NET 'MGT_FO_CH_17_OUT_HUB_DIR' DPV450-2 NET 'MGT_FO_CH_17_OUT_HUB_CMP' DPV450-3 NET 'GROUND' DPV450-1 NET 'MGT_FO_CH_25_OUT_HUB_DIR' DPV474-2 NET 'MGT_FO_CH_25_OUT_HUB_CMP' DPV474-3 NET 'GROUND' DPV474-1 NET 'MGT_FO_CH_33_OUT_HUB_DIR' DPV498-2 NET 'MGT_FO_CH_33_OUT_HUB_CMP' DPV498-3 NET 'GROUND' DPV498-1 NET 'MGT_FO_CH_41_OUT_HUB_DIR' DPV522-2 NET 'MGT_FO_CH_41_OUT_HUB_CMP' DPV522-3 NET 'GROUND' DPV522-1 NET 'MGT_FO_CH_49_OUT_HUB_DIR' DPV546-2 NET 'MGT_FO_CH_49_OUT_HUB_CMP' DPV546-3 NET 'GROUND' DPV546-1 NET 'MGT_FO_CH_57_OUT_HUB_DIR' DPV570-2 NET 'MGT_FO_CH_57_OUT_HUB_CMP' DPV570-3 NET 'GROUND' DPV570-1 NET 'MGT_FO_CH_65_OUT_HUB_DIR' DPV594-2 NET 'MGT_FO_CH_65_OUT_HUB_CMP' DPV594-3 NET 'GROUND' DPV594-1 ## ## Ground Pin #4 of the Differential Pair Via components ## at the East end of each of the rows. These are INPUTs ## to the FEX FanOut. In the regular section of the ## FanOut Array a component is used with only one Ground ## pin. Along the East edge a Diff Pair Via component ## is used that has 2 Ground pins and this 2nd Ground ## pin must be explicitly connected. ## NET 'GROUND' DPV422-4 NET 'GROUND' DPV446-4 NET 'GROUND' DPV470-4 NET 'GROUND' DPV494-4 NET 'GROUND' DPV518-4 NET 'GROUND' DPV542-4 NET 'GROUND' DPV566-4 NET 'GROUND' DPV590-4 NET 'GROUND' DPV620-4 # # MGT Fanout Equalizer Enable Groups # ---------------------------------------- # # # Original Rev. 24-Mar-2015 # Current Rev. 23-Nov-2016 GTH->MGT # # # This section of the MGT Fanout nets defines a net for # each of the 13 sections of the MGT Fanout that is used # to Enable or Disable the Equalizers in the Fanout Chips # of that section of the overall 74 Channel MGT Fanout. # # That is, we can enable/disable the equalizers on a # per Source Slot basis - not on a per Lane basis. # # The equalizers on all 6 of the Lanes from a given # Source Slot in the ATCA crate are either all enabled # or else all disabled. # # The Equalizer Enable signals are driven by the Hub FPGA's # HP IO Bank 71 which has 1.8 Volt CMOS outputs. # # The equalizer is enabled when the control pin on the # NB7VQ14M is voltage HI. The threshold levels of the # equalizer enable control input pins are: < 0.35 x Vcc # and > 0.65 x Vcc. # # The guaranteed minimum output voltage from the FPGA's # Bank 71 HP Select IO pins with 1.8 Volt Vcco is # Vcc - 0.450 Volts or 1.350 minimum HI state output # voltage. 1.350 Volts is 0.65 of 2.077 Volts. # # Thus with the NB7VQ14M running on 1.8 Volt Vcc (or any # reasonable range around 1.8 Volts) its Equalizer Enable # control input can be directly driven by the FPGA. # # # Recall which MGT Fanout Channels handle # which FEX Data Source: # # FEX Data MGT Fanout # Source Channels # -------- ---------- # # 3 1 : 6 # 4 7 : 12 # 5 13 : 18 # 6 19 : 24 # 7 25 : 30 # 8 31 : 36 # # Other Hub 37 : 38 # # 9 39 : 44 # 10 45 : 50 # 11 51 : 56 # 12 57 : 62 # 13 63 : 68 # 14 69 : 74 # # # Recall that the U4xy Reference Designator of a NB7VQ14M # fanout chip is the same plus 400 as the MGT Fanout Channel # Number serviced by that fanout chip. # # # # The assignment of the "Equalizer Enable Groups" is: # # EQU_ENB_GRP_1 FEX_3 # EQU_ENB_GRP_2 FEX_4 # EQU_ENB_GRP_3 FEX_5 # EQU_ENB_GRP_4 FEX_6 # EQU_ENB_GRP_5 FEX_7 # EQU_ENB_GRP_6 FEX_8 # # EQU_ENB_GRP_7 Other Hub's 2 readout lanes # # EQU_ENB_GRP_8 FEX_9 # EQU_ENB_GRP_9 FEX_10 # EQU_ENB_GRP_10 FEX_11 # EQU_ENB_GRP_11 FEX_12 # EQU_ENB_GRP_12 FEX_13 # EQU_ENB_GRP_13 FEX_14 # # # Assign Net-Names to the Equalizer Enable Groups # NET 'MGT_FO_EQU_ENB_GRP_1' U401-5 U402-5 U403-5 NET 'MGT_FO_EQU_ENB_GRP_1' U404-5 U405-5 U406-5 NET 'MGT_FO_EQU_ENB_GRP_2' U407-5 U408-5 U409-5 NET 'MGT_FO_EQU_ENB_GRP_2' U410-5 U411-5 U412-5 NET 'MGT_FO_EQU_ENB_GRP_3' U413-5 U414-5 U415-5 NET 'MGT_FO_EQU_ENB_GRP_3' U416-5 U417-5 U418-5 NET 'MGT_FO_EQU_ENB_GRP_4' U419-5 U420-5 U421-5 NET 'MGT_FO_EQU_ENB_GRP_4' U422-5 U423-5 U424-5 NET 'MGT_FO_EQU_ENB_GRP_5' U425-5 U426-5 U427-5 NET 'MGT_FO_EQU_ENB_GRP_5' U428-5 U429-5 U430-5 NET 'MGT_FO_EQU_ENB_GRP_6' U431-5 U432-5 U433-5 NET 'MGT_FO_EQU_ENB_GRP_6' U434-5 U435-5 U436-5 NET 'MGT_FO_EQU_ENB_GRP_7' U437-5 U438-5 NET 'MGT_FO_EQU_ENB_GRP_8' U439-5 U440-5 U441-5 NET 'MGT_FO_EQU_ENB_GRP_8' U442-5 U443-5 U444-5 NET 'MGT_FO_EQU_ENB_GRP_9' U445-5 U446-5 U447-5 NET 'MGT_FO_EQU_ENB_GRP_9' U448-5 U449-5 U450-5 NET 'MGT_FO_EQU_ENB_GRP_10' U451-5 U452-5 U453-5 NET 'MGT_FO_EQU_ENB_GRP_10' U454-5 U455-5 U456-5 NET 'MGT_FO_EQU_ENB_GRP_11' U457-5 U458-5 U459-5 NET 'MGT_FO_EQU_ENB_GRP_11' U460-5 U461-5 U462-5 NET 'MGT_FO_EQU_ENB_GRP_12' U463-5 U464-5 U465-5 NET 'MGT_FO_EQU_ENB_GRP_12' U466-5 U467-5 U468-5 NET 'MGT_FO_EQU_ENB_GRP_13' U469-5 U470-5 U471-5 NET 'MGT_FO_EQU_ENB_GRP_13' U472-5 U473-5 U474-5 # # Assign Net-Names to the Hub FPGA Select I/O pins # that control the MGT Fanout Equalizer Enable Groups. # NET 'MGT_FO_EQU_ENB_GRP_1' U1-C25 # IO_L21N_T3L_N5_AD8N_71 NET 'MGT_FO_EQU_ENB_GRP_2' U1-A25 # IO_L23N_T3U_N9_71 NET 'MGT_FO_EQU_ENB_GRP_3' U1-B25 # IO_L23P_T3U_N8_71 NET 'MGT_FO_EQU_ENB_GRP_4' U1-A24 # IO_L20P_T3L_N2_AD1P_71 NET 'MGT_FO_EQU_ENB_GRP_5' U1-C24 # IO_L19N_T3L_N1_DBC_AD9N_71 NET 'MGT_FO_EQU_ENB_GRP_6' U1-B22 # IO_L24N_T3U_N11_71 NET 'MGT_FO_EQU_ENB_GRP_7' U1-D20 # IO_L20P_T3L_N2_AD1P_72 NET 'MGT_FO_EQU_ENB_GRP_8' U1-C20 # IO_L19P_T3L_N0_DBC_AD9P_72 NET 'MGT_FO_EQU_ENB_GRP_9' U1-A23 # IO_L20N_T3L_N3_AD1N_71 NET 'MGT_FO_EQU_ENB_GRP_10' U1-A21 # IO_L21N_T3L_N5_AD8N_72 NET 'MGT_FO_EQU_ENB_GRP_11' U1-A20 # IO_L23P_T3U_N8_72 NET 'MGT_FO_EQU_ENB_GRP_12' U1-A19 # IO_L23N_T3U_N9_72 NET 'MGT_FO_EQU_ENB_GRP_13' U1-A18 # IO_L24N_T3U_N11_72 # # Wait Here # ## B23 # IO_L22N_T3U_N7_DBC_AD0N_71 ## C23 # IO_L22P_T3U_N6_DBC_AD0P_71 ## C22 # IO_L24P_T3U_N10_71 ## D22 # IO_T3U_N12_71 ## Return ## E23 # IO_L16N_T2U_N7_QBC_AD3N_71 ## D24 # IO_L19P_T3L_N0_DBC_AD9P_71 ## E22 # IO_T2U_N12_71 # # Hub Module # # MGT Fanout Chip DAP Pad Ground Net Connections # -------------------------------------------------- # # # Original Rev. 13-Apr-2015 # Most Recent Rev. 23-Nov-2016 GTH->MGT # # # This file is the Ground Net connections the the 4 # Through Holes in the DAP Pad for the MGT Fanout Chips. # # The Ground connections to pins 17, 18, 19, 20, # i.e. the 4 DAP Pad Through Holes, are not made # in the MGT Fanout Multi Instance Template file. # # NET 'GROUND' U401-17 U401-18 NET 'GROUND' U401-19 U401-20 NET 'GROUND' U402-17 U402-18 NET 'GROUND' U402-19 U402-20 NET 'GROUND' U403-17 U403-18 NET 'GROUND' U403-19 U403-20 NET 'GROUND' U404-17 U404-18 NET 'GROUND' U404-19 U404-20 NET 'GROUND' U405-17 U405-18 NET 'GROUND' U405-19 U405-20 NET 'GROUND' U406-17 U406-18 NET 'GROUND' U406-19 U406-20 NET 'GROUND' U407-17 U407-18 NET 'GROUND' U407-19 U407-20 NET 'GROUND' U408-17 U408-18 NET 'GROUND' U408-19 U408-20 NET 'GROUND' U409-17 U409-18 NET 'GROUND' U409-19 U409-20 NET 'GROUND' U410-17 U410-18 NET 'GROUND' U410-19 U410-20 NET 'GROUND' U411-17 U411-18 NET 'GROUND' U411-19 U411-20 NET 'GROUND' U412-17 U412-18 NET 'GROUND' U412-19 U412-20 NET 'GROUND' U413-17 U413-18 NET 'GROUND' U413-19 U413-20 NET 'GROUND' U414-17 U414-18 NET 'GROUND' U414-19 U414-20 NET 'GROUND' U415-17 U415-18 NET 'GROUND' U415-19 U415-20 NET 'GROUND' U416-17 U416-18 NET 'GROUND' U416-19 U416-20 NET 'GROUND' U417-17 U417-18 NET 'GROUND' U417-19 U417-20 NET 'GROUND' U418-17 U418-18 NET 'GROUND' U418-19 U418-20 NET 'GROUND' U419-17 U419-18 NET 'GROUND' U419-19 U419-20 NET 'GROUND' U420-17 U420-18 NET 'GROUND' U420-19 U420-20 NET 'GROUND' U421-17 U421-18 NET 'GROUND' U421-19 U421-20 NET 'GROUND' U422-17 U422-18 NET 'GROUND' U422-19 U422-20 NET 'GROUND' U423-17 U423-18 NET 'GROUND' U423-19 U423-20 NET 'GROUND' U424-17 U424-18 NET 'GROUND' U424-19 U424-20 NET 'GROUND' U425-17 U425-18 NET 'GROUND' U425-19 U425-20 NET 'GROUND' U426-17 U426-18 NET 'GROUND' U426-19 U426-20 NET 'GROUND' U427-17 U427-18 NET 'GROUND' U427-19 U427-20 NET 'GROUND' U428-17 U428-18 NET 'GROUND' U428-19 U428-20 NET 'GROUND' U429-17 U429-18 NET 'GROUND' U429-19 U429-20 NET 'GROUND' U430-17 U430-18 NET 'GROUND' U430-19 U430-20 NET 'GROUND' U431-17 U431-18 NET 'GROUND' U431-19 U431-20 NET 'GROUND' U432-17 U432-18 NET 'GROUND' U432-19 U432-20 NET 'GROUND' U433-17 U433-18 NET 'GROUND' U433-19 U433-20 NET 'GROUND' U434-17 U434-18 NET 'GROUND' U434-19 U434-20 NET 'GROUND' U435-17 U435-18 NET 'GROUND' U435-19 U435-20 NET 'GROUND' U436-17 U436-18 NET 'GROUND' U436-19 U436-20 NET 'GROUND' U437-17 U437-18 NET 'GROUND' U437-19 U437-20 NET 'GROUND' U438-17 U438-18 NET 'GROUND' U438-19 U438-20 NET 'GROUND' U439-17 U439-18 NET 'GROUND' U439-19 U439-20 NET 'GROUND' U440-17 U440-18 NET 'GROUND' U440-19 U440-20 NET 'GROUND' U441-17 U441-18 NET 'GROUND' U441-19 U441-20 NET 'GROUND' U442-17 U442-18 NET 'GROUND' U442-19 U442-20 NET 'GROUND' U443-17 U443-18 NET 'GROUND' U443-19 U443-20 NET 'GROUND' U444-17 U444-18 NET 'GROUND' U444-19 U444-20 NET 'GROUND' U445-17 U445-18 NET 'GROUND' U445-19 U445-20 NET 'GROUND' U446-17 U446-18 NET 'GROUND' U446-19 U446-20 NET 'GROUND' U447-17 U447-18 NET 'GROUND' U447-19 U447-20 NET 'GROUND' U448-17 U448-18 NET 'GROUND' U448-19 U448-20 NET 'GROUND' U449-17 U449-18 NET 'GROUND' U449-19 U449-20 NET 'GROUND' U450-17 U450-18 NET 'GROUND' U450-19 U450-20 NET 'GROUND' U451-17 U451-18 NET 'GROUND' U451-19 U451-20 NET 'GROUND' U452-17 U452-18 NET 'GROUND' U452-19 U452-20 NET 'GROUND' U453-17 U453-18 NET 'GROUND' U453-19 U453-20 NET 'GROUND' U454-17 U454-18 NET 'GROUND' U454-19 U454-20 NET 'GROUND' U455-17 U455-18 NET 'GROUND' U455-19 U455-20 NET 'GROUND' U456-17 U456-18 NET 'GROUND' U456-19 U456-20 NET 'GROUND' U457-17 U457-18 NET 'GROUND' U457-19 U457-20 NET 'GROUND' U458-17 U458-18 NET 'GROUND' U458-19 U458-20 NET 'GROUND' U459-17 U459-18 NET 'GROUND' U459-19 U459-20 NET 'GROUND' U460-17 U460-18 NET 'GROUND' U460-19 U460-20 NET 'GROUND' U461-17 U461-18 NET 'GROUND' U461-19 U461-20 NET 'GROUND' U462-17 U462-18 NET 'GROUND' U462-19 U462-20 NET 'GROUND' U463-17 U463-18 NET 'GROUND' U463-19 U463-20 NET 'GROUND' U464-17 U464-18 NET 'GROUND' U464-19 U464-20 NET 'GROUND' U465-17 U465-18 NET 'GROUND' U465-19 U465-20 NET 'GROUND' U466-17 U466-18 NET 'GROUND' U466-19 U466-20 NET 'GROUND' U467-17 U467-18 NET 'GROUND' U467-19 U467-20 NET 'GROUND' U468-17 U468-18 NET 'GROUND' U468-19 U468-20 NET 'GROUND' U469-17 U469-18 NET 'GROUND' U469-19 U469-20 NET 'GROUND' U470-17 U470-18 NET 'GROUND' U470-19 U470-20 NET 'GROUND' U471-17 U471-18 NET 'GROUND' U471-19 U471-20 NET 'GROUND' U472-17 U472-18 NET 'GROUND' U472-19 U472-20 NET 'GROUND' U473-17 U473-18 NET 'GROUND' U473-19 U473-20 NET 'GROUND' U474-17 U474-18 NET 'GROUND' U474-19 U474-20 # # MGT Fanout Zone 2 Input Nets # ----------------------------------- # # # Original Rev. 13-Apr-2015 # Current Rev. 23-Nov-2016 GTH->MGT # # # # # This section of the MGT Fanout nets defines the # inputs to the fanout chips from the ATCA Zone 2 # backplane connectors. # # Recall that the input pins to each fanout chip # were assigned a "MGT Fanout Channel Number" based # netname during the fanout multi-instance net generation # process. In this file we just need to assign the # Zone 2 connector end of these traces. # # These 148 nets are listed in order of MGT Fanout Channel Number. # # # The new aggrement with Ed and Ian is: # # - use the 6 lane Aurora setup from the FEX cards assigned # to the ATCA Channel Ports in the following way: # # Aurora Lane 0, 1, 2, 3, 4, 5 # # FEX End ATCA Tx0, Tx1, Tx2, Tx3, Rx2, Rx3 # # Hub End ATCA Rx0, Rx1, Rx2, Rx3, Tx2, Tx3 # # Hub Zone 2 Pins c,d g,h c,d g,h a,b e,f # Hub Zone 2 Row low low up up up up # # # - Can no longer mix the FEX and Hub pins on the # MegArray connectors to the ROD. # # - At a minimum must land each FEX on the ROD # as a contiguous group of 6 ROD inputs. # # # Note that some signals are "inverted" as they leave # this net list file. This is to eliminate the need # to flip these traces during routing. # # - In the lower physical half of the MGT Fanout Array, # i.e. FEX-03 through FEX-08, the EVEN numbered # MGT Fanout Channel inputs are inverted. # # That is, in the MGT Fanout Channel range 1:36, # the EVEN numbered MGT Fanout Channel have inverted # inputs. # # # - In the upper physical half of the MGT Fanout Array, # i.e. FEX-09 through FEX-12, the ODD numbered # MGT Fanout Channel inputs are inverted. # # That is, in the MGT Fanout Channel range 39:74, # the ODD numbered MGT Fanout Channel have inverted # inputs. # # # - NOTE that MGT Fanout Ch #72, i.e. FEX-12 Lane 3 # is an exception. MGT Fanout Ch #72 is inverted to # allow a clean route into the 10 cells in the top, # i.e. 9th row of the MGT Fanout Array. # # # - From the "Other Hub" the input to MGT Fanout # Channel 37 was inverted to facilitate routing. # # # The main difference between the upper and lower halves # (i.e. between FEX-03:FEX-08 and FEX-09:FEX12) is # caused by routing out of Zone 2 connectors either # above or under the connector pins. # # Both of the Other Hub readout channels are handled # in the middle of this MGT Fanout Array. # # # # FEX-03 Logical Slot Number 3 # # MGT Fanout Channel 1 is the FEX-03 Aurora Lane 0 ATCA Rx0[02] Sig_7 NET 'MGT_FO_CH_1_IN_DIR' J23-C2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_1_IN_CMP' J23-D2 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 2 is the FEX-03 Aurora Lane 1 ATCA Rx1[02] Sig_8 NET 'MGT_FO_CH_2_IN_CMP' J23-G2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_IN_DIR' J23-H2 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 3 is the FEX-03 Aurora Lane 2 ATCA Rx2[02] Sig_9 NET 'MGT_FO_CH_3_IN_DIR' J23-C1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_IN_CMP' J23-D1 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 4 is the FEX-03 Aurora Lane 3 ATCA Rx3[02] Sig_10 NET 'MGT_FO_CH_4_IN_CMP' J23-G1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_IN_DIR' J23-H1 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 5 is the FEX-03 Aurora Lane 4 ATCA Tx2[02] Sig_7 NET 'MGT_FO_CH_5_IN_DIR' J23-A1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_IN_CMP' J23-B1 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 6 is the FEX-03 Aurora Lane 5 ATCA Tx3[02] Sig_8 NET 'MGT_FO_CH_6_IN_CMP' J23-E1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_IN_DIR' J23-F1 (NET_TYPE, 'DIFF_PAIR_HS') # # FEX-04 Logical Slot Number 4 # # MGT Fanout Channel 7 is the FEX-04 Aurora Lane 0 ATCA Rx0[03] Sig_9 NET 'MGT_FO_CH_7_IN_DIR' J22-C10 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_7_IN_CMP' J22-D10 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 8 is the FEX-04 Aurora Lane 1 ATCA Rx1[03] Sig_10 NET 'MGT_FO_CH_8_IN_CMP' J22-G10 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_8_IN_DIR' J22-H10 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 9 is the FEX-04 Aurora Lane 2 ATCA Rx2[03] Sig_7 NET 'MGT_FO_CH_9_IN_DIR' J22-C9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_9_IN_CMP' J22-D9 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 10 is the FEX-04 Aurora Lane 3 ATCA Rx3[03] Sig_8 NET 'MGT_FO_CH_10_IN_CMP' J22-G9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_IN_DIR' J22-H9 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 11 is the FEX-04 Aurora Lane 4 ATCA Tx2[03] Sig_9 NET 'MGT_FO_CH_11_IN_DIR' J22-A9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_IN_CMP' J22-B9 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 12 is the FEX-04 Aurora Lane 5 ATCA Tx3[03] Sig_10 NET 'MGT_FO_CH_12_IN_CMP' J22-E9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_IN_DIR' J22-F9 (NET_TYPE, 'DIFF_PAIR_HS') # # FEX-05 Logical Slot Number 5 # # MGT Fanout Channel 13 is the FEX-05 Aurora Lane 0 ATCA Rx0[04] Sig_7 NET 'MGT_FO_CH_13_IN_DIR' J22-C8 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_13_IN_CMP' J22-D8 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 14 is the FEX-05 Aurora Lane 1 ATCA Rx1[04] Sig_8 NET 'MGT_FO_CH_14_IN_CMP' J22-G8 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_IN_DIR' J22-H8 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 15 is the FEX-05 Aurora Lane 2 ATCA Rx2[04] Sig_9 NET 'MGT_FO_CH_15_IN_DIR' J22-C7 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_IN_CMP' J22-D7 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 16 is the FEX-05 Aurora Lane 3 ATCA Rx3[04] Sig_10 NET 'MGT_FO_CH_16_IN_CMP' J22-G7 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_IN_DIR' J22-H7 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 17 is the FEX-05 Aurora Lane 4 ATCA Tx2[04] Sig_7 NET 'MGT_FO_CH_17_IN_DIR' J22-A7 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_17_IN_CMP' J22-B7 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 18 is the FEX-05 Aurora Lane 5 ATCA Tx3[04] Sig_8 NET 'MGT_FO_CH_18_IN_CMP' J22-E7 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_IN_DIR' J22-F7 (NET_TYPE, 'DIFF_PAIR_HS') # # FEX-06 Logical Slot Number 6 # # MGT Fanout Channel 19 is the FEX-06 Aurora Lane 0 ATCA Rx0[05] Sig_9 NET 'MGT_FO_CH_19_IN_DIR' J22-C6 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_19_IN_CMP' J22-D6 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 20 is the FEX-06 Aurora Lane 1 ATCA Rx1[05] Sig_10 NET 'MGT_FO_CH_20_IN_CMP' J22-G6 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_IN_DIR' J22-H6 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 21 is the FEX-06 Aurora Lane 2 ATCA Rx2[05] Sig_7 NET 'MGT_FO_CH_21_IN_DIR' J22-C5 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_IN_CMP' J22-D5 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 22 is the FEX-06 Aurora Lane 3 ATCA Rx3[05] Sig_8 NET 'MGT_FO_CH_22_IN_CMP' J22-G5 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_IN_DIR' J22-H5 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 23 is the FEX-06 Aurora Lane 4 ATCA Tx2[05] Sig_9 NET 'MGT_FO_CH_23_IN_DIR' J22-A5 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_IN_CMP' J22-B5 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 24 is the FEX-06 Aurora Lane 5 ATCA Tx3[05] Sig_10 NET 'MGT_FO_CH_24_IN_CMP' J22-E5 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_IN_DIR' J22-F5 (NET_TYPE, 'DIFF_PAIR_HS') # # FEX-07 Logical Slot Number 7 # # MGT Fanout Channel 25 is the FEX-07 Aurora Lane 0 ATCA Rx0[06] Sig_7 NET 'MGT_FO_CH_25_IN_DIR' J22-C4 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_25_IN_CMP' J22-D4 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 26 is the FEX-07 Aurora Lane 1 ATCA Rx1[06] Sig_8 NET 'MGT_FO_CH_26_IN_CMP' J22-G4 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_IN_DIR' J22-H4 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 27 is the FEX-07 Aurora Lane 2 ATCA Rx2[06] Sig_9 NET 'MGT_FO_CH_27_IN_DIR' J22-C3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_IN_CMP' J22-D3 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 28 is the FEX-07 Aurora Lane 3 ATCA Rx3[06] Sig_10 NET 'MGT_FO_CH_28_IN_CMP' J22-G3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_IN_DIR' J22-H3 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 29 is the FEX-07 Aurora Lane 4 ATCA Tx2[06] Sig_7 NET 'MGT_FO_CH_29_IN_DIR' J22-A3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_IN_CMP' J22-B3 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 30 is the FEX-07 Aurora Lane 5 ATCA Tx3[06] Sig_8 NET 'MGT_FO_CH_30_IN_CMP' J22-E3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_IN_DIR' J22-F3 (NET_TYPE, 'DIFF_PAIR_HS') # # FEX-08 Logical Slot Number 8 # # MGT Fanout Channel 31 is the FEX-08 Aurora Lane 0 ATCA Rx0[07] Sig_9 NET 'MGT_FO_CH_31_IN_DIR' J22-C2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_31_IN_CMP' J22-D2 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 32 is the FEX-08 Aurora Lane 1 ATCA Rx1[07] Sig_10 NET 'MGT_FO_CH_32_IN_CMP' J22-G2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_IN_DIR' J22-H2 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 33 is the FEX-08 Aurora Lane 2 ATCA Rx2[07] Sig_7 NET 'MGT_FO_CH_33_IN_DIR' J22-C1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_33_IN_CMP' J22-D1 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 34 is the FEX-08 Aurora Lane 3 ATCA Rx3[07] Sig_8 NET 'MGT_FO_CH_34_IN_CMP' J22-G1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_34_IN_DIR' J22-H1 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 35 is the FEX-08 Aurora Lane 4 ATCA Tx2[07] Sig_9 NET 'MGT_FO_CH_35_IN_DIR' J22-A1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_IN_CMP' J22-B1 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 36 is the FEX-08 Aurora Lane 5 ATCA Tx3[07] Sig_10 NET 'MGT_FO_CH_36_IN_CMP' J22-E1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_IN_DIR' J22-F1 (NET_TYPE, 'DIFF_PAIR_HS') # # Other Hub # # MGT Fanout Channel 37 is the Other Hub's Aurora Lane 0 ATCA Rx2[01] Sig_7 NET 'MGT_FO_CH_37_IN_CMP' J23-C3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_37_IN_DIR' J23-D3 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 38 is the Other Hub's Aurora Lane 1 ATCA Rx3[01] Sig_8 NET 'MGT_FO_CH_38_IN_DIR' J23-G3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_IN_CMP' J23-H3 (NET_TYPE, 'DIFF_PAIR_HS') # # FEX-09 Logical Slot Number 9 # # MGT Fanout Channel 39 is the FEX-09 Aurora Lane 0 ATCA Rx0[08] Sig_9 NET 'MGT_FO_CH_39_IN_CMP' J21-C10 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_39_IN_DIR' J21-D10 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 40 is the FEX-09 Aurora Lane 1 ATCA Rx1[08] Sig_10 NET 'MGT_FO_CH_40_IN_DIR' J21-G10 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_IN_CMP' J21-H10 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 41 is the FEX-09 Aurora Lane 2 ATCA Rx2[08] Sig_7 NET 'MGT_FO_CH_41_IN_CMP' J21-C9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_41_IN_DIR' J21-D9 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 42 is the FEX-09 Aurora Lane 3 ATCA Rx3[08] Sig_8 NET 'MGT_FO_CH_42_IN_DIR' J21-G9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_IN_CMP' J21-H9 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 43 is the FEX-09 Aurora Lane 4 ATCA Tx2[08] Sig_9 NET 'MGT_FO_CH_43_IN_CMP' J21-A9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_IN_DIR' J21-B9 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 44 is the FEX-09 Aurora Lane 5 ATCA Tx3[08] Sig_10 NET 'MGT_FO_CH_44_IN_DIR' J21-E9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_IN_CMP' J21-F9 (NET_TYPE, 'DIFF_PAIR_HS') # # FEX-10 Logical Slot Number 10 # # MGT Fanout Channel 45 is the FEX-10 Aurora Lane 0 ATCA Rx0[09] Sig_7 NET 'MGT_FO_CH_45_IN_CMP' J21-C8 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_45_IN_DIR' J21-D8 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 46 is the FEX-10 Aurora Lane 1 ATCA Rx1[09] Sig_8 NET 'MGT_FO_CH_46_IN_DIR' J21-G8 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_IN_CMP' J21-H8 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 47 is the FEX-10 Aurora Lane 2 ATCA Rx2[09] Sig_9 NET 'MGT_FO_CH_47_IN_CMP' J21-C7 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_IN_DIR' J21-D7 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 48 is the FEX-10 Aurora Lane 3 ATCA Rx3[09] Sig_10 NET 'MGT_FO_CH_48_IN_DIR' J21-G7 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_IN_CMP' J21-H7 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 49 is the FEX-10 Aurora Lane 4 ATCA Tx2[09] Sig_7 NET 'MGT_FO_CH_49_IN_CMP' J21-A7 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_49_IN_DIR' J21-B7 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 50 is the FEX-10 Aurora Lane 5 ATCA Tx3[09] Sig_8 NET 'MGT_FO_CH_50_IN_DIR' J21-E7 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_IN_CMP' J21-F7 (NET_TYPE, 'DIFF_PAIR_HS') # # FEX-11 Logical Slot Number 11 # # MGT Fanout Channel 51 is the FEX-11 Aurora Lane 0 ATCA Rx0[10] Sig_9 NET 'MGT_FO_CH_51_IN_CMP' J21-C6 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_51_IN_DIR' J21-D6 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 52 is the FEX-11 Aurora Lane 1 ATCA Rx1[10] Sig_10 NET 'MGT_FO_CH_52_IN_DIR' J21-G6 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_IN_CMP' J21-H6 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 53 is the FEX-11 Aurora Lane 2 ATCA Rx2[10] Sig_7 NET 'MGT_FO_CH_53_IN_CMP' J21-C5 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_IN_DIR' J21-D5 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 54 is the FEX-11 Aurora Lane 3 ATCA Rx3[10] Sig_8 NET 'MGT_FO_CH_54_IN_DIR' J21-G5 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_IN_CMP' J21-H5 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 55 is the FEX-11 Aurora Lane 4 ATCA Tx2[10] Sig_9 NET 'MGT_FO_CH_55_IN_CMP' J21-A5 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_IN_DIR' J21-B5 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 56 is the FEX-11 Aurora Lane 5 ATCA Tx3[10] Sig_10 NET 'MGT_FO_CH_56_IN_DIR' J21-E5 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_IN_CMP' J21-F5 (NET_TYPE, 'DIFF_PAIR_HS') # # FEX-12 Logical Slot Number 12 # # MGT Fanout Channel 57 is the FEX-12 Aurora Lane 0 ATCA Rx0[11] Sig_7 NET 'MGT_FO_CH_57_IN_CMP' J21-C4 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_57_IN_DIR' J21-D4 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 58 is the FEX-12 Aurora Lane 1 ATCA Rx1[11] Sig_8 NET 'MGT_FO_CH_58_IN_DIR' J21-G4 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_IN_CMP' J21-H4 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 59 is the FEX-12 Aurora Lane 2 ATCA Rx2[11] Sig_9 NET 'MGT_FO_CH_59_IN_CMP' J21-C3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_IN_DIR' J21-D3 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 60 is the FEX-12 Aurora Lane 3 ATCA Rx3[11] Sig_10 NET 'MGT_FO_CH_60_IN_DIR' J21-G3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_IN_CMP' J21-H3 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 61 is the FEX-12 Aurora Lane 4 ATCA Tx2[11] Sig_7 NET 'MGT_FO_CH_61_IN_CMP' J21-A3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_IN_DIR' J21-B3 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 62 is the FEX-12 Aurora Lane 5 ATCA Tx3[11] Sig_8 NET 'MGT_FO_CH_62_IN_DIR' J21-E3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_IN_CMP' J21-F3 (NET_TYPE, 'DIFF_PAIR_HS') # # FEX-13 Logical Slot Number 13 # # MGT Fanout Channel 63 is the FEX-13 Aurora Lane 0 ATCA Rx0[12] Sig_9 NET 'MGT_FO_CH_63_IN_CMP' J21-C2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_63_IN_DIR' J21-D2 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 64 is the FEX-13 Aurora Lane 1 ATCA Rx1[12] Sig_10 NET 'MGT_FO_CH_64_IN_DIR' J21-G2 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_IN_CMP' J21-H2 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 65 is the FEX-13 Aurora Lane 2 ATCA Rx2[12] Sig_7 NET 'MGT_FO_CH_65_IN_CMP' J21-C1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_65_IN_DIR' J21-D1 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 66 is the FEX-13 Aurora Lane 3 ATCA Rx3[12] Sig_8 NET 'MGT_FO_CH_66_IN_DIR' J21-G1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_IN_CMP' J21-H1 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 67 is the FEX-13 Aurora Lane 4 ATCA Tx2[12] Sig_9 NET 'MGT_FO_CH_67_IN_CMP' J21-A1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_IN_DIR' J21-B1 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 68 is the FEX-13 Aurora Lane 5 ATCA Tx3[12] Sig_10 NET 'MGT_FO_CH_68_IN_DIR' J21-E1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_IN_CMP' J21-F1 (NET_TYPE, 'DIFF_PAIR_HS') # # FEX-14 Logical Slot Number 14 # # MGT Fanout Channel 69 is the FEX-14 Aurora Lane 0 ATCA Rx0[13] Sig_7 NET 'MGT_FO_CH_69_IN_CMP' J20-C10 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_69_IN_DIR' J20-D10 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 70 is the FEX-14 Aurora Lane 1 ATCA Rx1[13] Sig_8 NET 'MGT_FO_CH_70_IN_DIR' J20-G10 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_IN_CMP' J20-H10 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 71 is the FEX-14 Aurora Lane 2 ATCA Rx2[13] Sig_9 NET 'MGT_FO_CH_71_IN_CMP' J20-C9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_IN_DIR' J20-D9 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 72 is the FEX-14 Aurora Lane 3 ATCA Rx3[13] Sig_10 NET 'MGT_FO_CH_72_IN_CMP' J20-G9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_IN_DIR' J20-H9 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 73 is the FEX-14 Aurora Lane 4 ATCA Tx2[13] Sig_7 NET 'MGT_FO_CH_73_IN_CMP' J20-A9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_IN_DIR' J20-B9 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Channel 74 is the FEX-14 Aurora Lane 5 ATCA Tx3[13] Sig_10 NET 'MGT_FO_CH_74_IN_DIR' J20-E9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_IN_CMP' J20-F9 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout DC-Blocking Caps to Meg-Array Connector Nets # ------------------------------------------------------------ # # # Original Rev. 29-Apr-2015 # Current Rev. 23-Nov-2016 GTH->MGT # # # This Net List File contain the connections from the # MGT Fanout DC-Blocking Capacitors to the Meg-Array # connectors. # # This file defines just the end of these nets that # connects to the Meg-Array connector. # # The starting point of these nets at the DC-Blocking # capacitors at the output of the fanout chips as defined in: # # gth_fanout_nets_template.txt gth_fanout_nets_config.txt # # # Note that these nets are named in terms of # MGT Fanout "Channel Number" and not in terms of # ATCA Fabric Interface Port-Channel or in terms of # Meg-Array to ROD connection number. # # # # # Inverted Channels on the Run # from MGT Fanout to MegArrays # -------------------------------- # # Recall that some of the signals coming from the MGT Fanout # will be inverted because the Zone 2 input to these channels # was inverted to facilitate high-speed signal routing. # # The Channels that come out of the MGT Fanout will be # inverted again on their run to the MegArray connectors. # This is done so that all inputs to the ROD card will be # "right side up". # # The inversion on the run from MGT Fanout to MegArray is done # by which of the MegArray diff pair BGA pads uses the signal # via above the BGA pad pair and which uses the via below the # BGA pad pair. So this will take a lot of editing of the # S1 and S2 MegArray geometries to get right. # # # Reacall the MGT Fanout Channels with Inverted Inputs: # # Note that some signals are "inverted" as they leave # this net list file. This is to eliminate the need # to flip these traces during routing. # # - In the lower physical half of the MGT Fanout Array, # i.e. FEX-03 through FEX-08, the EVEN numbered # MGT Fanout Channel inputs are inverted. # # That is, in the MGT Fanout Channel range 1:36, # the EVEN numbered MGT Fanout Channel have inverted # inputs. # # - In the upper physical half of the MGT Fanout Array, # i.e. FEX-09 through FEX-12, the ODD numbered # MGT Fanout Channel inputs are inverted. # # That is, in the MGT Fanout Channel range 39:74, # the ODD numbered MGT Fanout Channel have inverted # inputs. # # - NOTE that MGT Fanout Ch #72, i.e. FEX-12 Lane 3 # is an exception. MGT Fanout Ch #72 is inverted to # allow a clean route into the 10 cells in the top, # i.e. 9th row of the MGT Fanout Array. # # - From the "Other Hub" the input to MGT Fanout # Channel 37 was inverted to facilitate routing. # # # List of signals that will be inverted on their run from # MGT Fanout to the MegArray S1 & S2 Connectors: # # MGT Channels 2, 4, 6, 8, 10, 12, 14, 16, 18, # Inverted 20, 22, 24, 26, 28, 30, 32, 34, 36 # on their run # to the 37 # MegArray # Connectors: 39, 41, 43, 45, 47, 49, 51, 53, 55, # 57, 59, 61, 63, 65, 67, 69, 71, # 72, # 73 # # # #------------------------------------------------- # # Start with MegArray Connector S1 # #------------------------------------------------- # # MGT Fanout Ch 1:6 services FEX-03 Aurora Lanes 0:5 ROD FEX Inputs 0:5 # NET 'MGT_FO_CH_1_OUT_ROD_DIR' Meg_S1-F39 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_1_OUT_ROD_CMP' Meg_S1-E39 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_OUT_ROD_CMP' Meg_S1-J38 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_OUT_ROD_DIR' Meg_S1-H38 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_OUT_ROD_DIR' Meg_S1-F37 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_OUT_ROD_CMP' Meg_S1-E37 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_OUT_ROD_CMP' Meg_S1-J36 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_OUT_ROD_DIR' Meg_S1-H36 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_OUT_ROD_DIR' Meg_S1-F35 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_OUT_ROD_CMP' Meg_S1-E35 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_OUT_ROD_CMP' Meg_S1-J34 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_OUT_ROD_DIR' Meg_S1-H34 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Ch 7:12 services FEX-04 Aurora Lanes 0:5 ROD FEX Inputs 6:11 # NET 'MGT_FO_CH_7_OUT_ROD_DIR' Meg_S1-F33 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_7_OUT_ROD_CMP' Meg_S1-E33 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_8_OUT_ROD_CMP' Meg_S1-J32 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_8_OUT_ROD_DIR' Meg_S1-H32 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_9_OUT_ROD_DIR' Meg_S1-F31 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_9_OUT_ROD_CMP' Meg_S1-E31 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_OUT_ROD_CMP' Meg_S1-J30 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_OUT_ROD_DIR' Meg_S1-H30 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_OUT_ROD_DIR' Meg_S1-F29 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_OUT_ROD_CMP' Meg_S1-E29 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_OUT_ROD_CMP' Meg_S1-J28 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_OUT_ROD_DIR' Meg_S1-H28 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Ch 13:18 services FEX-05 Aurora Lanes 0:5 ROD FEX Inputs 12:17 # NET 'MGT_FO_CH_13_OUT_ROD_DIR' Meg_S1-F27 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_13_OUT_ROD_CMP' Meg_S1-E27 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_OUT_ROD_CMP' Meg_S1-J26 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_OUT_ROD_DIR' Meg_S1-H26 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_OUT_ROD_DIR' Meg_S1-F25 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_OUT_ROD_CMP' Meg_S1-E25 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_OUT_ROD_CMP' Meg_S1-J24 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_OUT_ROD_DIR' Meg_S1-H24 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_17_OUT_ROD_DIR' Meg_S1-F23 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_17_OUT_ROD_CMP' Meg_S1-E23 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_OUT_ROD_CMP' Meg_S1-J22 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_OUT_ROD_DIR' Meg_S1-H22 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Ch 19:24 services FEX-06 Aurora Lanes 0:5 ROD FEX Inputs 18:23 # NET 'MGT_FO_CH_19_OUT_ROD_DIR' Meg_S1-J20 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_19_OUT_ROD_CMP' Meg_S1-H20 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_OUT_ROD_CMP' Meg_S1-F19 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_OUT_ROD_DIR' Meg_S1-E19 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_OUT_ROD_DIR' Meg_S1-J18 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_OUT_ROD_CMP' Meg_S1-H18 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_OUT_ROD_CMP' Meg_S1-F17 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_OUT_ROD_DIR' Meg_S1-E17 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_OUT_ROD_DIR' Meg_S1-J16 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_OUT_ROD_CMP' Meg_S1-H16 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_OUT_ROD_CMP' Meg_S1-F15 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_OUT_ROD_DIR' Meg_S1-E15 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Ch 25:30 services FEX-07 Aurora Lanes 0:5 ROD FEX Inputs 24:29 # NET 'MGT_FO_CH_25_OUT_ROD_DIR' Meg_S1-J14 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_25_OUT_ROD_CMP' Meg_S1-H14 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_OUT_ROD_CMP' Meg_S1-F13 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_OUT_ROD_DIR' Meg_S1-E13 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_OUT_ROD_DIR' Meg_S1-J12 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_OUT_ROD_CMP' Meg_S1-H12 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_OUT_ROD_CMP' Meg_S1-F11 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_OUT_ROD_DIR' Meg_S1-E11 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_OUT_ROD_DIR' Meg_S1-J10 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_OUT_ROD_CMP' Meg_S1-H10 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_OUT_ROD_CMP' Meg_S1-F9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_OUT_ROD_DIR' Meg_S1-E9 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Ch 31:36 services FEX-08 Aurora Lanes 0:5 ROD FEX Inputs 30:35 # NET 'MGT_FO_CH_31_OUT_ROD_DIR' Meg_S1-J8 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_31_OUT_ROD_CMP' Meg_S1-H8 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_OUT_ROD_CMP' Meg_S1-F7 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_OUT_ROD_DIR' Meg_S1-E7 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_33_OUT_ROD_DIR' Meg_S1-J6 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_33_OUT_ROD_CMP' Meg_S1-H6 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_34_OUT_ROD_CMP' Meg_S1-F5 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_34_OUT_ROD_DIR' Meg_S1-E5 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_OUT_ROD_DIR' Meg_S1-J4 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_OUT_ROD_CMP' Meg_S1-H4 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_OUT_ROD_CMP' Meg_S1-F3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_OUT_ROD_DIR' Meg_S1-E3 (NET_TYPE, 'DIFF_PAIR_HS') #------------------------------------------------- # # Now switch to MegArray Connector S2 # #------------------------------------------------- # # MGT Fanout Ch 37:38 services Other-HUB Aurora Lanes 0:1 # # ROD FEX Inputs: HRD0 and HRD2 # NET 'MGT_FO_CH_37_OUT_ROD_CMP' Meg_S2-E3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_37_OUT_ROD_DIR' Meg_S2-F3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_OUT_ROD_DIR' Meg_S2-H8 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_OUT_ROD_CMP' Meg_S2-J8 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Ch 39:44 services FEX-09 Aurora Lanes 0:5 ROD FEX Inputs 71:66 # NET 'MGT_FO_CH_39_OUT_ROD_CMP' Meg_S2-B4 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_39_OUT_ROD_DIR' Meg_S2-C4 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_OUT_ROD_DIR' Meg_S2-E5 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_OUT_ROD_CMP' Meg_S2-F5 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_41_OUT_ROD_CMP' Meg_S2-B6 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_41_OUT_ROD_DIR' Meg_S2-C6 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_OUT_ROD_DIR' Meg_S2-E7 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_OUT_ROD_CMP' Meg_S2-F7 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_OUT_ROD_CMP' Meg_S2-B8 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_OUT_ROD_DIR' Meg_S2-C8 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_OUT_ROD_DIR' Meg_S2-E9 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_OUT_ROD_CMP' Meg_S2-F9 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Ch 45:50 services FEX-10 Aurora Lanes 0:5 ROD FEX Inputs 65:60 # NET 'MGT_FO_CH_45_OUT_ROD_CMP' Meg_S2-B10 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_45_OUT_ROD_DIR' Meg_S2-C10 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_OUT_ROD_DIR' Meg_S2-E11 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_OUT_ROD_CMP' Meg_S2-F11 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_OUT_ROD_CMP' Meg_S2-B12 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_OUT_ROD_DIR' Meg_S2-C12 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_OUT_ROD_DIR' Meg_S2-E13 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_OUT_ROD_CMP' Meg_S2-F13 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_49_OUT_ROD_CMP' Meg_S2-B14 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_49_OUT_ROD_DIR' Meg_S2-C14 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_OUT_ROD_DIR' Meg_S2-E15 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_OUT_ROD_CMP' Meg_S2-F15 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Ch 51:56 services FEX-11 Aurora Lanes 0:5 ROD FEX Inputs 59:54 # NET 'MGT_FO_CH_51_OUT_ROD_CMP' Meg_S2-B16 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_51_OUT_ROD_DIR' Meg_S2-C16 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_OUT_ROD_DIR' Meg_S2-E17 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_OUT_ROD_CMP' Meg_S2-F17 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_OUT_ROD_CMP' Meg_S2-B18 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_OUT_ROD_DIR' Meg_S2-C18 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_OUT_ROD_DIR' Meg_S2-E19 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_OUT_ROD_CMP' Meg_S2-F19 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_OUT_ROD_CMP' Meg_S2-B20 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_OUT_ROD_DIR' Meg_S2-C20 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_OUT_ROD_DIR' Meg_S2-E21 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_OUT_ROD_CMP' Meg_S2-F21 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Ch 57:62 services FEX-12 Aurora Lanes 0:5 ROD FEX Inputs 53:48 # NET 'MGT_FO_CH_57_OUT_ROD_CMP' Meg_S2-B22 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_57_OUT_ROD_DIR' Meg_S2-C22 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_OUT_ROD_DIR' Meg_S2-E23 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_OUT_ROD_CMP' Meg_S2-F23 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_OUT_ROD_CMP' Meg_S2-B24 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_OUT_ROD_DIR' Meg_S2-C24 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_OUT_ROD_DIR' Meg_S2-E25 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_OUT_ROD_CMP' Meg_S2-F25 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_OUT_ROD_CMP' Meg_S2-B26 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_OUT_ROD_DIR' Meg_S2-C26 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_OUT_ROD_DIR' Meg_S2-E27 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_OUT_ROD_CMP' Meg_S2-F27 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Ch 63:68 services FEX-13 Aurora Lanes 0:5 ROD FEX Inputs 47:42 # NET 'MGT_FO_CH_63_OUT_ROD_CMP' Meg_S2-B28 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_63_OUT_ROD_DIR' Meg_S2-C28 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_OUT_ROD_DIR' Meg_S2-E29 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_OUT_ROD_CMP' Meg_S2-F29 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_65_OUT_ROD_CMP' Meg_S2-B30 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_65_OUT_ROD_DIR' Meg_S2-C30 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_OUT_ROD_DIR' Meg_S2-E31 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_OUT_ROD_CMP' Meg_S2-F31 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_OUT_ROD_CMP' Meg_S2-B32 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_OUT_ROD_DIR' Meg_S2-C32 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_OUT_ROD_DIR' Meg_S2-E33 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_OUT_ROD_CMP' Meg_S2-F33 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout Ch 69:74 services FEX-14 Aurora Lanes 0:5 ROD FEX Inputs 41:36 # NET 'MGT_FO_CH_69_OUT_ROD_CMP' Meg_S2-B34 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_69_OUT_ROD_DIR' Meg_S2-C34 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_OUT_ROD_DIR' Meg_S2-E35 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_OUT_ROD_CMP' Meg_S2-F35 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_OUT_ROD_CMP' Meg_S2-B36 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_OUT_ROD_DIR' Meg_S2-C36 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_OUT_ROD_CMP' Meg_S2-E37 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_OUT_ROD_DIR' Meg_S2-F37 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_OUT_ROD_CMP' Meg_S2-B38 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_OUT_ROD_DIR' Meg_S2-C38 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_OUT_ROD_DIR' Meg_S2-E39 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_OUT_ROD_CMP' Meg_S2-F39 (NET_TYPE, 'DIFF_PAIR_HS') # # MGT Fanout DC-Blocking Caps to Hub FPGA Nets # ------------------------------------------------- # # # Original Rev. 29-Apr-2015 # Current Rev. 23-Nov-2016 GTH->MGT # # # This Net List File contain the connections from the # MGT Fanout DC-Blocking Capacitors to the Hub FPGA. # # This file is now setup for the XCVU125-1FLVC2104C Ultra-Scale. # # This file defines just the end of these nets that # connects to the Hub FPGA. # # The starting point of these nets at the DC-Blocking # capacitors is defined in # # mgt_fanout_channel_nets which comes from # # gth_fanout_channel_nets_config # gth_fanout_channel_nets_template # # Note that these nets are named in terms of # "MGT Fanout "Channel Number" and not in terms of # Hub FPGA Transceiver ID or FEX source ID. # # # This file is basically in the order of the MGT Receiver # Input pin pairs, going around the BGA CCW, starting at # Quad 124, which is in the SW cornet on the Hub Module. # # This order is all simple rational and makes sense # until you reach near the Row A end of the device. # Once near the Row A end of the device there are # many choices, nothing makes sense, and the device # pins are harder to reach. # # # Recall that there are other users of the GTH/GTY # Transmitters and Receivers. # # Recall that the Hub Module uses all 80 of the GTH/GTY Receivers. # # - The FEX Data uses 74 of the 80 available GTH/GTY Receivers. # # - The Receiver MiniPOD uses 4 of the GTH Receivers. # # - The Readout Control Data from the ROD on # This Hub uses 1 of the GTH Receivers. # # - The Combined Data from the Other Hub uses 1 # of the GTY Receivers. # # This list accounts for all 80 GTH/GTY Receivers. # # Just the 74 FEX data inputs are defined in this file # but the 6 additional GTH/GTY Receiver Inputs are noted # in comments. # # # Start at the SW corner (as placed on the Hub) and move CCW # # # Quad 124 Receiver Port 0 is not used for FEX data. # Quad 124 Receiver Port 0 is used to Receive MiniPOD Fiber No. 8 # which is one of the 4 active MiniPOD # Receiver channels on the Hub. # # This net is defined in the file: hub_all_other_mgt_nets # # # Quad 124 Receiver Port 1 is not used for FEX data. # Quad 124 Receiver Port 1 is used to receive the Other Hub's Combined Data. # # This net is defined in the file: hub_all_other_mgt_nets # NET 'MGT_FO_CH_8_OUT_Hub_DIR' U1-AN45 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-124 NET 'MGT_FO_CH_8_OUT_Hub_CMP' U1-AN46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_7_OUT_Hub_CMP' U1-AM43 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-124 FLIPPED NET 'MGT_FO_CH_7_OUT_Hub_DIR' U1-AM44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_6_OUT_Hub_DIR' U1-AL45 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-125 NET 'MGT_FO_CH_6_OUT_Hub_CMP' U1-AL46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_5_OUT_Hub_CMP' U1-AK43 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-125 FLIPPED NET 'MGT_FO_CH_5_OUT_Hub_DIR' U1-AK44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_4_OUT_Hub_DIR' U1-AJ45 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-125 NET 'MGT_FO_CH_4_OUT_Hub_CMP' U1-AJ46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_3_OUT_Hub_CMP' U1-AH43 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-125 FLIPPED NET 'MGT_FO_CH_3_OUT_Hub_DIR' U1-AH44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_2_OUT_Hub_DIR' U1-AG45 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-126 NET 'MGT_FO_CH_2_OUT_Hub_CMP' U1-AG46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_1_OUT_Hub_CMP' U1-AF43 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-126 FLIPPED NET 'MGT_FO_CH_1_OUT_Hub_DIR' U1-AF44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_16_OUT_Hub_DIR' U1-AE45 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-126 NET 'MGT_FO_CH_16_OUT_Hub_CMP' U1-AE46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_15_OUT_Hub_CMP' U1-AD43 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-126 FLIPPED NET 'MGT_FO_CH_15_OUT_Hub_DIR' U1-AD44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_14_OUT_Hub_DIR' U1-AC45 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-127 NET 'MGT_FO_CH_14_OUT_Hub_CMP' U1-AC46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_13_OUT_Hub_CMP' U1-AB43 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-127 FLIPPED NET 'MGT_FO_CH_13_OUT_Hub_DIR' U1-AB44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_12_OUT_Hub_DIR' U1-AA45 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-127 NET 'MGT_FO_CH_12_OUT_Hub_CMP' U1-AA46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_11_OUT_Hub_CMP' U1-Y43 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-127 FLIPPED NET 'MGT_FO_CH_11_OUT_Hub_DIR' U1-Y44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_10_OUT_Hub_DIR' U1-W45 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-128 NET 'MGT_FO_CH_10_OUT_Hub_CMP' U1-W46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_9_OUT_Hub_CMP' U1-V43 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-128 FLIPPED NET 'MGT_FO_CH_9_OUT_Hub_DIR' U1-V44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_24_OUT_Hub_DIR' U1-U45 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-128 NET 'MGT_FO_CH_24_OUT_Hub_CMP' U1-U46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_23_OUT_Hub_CMP' U1-T43 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-128 FLIPPED NET 'MGT_FO_CH_23_OUT_Hub_DIR' U1-T44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_22_OUT_Hub_DIR' U1-R45 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-129 NET 'MGT_FO_CH_22_OUT_Hub_CMP' U1-R46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_21_OUT_Hub_CMP' U1-P43 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-129 FLIPPED NET 'MGT_FO_CH_21_OUT_Hub_DIR' U1-P44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_20_OUT_Hub_DIR' U1-N45 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-129 NET 'MGT_FO_CH_20_OUT_Hub_CMP' U1-N46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_19_OUT_Hub_CMP' U1-M43 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-129 FLIPPED NET 'MGT_FO_CH_19_OUT_Hub_DIR' U1-M44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_18_OUT_Hub_DIR' U1-L45 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-130 NET 'MGT_FO_CH_18_OUT_Hub_CMP' U1-L46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_17_OUT_Hub_CMP' U1-K43 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-130 FLIPPED NET 'MGT_FO_CH_17_OUT_Hub_DIR' U1-K44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_32_OUT_Hub_DIR' U1-J45 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-130 NET 'MGT_FO_CH_32_OUT_Hub_CMP' U1-J46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_31_OUT_Hub_CMP' U1-H43 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-130 FLIPPED NET 'MGT_FO_CH_31_OUT_Hub_DIR' U1-H44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_30_OUT_Hub_DIR' U1-G45 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-131 NET 'MGT_FO_CH_30_OUT_Hub_CMP' U1-G46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_29_OUT_Hub_CMP' U1-F43 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-131 FLIPPED NET 'MGT_FO_CH_29_OUT_Hub_DIR' U1-F44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_28_OUT_Hub_DIR' U1-E45 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-132 NET 'MGT_FO_CH_28_OUT_Hub_CMP' U1-E46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_27_OUT_Hub_CMP' U1-D43 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-132 FLIPPED NET 'MGT_FO_CH_27_OUT_Hub_DIR' U1-D44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_26_OUT_Hub_DIR' U1-C45 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-132 NET 'MGT_FO_CH_26_OUT_Hub_CMP' U1-C46 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_25_OUT_Hub_CMP' U1-B43 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-132 FLIPPED NET 'MGT_FO_CH_25_OUT_Hub_DIR' U1-B44 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_40_OUT_Hub_DIR' U1-D33 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-133 NET 'MGT_FO_CH_40_OUT_Hub_CMP' U1-D34 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_39_OUT_Hub_CMP' U1-C31 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-133 FLIPPED NET 'MGT_FO_CH_39_OUT_Hub_DIR' U1-C32 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_38_OUT_Hub_DIR' U1-B33 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-133 NET 'MGT_FO_CH_38_OUT_Hub_CMP' U1-B34 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_37_OUT_Hub_DIR' U1-A31 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-133 NET 'MGT_FO_CH_37_OUT_Hub_CMP' U1-A32 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_36_OUT_Hub_DIR' U1-G31 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-131 NET 'MGT_FO_CH_36_OUT_Hub_CMP' U1-G32 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_35_OUT_Hub_CMP' U1-E31 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-131 FLIPPED for Test NET 'MGT_FO_CH_35_OUT_Hub_DIR' U1-E32 (NET_TYPE, 'DIFF_PAIR_HS') # # Now at the SE corner # #****************************** # # Move to the NE corner # NET 'MGT_FO_CH_34_OUT_Hub_CMP' U1-E16 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-231 FLIPPED for Test NET 'MGT_FO_CH_34_OUT_Hub_DIR' U1-E15 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_33_OUT_Hub_DIR' U1-G16 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-231 NET 'MGT_FO_CH_33_OUT_Hub_CMP' U1-G15 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_48_OUT_Hub_DIR' U1-A16 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-233 NET 'MGT_FO_CH_48_OUT_Hub_CMP' U1-A15 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_47_OUT_Hub_DIR' U1-B14 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-233 NET 'MGT_FO_CH_47_OUT_Hub_CMP' U1-B13 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_46_OUT_Hub_CMP' U1-C16 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-233 FLIPPED NET 'MGT_FO_CH_46_OUT_Hub_DIR' U1-C15 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_45_OUT_Hub_DIR' U1-D14 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-233 NET 'MGT_FO_CH_45_OUT_Hub_CMP' U1-D13 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_44_OUT_Hub_CMP' U1-B4 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-232 FLIPPED NET 'MGT_FO_CH_44_OUT_Hub_DIR' U1-B3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_43_OUT_Hub_DIR' U1-C2 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-232 NET 'MGT_FO_CH_43_OUT_Hub_CMP' U1-C1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_42_OUT_Hub_CMP' U1-D4 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-232 FLIPPED NET 'MGT_FO_CH_42_OUT_Hub_DIR' U1-D3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_41_OUT_Hub_DIR' U1-E2 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-232 NET 'MGT_FO_CH_41_OUT_Hub_CMP' U1-E1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_56_OUT_Hub_CMP' U1-F4 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-231 FLIPPED NET 'MGT_FO_CH_56_OUT_Hub_DIR' U1-F3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_55_OUT_Hub_DIR' U1-G2 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-231 NET 'MGT_FO_CH_55_OUT_Hub_CMP' U1-G1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_54_OUT_Hub_CMP' U1-H4 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-230 FLIPPED NET 'MGT_FO_CH_54_OUT_Hub_DIR' U1-H3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_53_OUT_Hub_DIR' U1-J2 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-230 NET 'MGT_FO_CH_53_OUT_Hub_CMP' U1-J1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_52_OUT_Hub_CMP' U1-K4 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-230 FLIPPED NET 'MGT_FO_CH_52_OUT_Hub_DIR' U1-K3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_51_OUT_Hub_DIR' U1-L2 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-230 NET 'MGT_FO_CH_51_OUT_Hub_CMP' U1-L1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_50_OUT_Hub_CMP' U1-M4 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-229 FLIPPED NET 'MGT_FO_CH_50_OUT_Hub_DIR' U1-M3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_49_OUT_Hub_DIR' U1-N2 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-229 NET 'MGT_FO_CH_49_OUT_Hub_CMP' U1-N1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_64_OUT_Hub_CMP' U1-P4 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-229 FLIPPED NET 'MGT_FO_CH_64_OUT_Hub_DIR' U1-P3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_63_OUT_Hub_DIR' U1-R2 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-229 NET 'MGT_FO_CH_63_OUT_Hub_CMP' U1-R1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_62_OUT_Hub_CMP' U1-T4 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-228 FLIPPED NET 'MGT_FO_CH_62_OUT_Hub_DIR' U1-T3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_61_OUT_Hub_DIR' U1-U2 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-228 NET 'MGT_FO_CH_61_OUT_Hub_CMP' U1-U1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_60_OUT_Hub_CMP' U1-V4 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-228 FLIPPED NET 'MGT_FO_CH_60_OUT_Hub_DIR' U1-V3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_59_OUT_Hub_DIR' U1-W2 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-228 NET 'MGT_FO_CH_59_OUT_Hub_CMP' U1-W1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_58_OUT_Hub_CMP' U1-Y4 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-227 FLIPPED NET 'MGT_FO_CH_58_OUT_Hub_DIR' U1-Y3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_57_OUT_Hub_DIR' U1-AA2 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-227 NET 'MGT_FO_CH_57_OUT_Hub_CMP' U1-AA1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_74_OUT_Hub_CMP' U1-AB4 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-227 FLIPPED NET 'MGT_FO_CH_74_OUT_Hub_DIR' U1-AB3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_73_OUT_Hub_DIR' U1-AC2 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-227 NET 'MGT_FO_CH_73_OUT_Hub_CMP' U1-AC1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_72_OUT_Hub_CMP' U1-AD4 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-226 FLIPPED NET 'MGT_FO_CH_72_OUT_Hub_DIR' U1-AD3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_71_OUT_Hub_DIR' U1-AE2 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-226 NET 'MGT_FO_CH_71_OUT_Hub_CMP' U1-AE1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_70_OUT_Hub_CMP' U1-AF4 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-226 FLIPPED NET 'MGT_FO_CH_70_OUT_Hub_DIR' U1-AF3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_69_OUT_Hub_DIR' U1-AG2 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-226 NET 'MGT_FO_CH_69_OUT_Hub_CMP' U1-AG1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_68_OUT_Hub_CMP' U1-AH4 (NET_TYPE, 'DIFF_PAIR_HS') # RX3-225 FLIPPED NET 'MGT_FO_CH_68_OUT_Hub_DIR' U1-AH3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_67_OUT_Hub_DIR' U1-AJ2 (NET_TYPE, 'DIFF_PAIR_HS') # RX2-225 NET 'MGT_FO_CH_67_OUT_Hub_CMP' U1-AJ1 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_66_OUT_Hub_CMP' U1-AK4 (NET_TYPE, 'DIFF_PAIR_HS') # RX1-225 FLIPPED NET 'MGT_FO_CH_66_OUT_Hub_DIR' U1-AK3 (NET_TYPE, 'DIFF_PAIR_HS') NET 'MGT_FO_CH_65_OUT_Hub_DIR' U1-AL2 (NET_TYPE, 'DIFF_PAIR_HS') # RX0-225 NET 'MGT_FO_CH_65_OUT_Hub_CMP' U1-AL1 (NET_TYPE, 'DIFF_PAIR_HS') # # Quad 224 Receiver Port 3 is used to receive the Readout Control Data # from the ROD on This Hub card. # # This net is defined in the file: hub_all_other_mgt_nets # # # Quad 224 Receiver Ports: 2, 1, 0 are used to service the MiniPOD # Receiver Fibers: 2, 4, 6 # # These nets are defined in the file: hub_all_other_mgt_nets # # Recall that MiniPOD Receiver Fiber 8 is over on Quad 124 Receiver Port 0. # # # End near the NW corner #