#
#            Ethernet Phys Chip   U21   Signal Nets
#          ------------------------------------------
#
#
#                                            Original Rev.  11-Sept-2015
#                                            Current Rev.   31-May-2015
#
#
#   This file holds all of the signal nets for the  U21  Phys Chip.
#   
#   These are the nets for the   U21   Micrel  KSZ9031RNX
#   Phys Chip which carries Ethernet from This Hub's FPGA
#   to the ADF Backplane Connectors  and  then over the
#   ATCA UpDate Channel to the Other Hub's Ethernet Switch.
#
#
#   This FPGA --> U21 Phys --> TRANS 4 Magnets --> J20 Backplane Connector
#



#
#   ***  U21 Phys Chip  Nets to its  TRANS4 Magnetics  ***
#
#   These nets are held in the netsfile:  switch_chips_to_adf_conn_nets
#




#
#   ***  U21 Phys Chip  Nets to its  Front Panel LEDs  ***
#
#   These nets are held in the netsfile:  led_connection_nets
#




#
#   Connect the 12.1k Ohm  ISET  Resistor  R1915
#

NET  'Phys_U21_ISET'    U21-48    R1915-1
NET  'GROUND'                     R1915-2




#
#   Jumper  aka Strapping  Resistors for the 4  MODE  lines
#
#    - pin 32 MODE0 and pin 31 MODE1  have pull-up and pull-down
#    - pin 28 MODE2 and pin 27 MODE3  have pull-up only
#
#    - These are all high-speed RGMII receiver data lines
#      so layout matters,  no stubs
#

NET  'Phys_U21_RXD3__MODE3'   U21-27   R1907-1
NET  'Phys_U21_DVDDH'                  R1907-2

NET  'Phys_U21_RXD2__MODE2'   U21-28   R1908-1
NET  'Phys_U21_DVDDH'                  R1908-2


NET  'Phys_U21_RXD1__MODE1'   U21-31   R1909-1   R1910-1
NET  'Phys_U21_DVDDH'                  R1909-2
NET  'GROUND'                                    R1910-2


NET  'Phys_U21_RXD0__MODE0'   U21-32   R1911-1   R1912-1
NET  'Phys_U21_DVDDH'                  R1911-2
NET  'GROUND'                                    R1912-2




#
#   Jumper  aka Strapping  Resistors for the  LED MODE
#   This is pull-up only
#

NET  'Phys_U21_CLK125__LED_MODE'   U21-41   R1914-1
NET  'Phys_U21_DVDDH'                       R1914-2




#
#   Jumper  aka Strapping  Resistors for the  CLK125 ENABLE
#   This is pull-up only
#

NET  'Phys_U21_RX_DV__CLK125_EN'   U21-33   R1913-1
NET  'Phys_U21_DVDDH'                       R1913-2




#
#   Jumper  aka Strapping  Resistors for the 3  PHYAD  lines
#
#    - pin 17 PHYAD0    pin 15 PHYAD1    pin 35 PHYAD2
#      all have pull-up and pull-down resistors
#
#    - Pin 35  RX_CLK__PHYAD2  is a high-speed RGMII receiver
#      clock line so layout matters,  no stubs
#
#    - The  PHYAD  is the address for management operations
#      over the MDC MDIO bus lines.
#
#    - Note that the Jumpers for PHYAD0 and PHYAD1  are located
#      up by the LED translator/driver U553 and the Pull-Up jumpers
#      for these lines uses a filtered 1V8 supply instead of the
#      U21 DVDDH bus.
#

NET  'Phys_U21_LED1__PHYAD0'     U21-17   R1901-1   R1902-1
NET  'RC_FLTR_1V8'                        R1901-2
NET  'GROUND'                                       R1902-2

NET  'Phys_U21_LED2__PHYAD1'     U21-15   R1903-1   R1904-1
NET  'RC_FLTR_1V8'                        R1903-2
NET  'GROUND'                                       R1904-2

NET  'Phys_U21_RX_CLK__PHYAD2'   U21-35   R1905-1   R1906-1
NET  'Phys_U21_DVDDH'                     R1905-2
NET  'GROUND'                                       R1906-2




#
#   No Connection Pin - the Hub Module does not use these pins
#

NET  'NO_CONN_Phys_U21_NC_PIN_13'    U21-13

NET  'NO_CONN_Phys_U21_LDO_PIN_43'   U21-43

NET  'NO_CONN_Phys_U21_X0_PIN_45'    U21-45

NET  'NO_CONN_Phys_U21_NC_PIN_47'    U21-47




#
#   Define the Phys U21  RGMII  Bus Lines:
#
#     Note that the pins for the following  RGMII Bus Lines
#     have already been defined in the  jumper strapping
#     section above:
#
#     RXD0__MODE0,  RXD1__MODE1,  RXD2__MODE2,  RXD3__MODE3,
#     RX_CLK__PHYAD2
#
#

NET  'Phys_U21_TXD0'      U21-19
NET  'Phys_U21_TXD1'      U21-20
NET  'Phys_U21_TXD2'      U21-21
NET  'Phys_U21_TXD3'      U21-22

NET  'Phys_U21_GTX_CLK'   U21-24

NET  'Phys_U21_TX_EN'     U21-25




#
#   Define the  25.000 MHz Clock Input  pin X1:
#
#     Note that pin  X0  was defined in the No Connect section
#

NET  'Phys_U21_X1'   U21-46




#
#   Define the Phys U21  Management Bus  MDC and MDIO  lines:
#
#     Recall that MDIO needs a pull-up resistor.
#

NET  'Phys_U21_MDC'     U21-36
NET  'Phys_U21_MDIO'    U21-37   R1917-1
NET  'Phys_U21_DVDDH'            R1917-2




#
#   Define the Phys U21  RESET  and  Interrupt  lines:
#

NET  'Phys_Chips_RESET_B'   U21-42

NET  'Phys_U21_INT_B'       U21-38




#
#   Define the  4 Pairs of  BASE-T  signals to/from Phys U21
#
#     Note from U21 these BASE_T pairs connect to
#          Magnetics TRANS4  and  then to the Backplane
#

NET  'Phys_U21_TXRX_A_DIR'   U21-2
NET  'Phys_U21_TXRX_A_CMP'   U21-3

NET  'Phys_U21_TXRX_B_DIR'   U21-5
NET  'Phys_U21_TXRX_B_CMP'   U21-6

NET  'Phys_U21_TXRX_C_DIR'   U21-7
NET  'Phys_U21_TXRX_C_CMP'   U21-8

NET  'Phys_U21_TXRX_D_DIR'   U21-10
NET  'Phys_U21_TXRX_D_CMP'   U21-11




#
#   For routing reasons the resistor/jumpers for the
#   LED1_PHYAD0 and LED1_PHYAD0  lines are located up
#   by the U553 translator/driver for these LEDs.
#   Instead of trying to route the U21 and U22 DVDDH
#   power buses up to these jumpers  I'm just going
#   to use an RC Filter  R1991 / C1991  to make a clean
#   1V8  supply for the 4 possible Pull-Up jumpers in
#   this group:  R1901 and R1903 for U21  and R1951 and
#   R1953 for U22.  The following is just the nets for
#   this little 1V8 RC filter   100 Ohm and 1 uFd.
#

NET  'BULK_1V8'      R1991-2

NET  'RC_FLTR_1V8'   R1991-1   C1991-1

NET  'GROUND'                  C1991-2