# # Ethernet Phys Chip U22 Signal Nets # ------------------------------------------ # # # Original Rev. 11-Sept-2015 # Current Rev. 31-May-2015 # # # This file holds all of the signal nets for the U22 Phys Chip. # # These are the nets for the U22 Micrel KSZ9031RNX # Phys Chip which carries Ethernet from This Hub's FPGA # to Switch B on This Hub. # # # This FPGA --> U22 Phys --> Cap Coupling --> Switch B on This Hub # # # *** U22 Phys Chip Nets to its Capacitor Coupling to Switch B *** # # These nets are held in the netsfile: switch_chip_to_cap_coupled_nets # # # *** U22 Phys Chip Nets to its Front Panel LEDs *** # # These nets are held in the netsfile: led_connection_nets # # # Connect the 12.1k Ohm ISET Resistor R1965 # NET 'Phys_U22_ISET' U22-48 R1965-1 NET 'GROUND' R1965-2 # # Jumper aka Strapping Resistors for the 4 MODE lines # # - pin 32 MODE0 and pin 31 MODE1 have pull-up and pull-down # - pin 28 MODE2 and pin 27 MODE3 have pull-up only # # - These are all high-speed RGMII receiver data lines # so layout matters, no stubs # NET 'Phys_U22_RXD3__MODE3' U22-27 R1957-1 NET 'Phys_U22_DVDDH' R1957-2 NET 'Phys_U22_RXD2__MODE2' U22-28 R1958-1 NET 'Phys_U22_DVDDH' R1958-2 NET 'Phys_U22_RXD1__MODE1' U22-31 R1959-1 R1960-1 NET 'Phys_U22_DVDDH' R1959-2 NET 'GROUND' R1960-2 NET 'Phys_U22_RXD0__MODE0' U22-32 R1961-1 R1962-1 NET 'Phys_U22_DVDDH' R1961-2 NET 'GROUND' R1962-2 # # Jumper aka Strapping Resistors for the LED MODE # This is pull-up only # NET 'Phys_U22_CLK125__LED_MODE' U22-41 R1964-1 NET 'Phys_U22_DVDDH' R1964-2 # # Jumper aka Strapping Resistors for the CLK125 ENABLE # This is pull-up only # NET 'Phys_U22_RX_DV__CLK125_EN' U22-33 R1963-1 NET 'Phys_U22_DVDDH' R1963-2 # # Jumper aka Strapping Resistors for the 3 PHYAD lines # # - pin 17 PHYAD0 pin 15 PHYAD1 pin 35 PHYAD2 # all have pull-up and pull-down resistors # # - Pin 35 RX_CLK__PHYAD2 is a high-speed RGMII receiver # clock line so layout matters, no stubs # # - The PHYAD is the address for management operations # over the MDC MDIO bus lines. # # - Note that the Jumpers for PHYAD0 and PHYAD1 are located # up by the LED translator/driver U553 and the Pull-Up jumpers # for these lines uses a filtered 1V8 supply instead of the # U22 DVDDH bus. # NET 'Phys_U22_LED1__PHYAD0' U22-17 R1951-1 R1952-1 NET 'RC_FLTR_1V8' R1951-2 NET 'GROUND' R1952-2 NET 'Phys_U22_LED2__PHYAD1' U22-15 R1953-1 R1954-1 NET 'RC_FLTR_1V8' R1953-2 NET 'GROUND' R1954-2 NET 'Phys_U22_RX_CLK__PHYAD2' U22-35 R1955-1 R1956-1 NET 'Phys_U22_DVDDH' R1955-2 NET 'GROUND' R1956-2 # # No Connection Pin - the Hub Module does not use these pins # NET 'NO_CONN_Phys_U22_NC_PIN_13' U22-13 NET 'NO_CONN_Phys_U22_LDO_PIN_43' U22-43 NET 'NO_CONN_Phys_U22_X0_PIN_45' U22-45 NET 'NO_CONN_Phys_U22_NC_PIN_47' U22-47 # # Define the Phys U22 RGMII Bus Lines: # # Note that the pins for the following RGMII Bus Lines # have already been defined in the jumper strapping # section above: # # RXD0__MODE0, RXD1__MODE1, RXD2__MODE2, RXD3__MODE3, # RX_CLK__PHYAD2 # # NET 'Phys_U22_TXD0' U22-19 NET 'Phys_U22_TXD1' U22-20 NET 'Phys_U22_TXD2' U22-21 NET 'Phys_U22_TXD3' U22-22 NET 'Phys_U22_GTX_CLK' U22-24 NET 'Phys_U22_TX_EN' U22-25 # # Define the 25.000 MHz Clock Input pin X1: # # Note that pin X0 was defined in the No Connect section # NET 'Phys_U22_X1' U22-46 # # Define the Phys U22 Management Bus MDC and MDIO lines: # # Recall that MDIO needs a pull-up resistor. # NET 'Phys_U22_MDC' U22-36 NET 'Phys_U22_MDIO' U22-37 R1967-1 NET 'Phys_U22_DVDDH' R1967-2 # # Define the Phys U22 RESET and Interrupt lines: # NET 'Phys_Chips_RESET_B' U22-42 NET 'Phys_U22_INT_B' U22-38 # # Define the 4 Pairs of BASE-T signals to/from Phys U22 # # Note from U22 these BASE_T pairs connect to # coupling capacitors and then to Switch B. # NET 'Phys_U22_TXRX_A_DIR' U22-2 NET 'Phys_U22_TXRX_A_CMP' U22-3 NET 'Phys_U22_TXRX_B_DIR' U22-5 NET 'Phys_U22_TXRX_B_CMP' U22-6 NET 'Phys_U22_TXRX_C_DIR' U22-7 NET 'Phys_U22_TXRX_C_CMP' U22-8 NET 'Phys_U22_TXRX_D_DIR' U22-10 NET 'Phys_U22_TXRX_D_CMP' U22-11