# # Switch Chip to Switch Chip Nets # -------------------------------------- # # # Original Rev. 22-Apr-2015 # Current Rev. 8-Mar-2016 # # # This Net List File contain the connections between: # # Switch Chip B <--> Switch Chip A # Switch Chip B <--> Switch Chip C # Switch Chip B <--> This Hub's FPGA Phys U22. # # # Chip "A" U31 # # Port 7 to Switch Chip "B" Capacitor Coupled # # # Chip "B" U32 is the "center" Switch Chip: # # Port 4 to This Hub's FPGA Phys U22 Capacitor Coupled # Port 2 to Switch Chip "A" Capacitor Coupled # Port 3 to Switch Chip "C" Capacitor Coupled # # # Chip "C" U33 # # Port 7 to Switch Chip "B" Capacitor Coupled # # # #------------------------------------------------------------ # # Link: Chip B Port 2 <--> Chip A Port 7 # #------------------------------------------------------------ # # Switch Chip "B" U32 Port 2 # NET 'Chip_B_TRD0_2_DIR' U32-230 C2309-1 NET 'Chip_B_TRD0_2_CMP' U32-231 C2310-1 NET 'Chip_B_TRD1_2_DIR' U32-234 C2311-1 NET 'Chip_B_TRD1_2_CMP' U32-233 C2312-1 NET 'Chip_B_TRD2_2_DIR' U32-236 C2313-1 NET 'Chip_B_TRD2_2_CMP' U32-237 C2314-1 NET 'Chip_B_TRD3_2_DIR' U32-240 C2315-1 NET 'Chip_B_TRD3_2_CMP' U32-239 C2316-1 # #------------------------------------------------------------ # # Switch Chip "A" U31 Port 7 # NET 'Chip_A_TRD0_7_DIR' U31-123 C2309-2 NET 'Chip_A_TRD0_7_CMP' U31-122 C2310-2 NET 'Chip_A_TRD1_7_DIR' U31-119 C2311-2 NET 'Chip_A_TRD1_7_CMP' U31-120 C2312-2 NET 'Chip_A_TRD2_7_DIR' U31-117 C2313-2 NET 'Chip_A_TRD2_7_CMP' U31-116 C2314-2 NET 'Chip_A_TRD3_7_DIR' U31-113 C2315-2 NET 'Chip_A_TRD3_7_CMP' U31-114 C2316-2 # #------------------------------------------------------------ # # #------------------------------------------------------------ # # Link: Chip B Port 3 <--> Chip C Port 7 # #------------------------------------------------------------ # # Switch Chip "B" U32 Port 3 # NET 'Chip_B_TRD0_3_DIR' U32-252 C2301-1 NET 'Chip_B_TRD0_3_CMP' U32-251 C2302-1 NET 'Chip_B_TRD1_3_DIR' U32-248 C2303-1 NET 'Chip_B_TRD1_3_CMP' U32-249 C2304-1 NET 'Chip_B_TRD2_3_DIR' U32-246 C2305-1 NET 'Chip_B_TRD2_3_CMP' U32-245 C2306-1 NET 'Chip_B_TRD3_3_DIR' U32-242 C2307-1 NET 'Chip_B_TRD3_3_CMP' U32-243 C2308-1 # #------------------------------------------------------------ # # Switch Chip "C" U33 Port 7 # NET 'Chip_C_TRD0_7_DIR' U33-123 C2301-2 NET 'Chip_C_TRD0_7_CMP' U33-122 C2302-2 NET 'Chip_C_TRD1_7_DIR' U33-119 C2303-2 NET 'Chip_C_TRD1_7_CMP' U33-120 C2304-2 NET 'Chip_C_TRD2_7_DIR' U33-117 C2305-2 NET 'Chip_C_TRD2_7_CMP' U33-116 C2306-2 NET 'Chip_C_TRD3_7_DIR' U33-113 C2307-2 NET 'Chip_C_TRD3_7_CMP' U33-114 C2308-2 # #------------------------------------------------------------ # # #------------------------------------------------------------ # # Link: Chip B Port 4 <--> This Hub's FPGA Phys U22 # #------------------------------------------------------------ # # Switch Chip "B" U32 Port 4 connection to couping caps # NET 'Chip_B_TRD0_4_DIR' U32-72 C2317-1 NET 'Chip_B_TRD0_4_CMP' U32-73 C2318-1 NET 'Chip_B_TRD1_4_DIR' U32-76 C2319-1 NET 'Chip_B_TRD1_4_CMP' U32-75 C2320-1 NET 'Chip_B_TRD2_4_DIR' U32-78 C2321-1 NET 'Chip_B_TRD2_4_CMP' U32-79 C2322-1 NET 'Chip_B_TRD3_4_DIR' U32-82 C2323-1 NET 'Chip_B_TRD3_4_CMP' U32-81 C2324-1 # #------------------------------------------------------------ # # This Hub's FPGA Phys Chip U22 connection to coupling caps # NET 'Phys_U22_TXRX_A_DIR' C2317-2 NET 'Phys_U22_TXRX_A_CMP' C2318-2 NET 'Phys_U22_TXRX_B_DIR' C2319-2 NET 'Phys_U22_TXRX_B_CMP' C2320-2 NET 'Phys_U22_TXRX_C_DIR' C2321-2 NET 'Phys_U22_TXRX_C_CMP' C2322-2 NET 'Phys_U22_TXRX_D_DIR' C2323-2 NET 'Phys_U22_TXRX_D_CMP' C2324-2 # #------------------------------------------------------------ #