Found 64 pins for U504 which is of type IC_CDCLVD1216 ------------------------------------------------------ Pins sorted by Pin Name 1 = GROUND GND from line 399 of clock_generation_nets 2 = Select_Input_Second_40_Fanout IN_SEL from line 349 of clock_generation_nets 3 = Tie_Off_2nd_40_FO_IN1_P INP1 from line 322 of clock_generation_nets 4 = Second_Fanout_CMM_Ref INN1 from line 320 of clock_generation_nets 5 = Second_Fanout_CMM_Ref VAC_REF1 from line 313 of clock_generation_nets 6 = CLK_2V5 VCC 2V5 from line 398 of clock_generation_nets 7 = CLK_2V5 VCC 2V5 from line 398 of clock_generation_nets 8 = No_Conn_2nd_40_FO_Ref_8 VAC_REF0 from line 418 of clock_generation_nets 9 = Second_Fanout_40.08_MHz_Input_Cmp INN0 from line 311 of clock_generation_nets 10 = Second_Fanout_40.08_MHz_Input_Dir INP0 from line 310 of clock_generation_nets 11 = No_Conn_2nd_40_FO_11 NoConn from line 419 of clock_generation_nets 12 = GROUND GND from line 399 of clock_generation_nets 13 = CLK_2V5 VCC 2V5 from line 398 of clock_generation_nets 14 = No_Conn_Second_40_MHz_FO_Out_0_Dir OUTP0 from line 157 of clock_40.08_MHz_distribution_nets 15 = No_Conn_Second_40_MHz_FO_Out_0_Cmp OUTN0 from line 158 of clock_40.08_MHz_distribution_nets 16 = No_Conn_Second_40_MHz_FO_Out_1_Dir OUTP1 from line 160 of clock_40.08_MHz_distribution_nets 17 = No_Conn_Second_40_MHz_FO_Out_1_Cmp OUTN1 from line 161 of clock_40.08_MHz_distribution_nets 18 = Clk_to_Cap_to_Other_Hub_Dir OUTP2 from line 108 of clock_40.08_MHz_distribution_nets 19 = Clk_to_Cap_to_Other_Hub_Cmp OUTN2 from line 109 of clock_40.08_MHz_distribution_nets 20 = Clk_to_Cap_to_FEX_03_Dir OUTP3 from line 112 of clock_40.08_MHz_distribution_nets 21 = Clk_to_Cap_to_FEX_03_Cmp OUTN3 from line 113 of clock_40.08_MHz_distribution_nets 22 = Clk_to_Cap_to_FEX_04_Dir OUTP4 from line 115 of clock_40.08_MHz_distribution_nets 23 = Clk_to_Cap_to_FEX_04_Cmp OUTN4 from line 116 of clock_40.08_MHz_distribution_nets 24 = CLK_2V5 VCC 2V5 from line 398 of clock_generation_nets 25 = Clk_to_Cap_to_FEX_05_Dir OUTP5 from line 119 of clock_40.08_MHz_distribution_nets 26 = Clk_to_Cap_to_FEX_05_Cmp OUTN5 from line 120 of clock_40.08_MHz_distribution_nets 27 = Clk_to_Cap_to_FEX_06_Dir OUTP6 from line 122 of clock_40.08_MHz_distribution_nets 28 = Clk_to_Cap_to_FEX_06_Cmp OUTN6 from line 123 of clock_40.08_MHz_distribution_nets 29 = Clk_to_Cap_to_FEX_07_Dir OUTP7 from line 125 of clock_40.08_MHz_distribution_nets 30 = Clk_to_Cap_to_FEX_07_Cmp OUTN7 from line 126 of clock_40.08_MHz_distribution_nets 31 = Clk_to_Cap_to_FEX_08_Dir OUTP8 from line 128 of clock_40.08_MHz_distribution_nets 32 = Clk_to_Cap_to_FEX_08_Cmp OUTN8 from line 129 of clock_40.08_MHz_distribution_nets 33 = Clk_to_Cap_to_FEX_09_Dir OUTP9 from line 131 of clock_40.08_MHz_distribution_nets 34 = Clk_to_Cap_to_FEX_09_Cmp OUTN9 from line 132 of clock_40.08_MHz_distribution_nets 35 = Clk_to_Cap_to_FEX_10_Dir OUTP10 from line 134 of clock_40.08_MHz_distribution_nets 36 = Clk_to_Cap_to_FEX_10_Cmp OUTN10 from line 135 of clock_40.08_MHz_distribution_nets 37 = CLK_2V5 VCC 2V5 from line 398 of clock_generation_nets 38 = Clk_to_Cap_to_FEX_11_Dir OUTP11 from line 138 of clock_40.08_MHz_distribution_nets 39 = Clk_to_Cap_to_FEX_11_Cmp OUTN11 from line 139 of clock_40.08_MHz_distribution_nets 40 = Clk_to_Cap_to_FEX_12_Dir OUTP12 from line 141 of clock_40.08_MHz_distribution_nets 41 = Clk_to_Cap_to_FEX_12_Cmp OUTN12 from line 142 of clock_40.08_MHz_distribution_nets 42 = Clk_to_Cap_to_FEX_13_Dir OUTP13 from line 144 of clock_40.08_MHz_distribution_nets 43 = Clk_to_Cap_to_FEX_13_Cmp OUTN13 from line 145 of clock_40.08_MHz_distribution_nets 44 = Clk_to_Cap_to_FEX_14_Dir OUTP14 from line 147 of clock_40.08_MHz_distribution_nets 45 = Clk_to_Cap_to_FEX_14_Cmp OUTN14 from line 148 of clock_40.08_MHz_distribution_nets 46 = No_Conn_Second_40_MHz_FO_Out_15_Dir OUTP15 from line 163 of clock_40.08_MHz_distribution_nets 47 = No_Conn_Second_40_MHz_FO_Out_15_Cmp OUTN15 from line 164 of clock_40.08_MHz_distribution_nets 48 = CLK_2V5 VCC 2V5 from line 398 of clock_generation_nets 49 = GROUND Thrm Gnd from line 400 of clock_generation_nets 50 = GROUND Thrm Gnd from line 400 of clock_generation_nets 51 = GROUND Thrm Gnd from line 400 of clock_generation_nets 52 = GROUND Thrm Gnd from line 400 of clock_generation_nets 53 = GROUND Thrm Gnd from line 401 of clock_generation_nets 54 = GROUND Thrm Gnd from line 401 of clock_generation_nets 55 = GROUND Thrm Gnd from line 401 of clock_generation_nets 56 = GROUND Thrm Gnd from line 401 of clock_generation_nets 57 = GROUND Thrm Gnd from line 402 of clock_generation_nets 58 = GROUND Thrm Gnd from line 402 of clock_generation_nets 59 = GROUND Thrm Gnd from line 402 of clock_generation_nets 60 = GROUND Thrm Gnd from line 402 of clock_generation_nets 61 = GROUND Thrm Gnd from line 403 of clock_generation_nets 62 = GROUND Thrm Gnd from line 403 of clock_generation_nets 63 = GROUND Thrm Gnd from line 403 of clock_generation_nets 64 = GROUND Thrm Gnd from line 403 of clock_generation_nets ------------------------------------------------------ Pins sorted by Net Name 48 = CLK_2V5 VCC 2V5 from line 398 of clock_generation_nets 24 = CLK_2V5 VCC 2V5 from line 398 of clock_generation_nets 7 = CLK_2V5 VCC 2V5 from line 398 of clock_generation_nets 6 = CLK_2V5 VCC 2V5 from line 398 of clock_generation_nets 13 = CLK_2V5 VCC 2V5 from line 398 of clock_generation_nets 37 = CLK_2V5 VCC 2V5 from line 398 of clock_generation_nets 21 = Clk_to_Cap_to_FEX_03_Cmp OUTN3 from line 113 of clock_40.08_MHz_distribution_nets 20 = Clk_to_Cap_to_FEX_03_Dir OUTP3 from line 112 of clock_40.08_MHz_distribution_nets 23 = Clk_to_Cap_to_FEX_04_Cmp OUTN4 from line 116 of clock_40.08_MHz_distribution_nets 22 = Clk_to_Cap_to_FEX_04_Dir OUTP4 from line 115 of clock_40.08_MHz_distribution_nets 26 = Clk_to_Cap_to_FEX_05_Cmp OUTN5 from line 120 of clock_40.08_MHz_distribution_nets 25 = Clk_to_Cap_to_FEX_05_Dir OUTP5 from line 119 of clock_40.08_MHz_distribution_nets 28 = Clk_to_Cap_to_FEX_06_Cmp OUTN6 from line 123 of clock_40.08_MHz_distribution_nets 27 = Clk_to_Cap_to_FEX_06_Dir OUTP6 from line 122 of clock_40.08_MHz_distribution_nets 30 = Clk_to_Cap_to_FEX_07_Cmp OUTN7 from line 126 of clock_40.08_MHz_distribution_nets 29 = Clk_to_Cap_to_FEX_07_Dir OUTP7 from line 125 of clock_40.08_MHz_distribution_nets 32 = Clk_to_Cap_to_FEX_08_Cmp OUTN8 from line 129 of clock_40.08_MHz_distribution_nets 31 = Clk_to_Cap_to_FEX_08_Dir OUTP8 from line 128 of clock_40.08_MHz_distribution_nets 34 = Clk_to_Cap_to_FEX_09_Cmp OUTN9 from line 132 of clock_40.08_MHz_distribution_nets 33 = Clk_to_Cap_to_FEX_09_Dir OUTP9 from line 131 of clock_40.08_MHz_distribution_nets 36 = Clk_to_Cap_to_FEX_10_Cmp OUTN10 from line 135 of clock_40.08_MHz_distribution_nets 35 = Clk_to_Cap_to_FEX_10_Dir OUTP10 from line 134 of clock_40.08_MHz_distribution_nets 39 = Clk_to_Cap_to_FEX_11_Cmp OUTN11 from line 139 of clock_40.08_MHz_distribution_nets 38 = Clk_to_Cap_to_FEX_11_Dir OUTP11 from line 138 of clock_40.08_MHz_distribution_nets 41 = Clk_to_Cap_to_FEX_12_Cmp OUTN12 from line 142 of clock_40.08_MHz_distribution_nets 40 = Clk_to_Cap_to_FEX_12_Dir OUTP12 from line 141 of clock_40.08_MHz_distribution_nets 43 = Clk_to_Cap_to_FEX_13_Cmp OUTN13 from line 145 of clock_40.08_MHz_distribution_nets 42 = Clk_to_Cap_to_FEX_13_Dir OUTP13 from line 144 of clock_40.08_MHz_distribution_nets 45 = Clk_to_Cap_to_FEX_14_Cmp OUTN14 from line 148 of clock_40.08_MHz_distribution_nets 44 = Clk_to_Cap_to_FEX_14_Dir OUTP14 from line 147 of clock_40.08_MHz_distribution_nets 19 = Clk_to_Cap_to_Other_Hub_Cmp OUTN2 from line 109 of clock_40.08_MHz_distribution_nets 18 = Clk_to_Cap_to_Other_Hub_Dir OUTP2 from line 108 of clock_40.08_MHz_distribution_nets 1 = GROUND GND from line 399 of clock_generation_nets 12 = GROUND GND from line 399 of clock_generation_nets 49 = GROUND Thrm Gnd from line 400 of clock_generation_nets 52 = GROUND Thrm Gnd from line 400 of clock_generation_nets 51 = GROUND Thrm Gnd from line 400 of clock_generation_nets 50 = GROUND Thrm Gnd from line 400 of clock_generation_nets 56 = GROUND Thrm Gnd from line 401 of clock_generation_nets 54 = GROUND Thrm Gnd from line 401 of clock_generation_nets 53 = GROUND Thrm Gnd from line 401 of clock_generation_nets 55 = GROUND Thrm Gnd from line 401 of clock_generation_nets 60 = GROUND Thrm Gnd from line 402 of clock_generation_nets 59 = GROUND Thrm Gnd from line 402 of clock_generation_nets 58 = GROUND Thrm Gnd from line 402 of clock_generation_nets 57 = GROUND Thrm Gnd from line 402 of clock_generation_nets 61 = GROUND Thrm Gnd from line 403 of clock_generation_nets 62 = GROUND Thrm Gnd from line 403 of clock_generation_nets 63 = GROUND Thrm Gnd from line 403 of clock_generation_nets 64 = GROUND Thrm Gnd from line 403 of clock_generation_nets 11 = No_Conn_2nd_40_FO_11 NoConn from line 419 of clock_generation_nets 8 = No_Conn_2nd_40_FO_Ref_8 VAC_REF0 from line 418 of clock_generation_nets 15 = No_Conn_Second_40_MHz_FO_Out_0_Cmp OUTN0 from line 158 of clock_40.08_MHz_distribution_nets 14 = No_Conn_Second_40_MHz_FO_Out_0_Dir OUTP0 from line 157 of clock_40.08_MHz_distribution_nets 47 = No_Conn_Second_40_MHz_FO_Out_15_Cmp OUTN15 from line 164 of clock_40.08_MHz_distribution_nets 46 = No_Conn_Second_40_MHz_FO_Out_15_Dir OUTP15 from line 163 of clock_40.08_MHz_distribution_nets 17 = No_Conn_Second_40_MHz_FO_Out_1_Cmp OUTN1 from line 161 of clock_40.08_MHz_distribution_nets 16 = No_Conn_Second_40_MHz_FO_Out_1_Dir OUTP1 from line 160 of clock_40.08_MHz_distribution_nets 9 = Second_Fanout_40.08_MHz_Input_Cmp INN0 from line 311 of clock_generation_nets 10 = Second_Fanout_40.08_MHz_Input_Dir INP0 from line 310 of clock_generation_nets 4 = Second_Fanout_CMM_Ref INN1 from line 320 of clock_generation_nets 5 = Second_Fanout_CMM_Ref VAC_REF1 from line 313 of clock_generation_nets 2 = Select_Input_Second_40_Fanout IN_SEL from line 349 of clock_generation_nets 3 = Tie_Off_2nd_40_FO_IN1_P INP1 from line 322 of clock_generation_nets