Found 48 pins for TRNS2 which is of type Pulse_HX5201NL ------------------------------------------------------ Pins sorted by Pin Name L1 = Chip_A_TRD0_6_DIR Left TD0+ from line 133 of switch_chips_to_rj2_conn_nets L2 = TRNS2_L_A_0_PRI_CT Left TCT0 from line 181 of switch_chips_to_rj2_conn_nets L3 = Chip_A_TRD0_6_CMP Left TD0- from line 134 of switch_chips_to_rj2_conn_nets L4 = Chip_A_TRD1_6_DIR Left TD1+ from line 136 of switch_chips_to_rj2_conn_nets L5 = TRNS2_L_B_1_PRI_CT Left TCT1 from line 182 of switch_chips_to_rj2_conn_nets L6 = Chip_A_TRD1_6_CMP Left TD1- from line 137 of switch_chips_to_rj2_conn_nets L7 = RJ2_L_A_0_DIR Left MX0+ from line 149 of switch_chips_to_rj2_conn_nets L8 = TRNS2_L_A_0_SEC_CT Left MCT0 from line 206 of switch_chips_to_rj2_conn_nets L9 = RJ2_L_A_0_CMP Left MX0- from line 150 of switch_chips_to_rj2_conn_nets R1 = Chip_C_TRD0_6_DIR Right TD0+ from line 94 of switch_chips_to_rj2_conn_nets R2 = TRNS2_R_A_0_PRI_CT Right TCT0 from line 173 of switch_chips_to_rj2_conn_nets R3 = Chip_C_TRD0_6_CMP Right TD0- from line 95 of switch_chips_to_rj2_conn_nets R4 = Chip_C_TRD1_6_DIR Right TD1+ from line 97 of switch_chips_to_rj2_conn_nets R5 = TRNS2_R_B_1_PRI_CT Right TCT1 from line 174 of switch_chips_to_rj2_conn_nets R6 = Chip_C_TRD1_6_CMP Right TD1- from line 98 of switch_chips_to_rj2_conn_nets R7 = RJ2_U_A_0_DIR Right MX0+ from line 110 of switch_chips_to_rj2_conn_nets R8 = TRNS2_R_A_0_SEC_CT Right MCT0 from line 196 of switch_chips_to_rj2_conn_nets R9 = RJ2_U_A_0_CMP Right MX0- from line 111 of switch_chips_to_rj2_conn_nets L10 = RJ2_L_B_1_DIR Left MX1+ from line 152 of switch_chips_to_rj2_conn_nets L11 = TRNS2_L_B_1_SEC_CT Left MCT1 from line 207 of switch_chips_to_rj2_conn_nets L12 = RJ2_L_B_1_CMP Left MX1- from line 153 of switch_chips_to_rj2_conn_nets L13 = RJ2_L_D_3_CMP Left MX3- from line 159 of switch_chips_to_rj2_conn_nets L14 = TRNS2_L_D_3_SEC_CT Left MCT3 from line 209 of switch_chips_to_rj2_conn_nets L15 = RJ2_L_D_3_DIR Left MX3+ from line 158 of switch_chips_to_rj2_conn_nets L16 = RJ2_L_C_2_CMP Left MX2- from line 156 of switch_chips_to_rj2_conn_nets L17 = TRNS2_L_C_2_SEC_CT Left MCT2 from line 208 of switch_chips_to_rj2_conn_nets L18 = RJ2_L_C_2_DIR Left MX2+ from line 155 of switch_chips_to_rj2_conn_nets L19 = Chip_A_TRD3_6_CMP Left TD3- from line 143 of switch_chips_to_rj2_conn_nets L20 = TRNS2_L_D_3_PRI_CT Left TCT3 from line 184 of switch_chips_to_rj2_conn_nets L21 = Chip_A_TRD3_6_DIR Left TD3+ from line 142 of switch_chips_to_rj2_conn_nets L22 = Chip_A_TRD2_6_CMP Left TD2- from line 140 of switch_chips_to_rj2_conn_nets L23 = TRNS2_L_C_2_PRI_CT Left TCT2 from line 183 of switch_chips_to_rj2_conn_nets L24 = Chip_A_TRD2_6_DIR Left TD2+ from line 139 of switch_chips_to_rj2_conn_nets R10 = RJ2_U_B_1_DIR Right MX1+ from line 113 of switch_chips_to_rj2_conn_nets R11 = TRNS2_R_B_1_SEC_CT Right MCT1 from line 197 of switch_chips_to_rj2_conn_nets R12 = RJ2_U_B_1_CMP Right MX1- from line 114 of switch_chips_to_rj2_conn_nets R13 = RJ2_U_D_3_CMP Right MX3- from line 120 of switch_chips_to_rj2_conn_nets R14 = TRNS2_R_D_3_SEC_CT Right MCT3 from line 199 of switch_chips_to_rj2_conn_nets R15 = RJ2_U_D_3_DIR Right MX3+ from line 119 of switch_chips_to_rj2_conn_nets R16 = RJ2_U_C_2_CMP Right MX2- from line 117 of switch_chips_to_rj2_conn_nets R17 = TRNS2_R_C_2_SEC_CT Right MCT2 from line 198 of switch_chips_to_rj2_conn_nets R18 = RJ2_U_C_2_DIR Right MX2+ from line 116 of switch_chips_to_rj2_conn_nets R19 = Chip_C_TRD3_6_CMP Right TD3- from line 104 of switch_chips_to_rj2_conn_nets R20 = TRNS2_R_D_3_PRI_CT Right TCT3 from line 176 of switch_chips_to_rj2_conn_nets R21 = Chip_C_TRD3_6_DIR Right TD3+ from line 103 of switch_chips_to_rj2_conn_nets R22 = Chip_C_TRD2_6_CMP Right TD2- from line 101 of switch_chips_to_rj2_conn_nets R23 = TRNS2_R_C_2_PRI_CT Right TCT2 from line 175 of switch_chips_to_rj2_conn_nets R24 = Chip_C_TRD2_6_DIR Right TD2+ from line 100 of switch_chips_to_rj2_conn_nets ------------------------------------------------------ Pins sorted by Net Name L3 = Chip_A_TRD0_6_CMP Left TD0- from line 134 of switch_chips_to_rj2_conn_nets L1 = Chip_A_TRD0_6_DIR Left TD0+ from line 133 of switch_chips_to_rj2_conn_nets L6 = Chip_A_TRD1_6_CMP Left TD1- from line 137 of switch_chips_to_rj2_conn_nets L4 = Chip_A_TRD1_6_DIR Left TD1+ from line 136 of switch_chips_to_rj2_conn_nets L22 = Chip_A_TRD2_6_CMP Left TD2- from line 140 of switch_chips_to_rj2_conn_nets L24 = Chip_A_TRD2_6_DIR Left TD2+ from line 139 of switch_chips_to_rj2_conn_nets L19 = Chip_A_TRD3_6_CMP Left TD3- from line 143 of switch_chips_to_rj2_conn_nets L21 = Chip_A_TRD3_6_DIR Left TD3+ from line 142 of switch_chips_to_rj2_conn_nets R3 = Chip_C_TRD0_6_CMP Right TD0- from line 95 of switch_chips_to_rj2_conn_nets R1 = Chip_C_TRD0_6_DIR Right TD0+ from line 94 of switch_chips_to_rj2_conn_nets R6 = Chip_C_TRD1_6_CMP Right TD1- from line 98 of switch_chips_to_rj2_conn_nets R4 = Chip_C_TRD1_6_DIR Right TD1+ from line 97 of switch_chips_to_rj2_conn_nets R22 = Chip_C_TRD2_6_CMP Right TD2- from line 101 of switch_chips_to_rj2_conn_nets R24 = Chip_C_TRD2_6_DIR Right TD2+ from line 100 of switch_chips_to_rj2_conn_nets R19 = Chip_C_TRD3_6_CMP Right TD3- from line 104 of switch_chips_to_rj2_conn_nets R21 = Chip_C_TRD3_6_DIR Right TD3+ from line 103 of switch_chips_to_rj2_conn_nets L9 = RJ2_L_A_0_CMP Left MX0- from line 150 of switch_chips_to_rj2_conn_nets L7 = RJ2_L_A_0_DIR Left MX0+ from line 149 of switch_chips_to_rj2_conn_nets L12 = RJ2_L_B_1_CMP Left MX1- from line 153 of switch_chips_to_rj2_conn_nets L10 = RJ2_L_B_1_DIR Left MX1+ from line 152 of switch_chips_to_rj2_conn_nets L16 = RJ2_L_C_2_CMP Left MX2- from line 156 of switch_chips_to_rj2_conn_nets L18 = RJ2_L_C_2_DIR Left MX2+ from line 155 of switch_chips_to_rj2_conn_nets L13 = RJ2_L_D_3_CMP Left MX3- from line 159 of switch_chips_to_rj2_conn_nets L15 = RJ2_L_D_3_DIR Left MX3+ from line 158 of switch_chips_to_rj2_conn_nets R9 = RJ2_U_A_0_CMP Right MX0- from line 111 of switch_chips_to_rj2_conn_nets R7 = RJ2_U_A_0_DIR Right MX0+ from line 110 of switch_chips_to_rj2_conn_nets R12 = RJ2_U_B_1_CMP Right MX1- from line 114 of switch_chips_to_rj2_conn_nets R10 = RJ2_U_B_1_DIR Right MX1+ from line 113 of switch_chips_to_rj2_conn_nets R16 = RJ2_U_C_2_CMP Right MX2- from line 117 of switch_chips_to_rj2_conn_nets R18 = RJ2_U_C_2_DIR Right MX2+ from line 116 of switch_chips_to_rj2_conn_nets R13 = RJ2_U_D_3_CMP Right MX3- from line 120 of switch_chips_to_rj2_conn_nets R15 = RJ2_U_D_3_DIR Right MX3+ from line 119 of switch_chips_to_rj2_conn_nets L2 = TRNS2_L_A_0_PRI_CT Left TCT0 from line 181 of switch_chips_to_rj2_conn_nets L8 = TRNS2_L_A_0_SEC_CT Left MCT0 from line 206 of switch_chips_to_rj2_conn_nets L5 = TRNS2_L_B_1_PRI_CT Left TCT1 from line 182 of switch_chips_to_rj2_conn_nets L11 = TRNS2_L_B_1_SEC_CT Left MCT1 from line 207 of switch_chips_to_rj2_conn_nets L23 = TRNS2_L_C_2_PRI_CT Left TCT2 from line 183 of switch_chips_to_rj2_conn_nets L17 = TRNS2_L_C_2_SEC_CT Left MCT2 from line 208 of switch_chips_to_rj2_conn_nets L20 = TRNS2_L_D_3_PRI_CT Left TCT3 from line 184 of switch_chips_to_rj2_conn_nets L14 = TRNS2_L_D_3_SEC_CT Left MCT3 from line 209 of switch_chips_to_rj2_conn_nets R2 = TRNS2_R_A_0_PRI_CT Right TCT0 from line 173 of switch_chips_to_rj2_conn_nets R8 = TRNS2_R_A_0_SEC_CT Right MCT0 from line 196 of switch_chips_to_rj2_conn_nets R5 = TRNS2_R_B_1_PRI_CT Right TCT1 from line 174 of switch_chips_to_rj2_conn_nets R11 = TRNS2_R_B_1_SEC_CT Right MCT1 from line 197 of switch_chips_to_rj2_conn_nets R23 = TRNS2_R_C_2_PRI_CT Right TCT2 from line 175 of switch_chips_to_rj2_conn_nets R17 = TRNS2_R_C_2_SEC_CT Right MCT2 from line 198 of switch_chips_to_rj2_conn_nets R20 = TRNS2_R_D_3_PRI_CT Right TCT3 from line 176 of switch_chips_to_rj2_conn_nets R14 = TRNS2_R_D_3_SEC_CT Right MCT3 from line 199 of switch_chips_to_rj2_conn_nets