Found 5 pins for U501 which is of type IC_65LVDT2

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Pins sorted by Pin Name

    1 = CLK_3V3                                   VCC                                  from line   380 of clock_generation_nets
    2 = GROUND                                    GND                                  from line   381 of clock_generation_nets
    3 = Ref_40.08_MHz_from_FPGA_to_Rec_Dir        A non-inv input                      from line   222 of clock_generation_nets
    4 = Ref_40.08_MHz_from_FPGA_to_Rec_Cmp        B inverting input                    from line   223 of clock_generation_nets
    5 = Ref_40.08_MHz_from_Rec_to_Term            LVTTL output                         from line   225 of clock_generation_nets

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Pins sorted by Net Name

    1 = CLK_3V3                                   VCC                                  from line   380 of clock_generation_nets
    2 = GROUND                                    GND                                  from line   381 of clock_generation_nets
    4 = Ref_40.08_MHz_from_FPGA_to_Rec_Cmp        B inverting input                    from line   223 of clock_generation_nets
    3 = Ref_40.08_MHz_from_FPGA_to_Rec_Dir        A non-inv input                      from line   222 of clock_generation_nets
    5 = Ref_40.08_MHz_from_Rec_to_Term            LVTTL output                         from line   225 of clock_generation_nets