Quadrant Term CTOM Card Setup Notes: ---------------------------------------- Original Version: 10-NOV-2003 Current Version: 22-DEC-2003 The purpose of this note is to describe the hardware setup used to generate the Quadrant-Region Terms. This involves using the Quandrant Term version of the CTOM FPGA design. The following is information about how the Quadrant Term Generation CTOM card will be setup. A description of the connection of the CHTCR Card's "Hint" signals to the Quad Term CTOM is given below. The Quadrant Term CTOM card is installed in M101 Middle Crate Slot 14. The Quadrant Term CTOM card uses the CTOM FPGA Design in FPGA sites 1:8 and uses the Miguel FPGA Design in FPGA sites 9:16. The 8x CTOM FPGA's on the Quadrant Term CTOM card provide And-Or Terms to the TFW. The mapping is the following: Quadrant Term CTOM Card Provides FPGA Site And-Or Terms ------------- ------------ 1 0:3 2 4:7 3 8:11 4 12:15 5 16:19 6 20:23 7 24:27 8 - Notes: FPGA Outputs are connected to And-Or Term Inputs in just the rational order, i.e. FPGA Site #1 Output #0 is connected to AOT #0 FPGA Site #1 Output #1 is connected to AOT #1 FPGA Site #1 Output #2 is connected to AOT #2 FPGA Site #1 Output #3 is connected to AOT #3 FPGA Site #2 Output #0 is connected to AOT #4 FPGA Site #2 Output #1 is connected to AOT #5 FPGA Site #2 Output #2 is connected to AOT #6 FPGA Site #2 Output #3 is connected to AOT #7 The 4 outputs from FPGA Site #8 are not connected to And-Or Term Inputs to the TFW. And-Or Terms 28:31 are the Missing Et Terms that come from the first 4 FMLN Comparator Outputs. The original "target" list of And-Or Terms shows that And-Or Term #27 is CET(e0) which is I believe either Calorimeter EM Et Global Threshold #0 or Calorimeter Total Et Global Threshold #0. In either case, for now, And-Or Term #27 will come from FPGA Site #7 output #3. First Pass List of Quadrant Term Signals to be generate by the Quadrant Term CTOM card. This list is a mix of: the original list of And-Or Terms that people thought that they wanted before Run IIA began, what Quadrant/Region Terms it is possible to make from just the CHTCR "Hint" output signals, what terms we want to commission - debug this facility. By definition the Quadrant Terms indicate "hits" in just the Central eta coverage of the Calorimeter. For now the Central eta coverate is Trigger Tower Eta Index 1:8 i.e. Calorimeter eta 0.0 trhough 1.6 If necessary, for the purpose of generating Quadrant Terns, the range included within Central eta can be reduced by working on the CHTCR cards. This would require work on 8 of the CHTCR cards. Original What we will make Quadrant Term And-Or in this first pass CTOM Card AOT Term List Description and FPGA Site & Output # Mnemonic MSA_Inputs to "OR" ------------------ --- ----------- ------------------------------ Site #1 Output #0 0 CEQ(1,q1) We will make this Quadrant #1 of EM Et Ref Set #0 MSA_Inputs: 0, 32, 64, 96 Site #1 Output #1 1 CEQ(1,q2) We will make this Quadrant #2 of EM Et Ref Set #0 MSA_Inputs: 8, 40, 72, 104 Site #1 Output #2 2 CEQ(1,q3) We will make this Quadrant #3 of EM Et Ref Set #0 MSA_Inputs: 16, 48, 80, 112 Site #1 Output #3 3 CEQ(1,q4) We will make this Quadrant #4 of EM Et Ref Set #0 MSA_Inputs: 24, 56, 88, 120 Site #2 Output #0 4 CEQ(2,q1) We will make this Quadrant #1 of EM Et Ref Set #1 MSA_Inputs: 1, 33, 65, 97 Site #2 Output #1 5 CEQ(2,q2) We will make this Quadrant #2 of EM Et Ref Set #1 MSA_Inputs: 9, 41, 73, 105 Site #2 Output #2 6 CEQ(2,q3) We will make this Quadrant #3 of EM Et Ref Set #1 MSA_Inputs: 17, 49, 81, 113 Site #2 Output #3 7 CEQ(2,q4) We will make this Quadrant #4 of EM Et Ref Set #1 MSA_Inputs: 25, 57, 89, 121 Site #3 Output #0 8 CJQ(q1) We will make this Quadrant #1 of Total Et Ref Set #0 MSA_Inputs: 4, 36, 68, 100 Site #3 Output #1 9 CJQ(q2) We will make this Quadrant #2 of Total Et Ref Set #0 MSA_Inputs: 12, 44, 76, 108 Site #3 Output #2 10 CJQ(q3) We will make this Quadrant #3 of Total Et Ref Set #0 MSA_Inputs: 20, 52, 84, 116 Site #3 Output #3 11 CJQ(q4) We will make this Quadrant #4 of Total Et Ref Set #0 MSA_Inputs: 28, 60, 92, 124 Site #4 Output #0 12 CER(1,Lo,S) We will make this Quadrant #1 of Total Et Ref Set #1 MSA_Inputs: 5, 37, 69, 101 Site #4 Output #1 13 CER(1,Lo,C) We will make this Quadrant #2 of Total Et Ref Set #1 MSA_Inputs: 13, 45, 77, 109 Site #4 Output #2 14 CER(1,Lo,N) We will make this Quadrant #3 of Total Et Ref Set #1 MSA_Inputs: 21, 53, 85, 117 Site #4 Output #3 15 CER(2,Lo,S) We will make this Quadrant #4 of Total Et Ref Set #1 MSA_Inputs: 29, 61, 93, 125 Site #5 Output #0 16 CER(1,Hi,C) We will make this Central Region of EM Et Ref Set #0 MSA_Inputs: 0, 32, 64, 96 8, 40, 72, 104 16, 48, 80, 112 24, 56, 88, 120 Site #5 Output #1 17 CER(1,Hi,N) We will make this Central Region of EM Et Ref Set #1 MSA_Inputs: 1, 33, 65, 97 9, 41, 73, 105 17, 49, 81, 113 25, 57, 89, 121 Site #5 Output #2 18 CER(2,Lo,S) We will make this Central Region of EM Et Ref Set #2 MSA_Inputs: 2, 34, 66, 98 10, 42, 74, 106 18, 50, 82, 114 26, 58, 90, 122 Site #5 Output #3 19 CER(2,Lo,C) We will make this Central Region of EM Et Ref Set #3 MSA_Inputs: 3, 35, 67, 99 11, 43, 75, 107 19, 51, 83, 115 27, 59, 91, 123 Site #6 Output #0 20 CER(2,Lo,N) We will make this Central Region of Total Et Ref Set #0 MSA_Inputs: 4, 36, 68, 100 12, 44, 76, 108 20, 52, 84, 116 28, 60, 92, 124 Site #6 Output #1 21 CJR(1,S) We will make this Central Region of Total Et Ref Set #1 MSA_Inputs: 5, 37, 69, 101 13, 45, 77, 109 21, 53, 85, 117 29, 61, 93, 125 Site #6 Output #2 22 CJR(1,C) We will make this Central Region of Total Et Ref Set #2 MSA_Inputs: 6, 38, 70, 102 14, 46, 78, 110 22, 54, 86, 118 30, 62, 94, 126 Site #6 Output #3 23 CET(1,N) We will make this Central Region of Total Et Ref Set #3 MSA_Inputs: 7, 39, 71, 103 15, 47, 79, 111 23, 55, 87, 119 31, 63, 95, 127 Site #7 Output #0 24 CJR(2,S) We will make this Quadrant #1 of EM Et Ref Set #2 MSA_Inputs: 2, 34, 66, 98 Site #7 Output #1 25 CJR(2,C) We will make this Quadrant #2 of EM Et Ref Set #2 MSA_Inputs: 10, 42, 74, 106 Site #7 Output #2 26 CJR(2,N) We will make this Quadrant #3 of EM Et Ref Set #2 MSA_Inputs: 18, 50, 82, 114 Site #7 Output #3 27 CET(e0) We will make this Quadrant #4 of EM Et Ref Set #2 MSA_Inputs: 26, 58, 90, 122 How to DeCode the original Quadrant/Region Term Mnemonics General term: CAL(n,e,q,eta) where: n: "count threshold" (number of objects to be counted and compared) e: threshold values in GeV (e0, e1,&) also: Lo, Hi: Low and High values for thresholds q: "quadrant" (phi sectors: q1, q2, q3,q4) eta: "region" (eta sectors: N,C,S) Timing and Control Signals for operation of the Quadrant Term CTOM Card P1_TS that were already in use in the M101 Middle backplane before work on the Quadrant Terms was started: Signals from the Carmen Master Clock Sequencer #1: Source Selector Carmen Master Clock FanOut Sequencer #1 Time Line Channel P1_TS -------------------------------- -------- ------- P_Clock 53 MHz PClk P1_TS_0 TL_3 Live Accel BX Marker 0 P1_TS_4 TL_2 Beginning of Turn Marker 1 P1_TS_3 TL_1 TRM Tick Clk 2 P1_TS_2 TL_0 Trig FW Tick Clk 3 P1_TS_1 Signals from the CT_Readout_Helper: Source CT_Read_Helper M101M Signal Function Front_PB P1_TS -------------------- ----------------------- -------- Trans_HSRO_Data MSA_Output_0 pins 1,2 P1_TS_8 Capture_HSRO_Data MSA_Output_1 pins 3,4 P1_TS_9 Capture_Monitor_Data MSA_Output_2 pins 5,6 P1_TS_10 Scaler_Reset MSA_Output_3 pins 7,8 P1_TS_15 Thus in the M101 Middle backplane the following P1_TS were not in use before the Quadrant Term work started: P1_TS_ 5, 6, 7, 11, 12, 13, 14 Recall which P1_TS can reach which HQ_Timing_Signals to the Main Array FPGA's when using a standard BSF FPGA: HQ_TS_0 to the Main Array can be either P1_TS_ 1, 2, 9, 10 HQ_TS_1 to the Main Array can be either P1_TS_ 3, 4, 11, 12 HQ_TS_2 to the Main Array can be either P1_TS_ 5, 6, 13, 14 HQ_TS_3 to the Main Array can be either P1_TS_ 7, 0, 15, 8 Timing & Control Signals needed by the CTOM Main Array FPGA: BX_Clock to cycles state engine and readout logic MSA_Input Latch MSA_Output Latch Scaler Reset Recall that: Capture HSRO Data, Transmit HSRO Data, and Capture Monitor Data are all carried on denticated BSF to Main Array traces and not on the 4 HQ_TS BSF to Main Array traces. The following 2 new Timing & Control signals were added to those generated by Sequencer #2 and these 2 new Timing & Control signals are now distribute on the M101 Middle crate P1 backplane: Can Be Master Clock M101 Middle Enters M101 Distributed Used by Sequencer #2 P1 Backplane Middle Crate to Main Array CTOM Time Line Timing Signal on TOM_PB on HQ_TS_ as ------------ ------------- ------------- ------------- ------- CMC_TL_16 P1_TS_6 J3 pins 11&12 HQ_TS_2 In_Clk CMC_TL_17 P1_TS_12 J4 pins 15&16 HQ_TS_1 Out_Clk Thus the CTOM needs its BSF setup to route the following P1 Backplane Timing and Control signals to the Main Array via HQ_TS_: Distribute Routed to on M101 Mid Main Array Source P1 Backplane HQ_TS_ Function - Name ------------- ------------ ---------- ------------------------- Seq #1 TL_0 P1_TS_1 HQ_TS_0 Trig FW Tick Clk BX_Clk Seq #2 TL_16 P1_TS_6 HQ_TS_2 CTOM Input Register Clk Seq #2 TL_17 P1_TS_12 HQ_TS_1 CTOM Output Register Clk CT_Readout_Helper MSA_Output_3 P1_TS_15 HQ_TS_3 Scaler Reset Scaler_Reset Setting up this mapping of P1_TS's to HQ_TS's requires writting the value $2130 to Register Address 16 in the BSF FPGA site number 17. Check Timing of M101 Middle CTOM Clock Signals This measurement was based on the setup of the CMC Sequencer #2 that existed on 18-DEC-2003. Based on that measurement it was decided to move the CTOM Input Clock and the CTOM Output Clock both one RF Bucket later. Measure the M101 Mid P1_TS_6 CTOM Input Clk which comes from CMC TL 16 Measure the M101 Mid P1_TS_12 CTOM Output Clk which comes from CMC TL 17 against Upper Tier 1 Energy CAT2 Clk CTMBD Backplane T&SS "P" which comes from CMC TL 7 M101 Mid P1_TS_6 is 85 nsec in front of Upper Tier 1 CTMBD Backplane T&SS "P" M101 Mid P1_TS_12 is 217 nsec in front of Upper Tier 1 CTMBD Backplane T&SS "P" If all the cable and fanout delays were exactly the same then I would expect M101 Mid P1_TS_6 to be 18.8 nsec in front of Tier 1 CTMBD Backplane T&SS "P" (because CMC TL 16 is currently generated one RF bucket earlier in the CMC than CMC TL 7 this is the CMC Sequencer #2 setup that existed on 18-DEC-2003). So the cable and fanout delay to the Tier 1 crates is about 65 nsec longer than the cable and fanout delay to M101 Mid. This is about what you would expect. There are 20 sections of twist and flat and a BBB card in the path to the Tier 1 crate. The intent is to Run Tier 3 about 12 nsec in front of Upper Tier 1. It is currently running about 20 nsec in front of Tier 1. So after the intent is implemented, I would expect the T&SS delay to Tier 3 to be about 53 nec longer than the T&SS delay to M101 Mid backplane P1_TS_x. Recall that once the P1_TS reaches a THE-Card in M101 Mid then the signal will be delayed between 1 and 2 ticks of RF by the BSF FPGA, i.e. it will be delayed between 18.8 nsec and 37.6 nsec. Call the delay in the BSF FPGA's on the M101 Mid CTOM's 30 nsec. It is about 2 1/2 sections of cable from the Tier 3 outputs to the Cal Trig And-Or Term patch panel where as it is about 15 sections of cable from the M101 Mid CTOM cards to the Cal Trig And-Or Term patch panel. So it takes the outputs from the M101 Mid CTOM's about 35 nsec longer to reach the And-Or Term Patch Panel than it does the outpus from the Tier 3 CAT cards. On the other hand from the time a Tier 3 CAT card gets its input clock until its outputs are stable is about 35 nsec (see: ww.pa.msu.edu/hep/d0/ftp/run1/l1/caltrig/cards/ cat2_rev_b_description.txt and fmln_rev_a_description.txt). Where as the delay from the CTOM receiving its output clock until its outputs are available is 5 nsec (or less). So the Tier 3 signals are about 30 nsec behind. Summary: P1_TS's are delayed in M101 Mid CTOM BSF's by 30 nsec. And-Or Terms from M101 Mid CTOM's are delayed by 35 nsec on cable to the Cal Trig AOT patch panel relative to the Tier 3 And-Or Terms. Tier 3 has 30 nsec more logic propigation delay relative to the M101 Mid CTOM signals. So the M101 Mid CTOM needs to receive its P1_TS_x about 35 nsec in front of Tier 3 receiving its T&SS. But the delay from CMC to M101 Mid P1_TS_x is 53 nsec less than the delay from CMC to Tier 3 T&SS. So the T&SS should be sent from the CMC to M101 Mid about 18 nsec later than it is sent to Tier 3. Thus the CMC Sequencer #2 Time Lines will be edited so that the CTOM Output Clock will be generated 1 RF Bucket after the Tier 3 CAT Input Clock. The CTOM Input Clock will also be moved 1 RF Bucket later. After this move, the CTOM Input Clock will (by chance) have the same timing as the Tier 1 Energy Adder Tree Clock. The timing at the CTOM Input is very relaxed. There is about 340 nsec for the CHTCR to process its input signals and get them to the CTOM. The timing on the CTOM is very relaxed. There is about 264 nsec for the CTOM to process its input signals and have the results setup at the output latch. General ideas for a CTOM: Need two D-Latches of delay. This is to make the Fall 2003 Quadrant Terms have the same timing as the Count Comparators and Missing Et AOIT signals. Need an input latch. Want an output latch to hand off the And-Or Term outputs. Need to clock the input and output latches from accessable P1_TS's. Want registers to readback the input signals (and the output signals ?) These registers should be updated by the L1 Cal Trig CMD signal. An alternative is to use 4x Miguel to readout the MSA_Input signals. Must us the standard AONM core logic block and programming registers. It is easy to add an HSRO block - all of the Timing & Control needed for this are available in the M101 Middle. This begins to make the CTOM almost a CTRO card. Connection of CHCTR Card "Hint" Signals to the Quadrant Term CTOM Card MSA_Inputs is as follows: Each CHTCR makes 8 "Hint" signals. On the CHTCR these are numbered CHTCR Channels 1:8. The mapping of CHTCR Channels to Reference Sets is the following: CHTCR Channel #1 is EM Ref Set #0 CHTCR Channel #2 is EM Ref Set #1 CHTCR Channel #3 is EM Ref Set #2 CHTCR Channel #4 is EM Ref Set #3 CHTCR Channel #5 is HD Ref Set #0 CHTCR Channel #6 is HD Ref Set #1 CHTCR Channel #7 is HD Ref Set #2 CHTCR Channel #8 is HD Ref Set #3 The 8 "Hint" signals from a CHTCR card are connected to 8 consecutive MSA_Input signals on the CTOM. The connection of a given CHTCR to the CTOM is the following: CHTCR Channel #1 (EM Ref Set #0) connects to CTOM MSA_Input N CHTCR Channel #2 (EM Ref Set #1) connects to CTOM MSA_Input N+1 CHTCR Channel #3 (EM Ref Set #2) connects to CTOM MSA_Input N+2 CHTCR Channel #4 (EM Ref Set #3) connects to CTOM MSA_Input N+3 CHTCR Channel #5 (HD Ref Set #0) connects to CTOM MSA_Input N+4 CHTCR Channel #6 (HD Ref Set #1) connects to CTOM MSA_Input N+5 CHTCR Channel #7 (HD Ref Set #2) connects to CTOM MSA_Input N+6 CHTCR Channel #8 (HD Ref Set #3) connects to CTOM MSA_Input N+7 where "N" is: 0 or 8 or 16 or 24 ... Each CHCTR Card covers 4 TT's in eta by 8 TT's in phi. So the full mapping of CHTCR cards to the CTOM MSA_Inputs is the following: Quadrant Term CHTCR Card Coverage and Location CTOM Inputs ---------------------------------------- ---------------- CHTCR for eta +1:+4 phi 1:8 M103 Top MSA_Inputs 0:7 CHTCR for eta +1:+4 phi 9:16 M103 MSA_Inputs 8:15 CHTCR for eta +1:+4 phi 17:24 M103 MSA_Inputs 16:23 CHTCR for eta +1:+4 phi 25:32 M103 Bot MSA_Inputs 24:31 CHTCR for eta -1:-4 phi 1:8 M104 Top MSA_Inputs 32:39 CHTCR for eta -1:-4 phi 9:16 M104 MSA_Inputs 40:47 CHTCR for eta -1:-4 phi 17:24 M104 MSA_Inputs 48:55 CHTCR for eta -1:-4 phi 25:32 M104 Bot MSA_Inputs 56:63 CHTCR for eta +5:+8 phi 1:8 M105 Top MSA_Inputs 64:71 CHTCR for eta +5:+8 phi 9:16 M105 MSA_Inputs 72:79 CHTCR for eta +5:+8 phi 17:24 M105 MSA_Inputs 80:87 CHTCR for eta +5:+8 phi 25:32 M105 Bot MSA_Inputs 88:95 CHTCR for eta -5:-8 phi 1:8 M106 Top MSA_Inputs 96:103 CHTCR for eta -5:-8 phi 9:16 M106 MSA_Inputs 104:111 CHTCR for eta -5:-8 phi 17:24 M106 MSA_Inputs 112:119 CHTCR for eta -5:-8 phi 25:32 M106 Bot MSA_Inputs 120:127 The following are lists of typical "OR's" that one may want to make with the Quadrant Term CTOM Card: Quadrant Term "OR's" that include both North and South: eta 1:4 eta 5:8 -------- -------- Pos Neg Pos Neg --- --- --- --- Quadrant 1 of EM Ref Set 0 "OR" MSA_Inputs: 0, 32, 64, 96 Quadrand 2 of EM Ref Set 0 "OR" MSA_Inputs: 8, 40, 72, 104 Quadrand 3 of EM Ref Set 0 "OR" MSA_Inputs: 16, 48, 80, 112 Quadrand 4 of EM Ref Set 0 "OR" MSA_Inputs: 24, 56, 88, 120 Quadrant 1 of EM Ref Set 1 "OR" MSA_Inputs: 1, 33, 65, 97 Quadrand 2 of EM Ref Set 1 "OR" MSA_Inputs: 9, 41, 73, 105 Quadrand 3 of EM Ref Set 1 "OR" MSA_Inputs: 17, 49, 81, 113 Quadrand 4 of EM Ref Set 1 "OR" MSA_Inputs: 25, 57, 89, 121 Quadrant 1 of EM Ref Set 2 "OR" MSA_Inputs: 2, 34, 66, 98 Quadrand 2 of EM Ref Set 2 "OR" MSA_Inputs: 10, 42, 74, 106 Quadrand 3 of EM Ref Set 2 "OR" MSA_Inputs: 18, 50, 82, 114 Quadrand 4 of EM Ref Set 2 "OR" MSA_Inputs: 26, 58, 90, 122 Quadrant 1 of EM Ref Set 3 "OR" MSA_Inputs: 3, 35, 67, 99 Quadrand 2 of EM Ref Set 3 "OR" MSA_Inputs: 11, 43, 75, 107 Quadrand 3 of EM Ref Set 3 "OR" MSA_Inputs: 19, 51, 83, 115 Quadrand 4 of EM Ref Set 3 "OR" MSA_Inputs: 27, 59, 91, 123 Quadrant 1 of Tot Ref Set 0 "OR" MSA_Inputs: 4, 36, 68, 100 Quadrand 2 of Tot Ref Set 0 "OR" MSA_Inputs: 12, 44, 76, 108 Quadrand 3 of Tot Ref Set 0 "OR" MSA_Inputs: 20, 52, 84, 116 Quadrand 4 of Tot Ref Set 0 "OR" MSA_Inputs: 28, 60, 92, 124 Quadrant 1 of Tot Ref Set 1 "OR" MSA_Inputs: 5, 37, 69, 101 Quadrand 2 of Tot Ref Set 1 "OR" MSA_Inputs: 13, 45, 77, 109 Quadrand 3 of Tot Ref Set 1 "OR" MSA_Inputs: 21, 53, 85, 117 Quadrand 4 of Tot Ref Set 1 "OR" MSA_Inputs: 29, 61, 93, 125 Quadrant 1 of Tot Ref Set 2 "OR" MSA_Inputs: 6, 38, 70, 102 Quadrand 2 of Tot Ref Set 2 "OR" MSA_Inputs: 14, 46, 78, 110 Quadrand 3 of Tot Ref Set 2 "OR" MSA_Inputs: 22, 54, 86, 118 Quadrand 4 of Tot Ref Set 2 "OR" MSA_Inputs: 30, 62, 94, 126 Quadrant 1 of Tot Ref Set 3 "OR" MSA_Inputs: 7, 39, 71, 103 Quadrand 2 of Tot Ref Set 3 "OR" MSA_Inputs: 15, 47, 79, 111 Quadrand 3 of Tot Ref Set 3 "OR" MSA_Inputs: 23, 55, 87, 119 Quadrand 4 of Tot Ref Set 3 "OR" MSA_Inputs: 31, 63, 95, 127 Region Term "OR's" that include both North and South: eta 1:4 eta 5:8 -------- -------- Pos Neg Pos Neg --- --- --- --- CC Region of EM Ref Set 0 "OR" MSA_Inputs: 0, 32, 64, 96 8, 40, 72, 104 16, 48, 80, 112 24, 56, 88, 120 CC Region of EM Ref Set 1 "OR" MSA_Inputs: 1, 33, 65, 97 9, 41, 73, 105 17, 49, 81, 113 25, 57, 89, 121 CC Region of EM Ref Set 2 "OR" MSA_Inputs: 2, 34, 66, 98 10, 42, 74, 106 18, 50, 82, 114 26, 58, 90, 122 CC Region of EM Ref Set 3 "OR" MSA_Inputs: 3, 35, 67, 99 11, 43, 75, 107 19, 51, 83, 115 27, 59, 91, 123 CC Region of Tot Ref Set 0 "OR" MSA_Inputs: 4, 36, 68, 100 12, 44, 76, 108 20, 52, 84, 116 28, 60, 92, 124 CC Region of Tot Ref Set 1 "OR" MSA_Inputs: 5, 37, 69, 101 13, 45, 77, 109 21, 53, 85, 117 29, 61, 93, 125 CC Region of Tot Ref Set 2 "OR" MSA_Inputs: 6, 38, 70, 102 14, 46, 78, 110 22, 54, 86, 118 30, 62, 94, 126 CC Region of Tot Ref Set 3 "OR" MSA_Inputs: 7, 39, 71, 103 15, 47, 79, 111 23, 55, 87, 119 31, 63, 95, 127