Current Remaining "Jobs List" for the Run II Trigger Framework ------------------------------------------------------------------ Original Ver. 20-MAR-2000 Current Ver. 22-MAR-2000 Make a Global List and organize into piles and what needs to get done first or what is waiting on what or who can attack what or what is here vs Fermi. 1. Design a method for monitoring L2 Busy: Use scalers in the unused FPGA site on the L2-BAD AONM to monitor Geo Section L2 Busy "AND" L2 Acpt going to it ? Bring in by P5 a signal that says we are actually wanting to distribute an L2 Decision right now and use this as a third term in each "AND" above ?. Use a scaler on the L2 Helper that count the ticks over all that you are actually waiting to distribute an L2 Decision because some Geo Section is L2 Busy and an L2 Accept aimed at it ? 2. Scaler to keep track of the number of L1 Accepts awaiting L2 Decisions. Baby version to get going and then fancy histogram version ? Comparators to make And-Or Input Terms ? 3. Understand and then Connect the L1 FW Non Per Bunch scalers and the Diagnostic scalers. 4. How to handle TRM FIFO Errors: L1 And-Or Input FIFO's, L1 FW Data to L2 FW FIFO, L2 Global Data to L2 FW FIFO. System, Hardware, & Software issues. 5. How to handle Geo Section Reporting SCL L1 or L2 Error System, Hardware, & Software issues. 6. Luminosity Index: System, Hardware, & Software issues. What hardware should hold Luminosity Index data that TCC writes into it and then HSRO's on each L1 Accept. Long term, who holds the Luminosity Index Number. Is there any other "fixed" data that TCC is going to need to write into something so that it can be read out with each event. 7. HSRO: The 967 Document. Is Kirsten willing to push this. What other documents do we need to prepare in order to do this in an organized maintainable way. Learn about - Understand the VRB Controller. Learn about - Understand the VRB (It will have the "8 bit" data order at its VME output and some kind of 24 bit "in band" event separator at its G-Link input). Install crate and its power supply. (part of operating permit) Purchase fiber optics (and splitters ?) Common purchase with L1 Cal Trig and/or others ? Routing of the fiber optics to the G-Link Transition modules is understood already because it is part of the overall M124 plan. Install these fiber optic cables in M123, M124. Is it really true that all HSRO data comes from M123 (and nothing from M122) ? How to get started at Fermi. Need to have software learn about a bunch of new modules. Method to test: WithOut L3, All TCC based ? TCC reads Mon data and VRB data ? We need a design for this testing. What all in this data path will be tested. 8. Default Trigger Hardware, COOR Programming, TCC setup System, TCC, and Hardware issues Providing data to Trig Mon? "Heart Beat" trigger ? I.E. what does the system look like after: Power Up, TCC Boot, Auto-Start Trics, FPGA Config, & FW Init. This was a very defined state in Run I. Recall that in Run I after a TCC Boot that we had an atomic: TRICS auto-start and a FW Init then the system was turned over to COOR. 9. FW Data to L2 Global (or is it to all L2 processor crates) Currently thought to be the Mask of L1 Triggers Fired and the L1 Trigger Number. L2 can accept by either by HSRO Fiber Split of AMCC Serial Link. 10. Bulk Scalers for L2 (and for others ?) This is monitor readout only. Is there anything that we want in the "Linnemann Paddle Board" (assuming that there is such a thing at our end) to help us easily handout blocks of scalers to other systems besides L2. E.G. a set of pads to mound normal 0.1x0.1 connectors. 11. Who understands "event numbers" ? Can we widen the L3 Transfer Number that we send to L3 on the Control Path and get out from EVER having to think about adding data to the FW Data Block after the L2 Decision ? Could one widen the L3 Transfer Number in the "FM D-Latch" that sends it to L3. We have many usec to increment the upper address bits. 12. Project to replace the Board Support FPGA's on 30 Build A AONM's plus 2 other FPGA replacements on other boards. 13. Master Clock Work List: Get and then Keep the "Clock File" up to date so we are ready to switch over to using it instead of the "C" program. Do something to get the "L1 Cal Trig" Sequencer wired to something and in use. Re-Work the Master Clock feed to the 3 Helper Functions to remove the 27 Selector Fanout Modules. 14. Get documents and drawings up to date: L2 FW Timing Diagram Skews in Clocks, Time Zone timing diagram L2 FW control signal block diagram Single Signal document More of the "How is it actually setup and used at Fermi" type documentation examples are ... 15. Get the water and radiators connected and the drip detectors connected to the RMI and tested. 16. Connect the VESDA to the Run II Framework 17. Generate the Safety Documentation and get the Operating Permit for the FW. This includes the Safety System documentation and Testing the Safety System. 18. SCL Installation: Move the SCL Hub-End to the top crate in M124, DC Power Cables, change Vertical Interconnect "address" Install the last of the L1 Accept, L1 Busy, L2 Reject, and L2 Busy cables. Make and install the cable tray from M124 to the ceiling and for 2nd floor to its ceiling. Install the SCL to Geographic Section Cables. Install the SCL Serial cables out to the platform. There is a software - organizational issue here ! Re-Work the two 32 pair cables that carry the common data for all the Geo Sections that go the the Hub Controller Module. This needs to include some way to "murge in" signals from that originate from a number of locations in the FW. Make and install the cables that carry the L1 Accept Qualifiers and the L3 Transfer Number to the SCL FanOut Modules. 19. Get some way of knowing, from inside the MCH, when L1 Accepts and L2 Decisions are issued. 20. Clean up the cabling mess on the Control Path going to / coming from L3. Widen the path to the full 128 Spec Triggers. Software Items: 1. L1 SCT modify for Skip-Next include Miguel include Per-Bunch Scalers, non per bunch scalers, diagnostic scalers 2. L2 SCT Is it now fully understood what this will be ? 3. HSRO Tests at Fermi 4. Control of the HSRO crate for the FW (same for the L1 Cal Trig ?) 5. Trig-Mon Do we know everything that we need to know and who is doing what and does he know everything that we want ? 6. Handle Interrupts Become master of the SCL Initialize Sequence Record TRM FIFO Sync errors for ALL applications of TRM FIFO's. When else might the hardware want/need to tap TCC on the shoulder. 7. Generate ALARM - ERROR Messages to the error warning distribution and logging system Do we want TCC to "phone home" with things are in trouble. 8. What happens at power up and boot and FW Init. See point 11 in the above list. What does TCC need to know to declare the FW healthy and ready to turn over to COOR. 9. Do we needs "states" e.g. Right now it matters so advertise errors vs right now is debug time Right now the most important thing is to resume data taking vs right now if you find an error then freeze everything so people can debug. 10. Luminosity Serving Logging Luminosity Blocks Event Number stuff 11. How to decide when / if 2 TCC's is best way to implement everything ? 12. L1 Cal Trig Syntax for COOR control of the L1 Cal Trig. 967 document about the readout from the L1 Cal Trig. 13. Decision, for then next "N" months should we support buttons or push people now to COOR and TAKER Talk with Stu & Jae 14. C++ object stuff to extract information from the Trig FW Data Block. There are a number of views of this. Are you extracting information from the packed or unpacked version of the L1 Trig FW Data Block. 15. More COOR to TCC commands for the Trig FW. Need to add to the definition of the default properties of Spec Trig's setup by COOR, e.g. they obey L3 Disables.