DATE: 30-SEPT-1998 TO: Manufacture of HSROCB Circuit Boards FROM: Dan Edmunds and Steve Gross Physics Department Michigan State University East Lansing, MI 48824-1116 Phone: (517) 355-8525 Email Edmunds@pa.msu.edu FAX: (517) 355-6661 RE: Manufacture of HSROCB Printed Circuit Boards Michigan State University Purchase Order Number ?? ------------------------------------ --- Good for Proto-Type ONLY --- ------------------------------------ This note covers the manufacture of the HSROCB printed circuit board. This circuit board is rectangular 2.000" x 3.750" and is a 4 layer board with the two outer layers being traces and the two inner layers being planes. Features of the HSROCB Circuit Boards --------------------------------------- Number of Cards to Build: Initial fast proto-type run of 4 cards, followed by a production run of 80 cards. Circuit Board Material: G10 (FR4) Overall Circuit Board Thickness: nominal thickness of 0.062 inch Circuit Board Size: rectangular 2.000" x 3.750" Note that the board outline, as indicated by the center of the line drawn in the Test Plot, indicates the real finished board size. Layers: 4: 2 external signal trace layers 2 internal plane layers Copper thickness: 1 oz copper to be used on all layers Solder Mask: BOTH SIDES Different solder masks are used on the component and solder sides. Use a Liquid Photo Imagable solder mask. Solder plating: Only the area of copper NOT covered by the solder mask should be solder plated. (i.e. Solder Mask over Bare Copper). Silk Screen: Both the Component Side and the Solder Side have Silk Screens Delivery Schedule: 4 proto-type boards on a "fast" i.e. order of 2 week turn around. Production order of 80 cards on a 4 to 6 week turn around. Details to be determined. Holes: There are 3 different hole sizes. These are FINISHED hole sizes. ALL of the 13 mil and 22 mil holes are PLATED. NONE of the 135 mil holes are plated. Hole Count ------------------------ FINISHED T Num of Hole Size Code Holes --------- ---- -------- 13 mil 1 89 Plated 22 mil 2 77 Plated 135 mil 3 4 NOT Plated Gerber File vs Board Layer ---------------------------------------------- File Name Contents Location in Board Stack -------------- ---------------------------- ------------------------ ArtWork_01.Grb Test plot of board outline ArtWork_02.Grb Component side Traces & Pads Component Side ArtWork_03.Grb Ground Plane Internal Ground Plane ArtWork_04.Grb Power Plane Internal Power Plane ArtWork_05.Grb Solder side Traces Solder Side ArtWork_06.Grb Component side Silkscreen On the Component Side ArtWork_07.Grb Solder side Silkscreen On the Solder Side ArtWork_08.Grb Solder Mask Component Side On the Component Side ArtWork_09.Grb Solder Mask Solder Side On the Solder Side The Ground Plane layer, i.e. file #3 and the Power Plane, i.e. file #4 are supplied as negative data. These plane layers are mostly a copper plane and covers almost the entire area of the board. The Solder Mask, i.e. files 8, and 9 are is also supplied as negative data. All of the 33 mil via's are completely covered by solder mask. All other files are positive data. Aperture Table ----------------------------------------------------- Aperture Table used for all plots EXCEPT for the two Solder Masks ----------------------------------======------------------------- Thermal D-Code Shape Type Diameter Width(X) Height(Y ) Relief ------ --------- ----- -------- -------- -------- - ------- 10 circle trace 0.010 - 11 circle trace 0.035 - 12 circle trace 0.012 - 13 circle trace 0.006 - 14 circle flash 0.033 - 15 oval flash 0.035 0.045 - 16 rectangle flash 0.063 0.063 - 17 rectangle flash 0.079 0.017 - 18 rectangle flash 0.017 0.079 - 19 rectangle flash 0.126 0.070 - 70 circle flash 0.057 - 71 circle flash 0.057 YES 20 oval flash 0.045 0.060 YES 21 oval flash 0.045 0.060 - 22 circle trace 0.050 - 23 circle trace 0.025 - 24 rectangle flash 0.080 0.025 - "D" Code 71 is a Circular Thermal Relief Aperture This thermal relief consists of a 0.033" diameter inner pad followed by a 0.012" wide air gap around this pad. This makes the full outer diameter 0.057". The air gap is crossed by 4 copper ties. Each tie is 0.012" wide. The ties run on the X and Y axis. "D" Code 20 is an OVAL Thermal Relief Aperture This thermal relief consists of a 0.035" x 0.050" oval inner pad followed by a 0.005" wide air gap around this pad. This makes the full outer oval shape 0.045" x 0.060". The air gap is crossed by 4 copper ties. Each tie is 0.012" wide. The ties run at 45 degrees to the X and Y axis. Aperture Table used ONLY for the two Solder Masks --------------------====-------------============ D-Code Shape Type Diameter Width(X) Height(Y ) ------ --------- ----- -------- -------- -------- - 10 circle trace 0.010 13 circle trace 0.009 15 oval flash 0.040 0.050 16 rectangle flash 0.068 0.068 17 rectangle flash 0.084 0.022 18 rectangle flash 0.022 0.084 19 rectangle flash 0.131 0.075 24 rectangle flash 0.085 0.030 Circuit Board Cross Section --------------------------- The following sketch shows the stack up to be used for the HSROCB circuit board. Nominal thickness of the dielectric layers is shown. Cross Section of the Circuit Board ------------------------------------- - Silkscreen Comp Side - Solder Mask Comp Side -------------------- - Component Side Trace Layer +------------------------+ | Dielectric | | 20 mil | +------------------------+ -------------------- - Internal Ground Plane Layer +------------------------+ | Dielectric | | 20 mil | +------------------------+ -------------------- - Internal Power Plane Layer +------------------------+ | Dielectric | | 20 mil | +------------------------+ -------------------- - Solder Side Trace Layer -Solder Mask Solder Side - Silkscreen Solder Side NOTE: The actual Dielectric thicknesses used between the various layers on the HSROCB circuit board is yet to be determined. ASSEMBLY OF THE BOARD Order of the Layers: --------------------------------------------- Component Side Silk Screen File Number 6 Component Side Solder Mask File Number 8 Layer 1: Component Side traces and pads File Number 2 Layer 3: Ground Plane File Number 3 Layer 3: Power Plane File Number 4 Layer 5: Solder Side traces File Number 5 Solder Side Solder Mask File Number 9 Component Side Silk Screen File Number 7 If there are any questions or suggestions about the production of these circuit boards please contact: Dan Edmunds Physics Department Michigan State University East Lansing, MI 48824-1116 Phone: (517) 355-8525 Email Edmunds@pa.msu.edu FAX: (517) 355-6661 The check copies of the photoplots should be SHIPPED to: Daniel Edmunds 211 Physics/Astronomy Building Michigan State University East Lansing, MI 48824-1116 This order should be BILLED to: Accounts Payable 366 Administration Building Michigan State University East Lansing, MI 48824 This is Michigan State University Purchase Order Number: ??