// VME Interface FPGA User Constraint File // Most Recent Revision: 22 Oct 1998 // This file is appropriate for all VME Interface FPGA flavors, however // several edits need to be made. All changes are collected in this // section, simply uncomment the appropriate section below // The flavors of VME Interface FPGA are: // # "L-to-L": for all cards with 4013L VME FPGA and 4013L // # MSA/BSF FPGAs (all FM's, all AONM/FOM except // # for FOM++) // # // NET OCB_Write_Strobe_PAD* FAST; // NET OCB_Write_Strobe_PAD* LOC = "P174" ; // # "L-to-XL": for all cards with 4013L VME FPGA and 4028XL // # MSA/BSF FPGAs (all TRM's, and most SM's) // # // NET OCB_Write_Strobe_PAD* SLOW; // NET OCB_Write_Strobe_PAD* LOC = "P165" ; // # "XL-to-XL": for all cards with 4013XL VME FPGA and 4028XL // # or 4013XL MSA/BSF FPGA's (all TDM's and two SM's // # built with the TDM's) // # // NET OCB_Write_Strobe_PAD* FAST; // NET OCB_Write_Strobe_PAD* LOC = "P165" ; // Performance related constraints // The main clock for this design is the 53 MHz clock, divided by // 4 to make a 13.25 MHz clock (period = 75.5 ns). NET "53%4_MHz_Clock" PERIOD = 75.5 ns; // Additional constraints to cover the OCB. Each state in the state // engine lasts for 75 ns. // Reading. The request must propagate from the VME interface FPGA to the // PBS FPGA (estimate 25 ns), and the data must propagate back to the VME // interface FPGA (estimate 25 ns). // This leaves 100 ns for the data to be retrieved and put on to the OCB. NET OCB_Direction TNM = Direct_Net ; TIMEGRP Data_Out_Pads = PADS ( Data_PAD* ) ; // Only consider the paths through the register address decoder. NET Read_Reg* TPTHRU = Read_Reg ; TIMESPEC TS_Direct_In_to_Data_Out = FROM Direct_Net THRU Read_Reg TO Data_Out_Pads 100 ns ; // Pinout related preferences // The following two pinout preferences are new 29 Sept 1997 NET "Board_Select_LED_PAD*" LOC = "P188" ; NET "Configure_Error_PAD*" LOC = "P189" ; // The following pinout preference is new 18 May 1998 NET "Internal_Interrupt_Request_PAD" LOC = "P187" ; // End new pinout preferences NET "VME_SYSRESET_PAD*" LOC = "P2" ; NET "VME_AM_PAD(0)" LOC = "P3" ; NET "VME_A_PAD(22)" LOC = "P4" ; NET "VME_AM_PAD(5)" LOC = "P5" ; NET "VME_A_PAD(23)" LOC = "P6" ; NET "VME_LWORD_PAD*" LOC = "P7" ; NET "VME_WRITE_PAD*" LOC = "P8" ; NET "VME_DS_PAD*(0)" LOC = "P9" ; NET "VME_DS_PAD*(1)" LOC = "P10" ; NET "Data_PAD(1)" LOC = "P11" ; NET "Data_PAD(2)" LOC = "P12" ; NET "Data_PAD(4)" LOC = "P13" ; NET "Data_PAD(11)" LOC = "P15" ; NET "Data_PAD(13)" LOC = "P16" ; NET "Data_PAD(5)" LOC = "P17" ; NET "Data_PAD(7)" LOC = "P18" ; NET "Data_PAD(15)" LOC = "P20" ; NET "Data_PAD(8)" LOC = "P21" ; NET "Data_PAD(0)" LOC = "P23" ; NET "Data_PAD(9)" LOC = "P24" ; NET "Data_PAD(3)" LOC = "P25" ; NET "Data_PAD(10)" LOC = "P26" ; NET "Data_PAD(12)" LOC = "P27" ; NET "Data_PAD(14)" LOC = "P28" ; NET "Data_PAD(6)" LOC = "P31" ; NET "F245_OE_PAD*" LOC = "P32" ; NET "OCB_Direction_PAD" LOC = "P33" ; NET "Board_Species_PAD(4)" LOC = "P34" ; NET "Board_Species_PAD(6)" LOC = "P35" ; NET "Board_Species_PAD(0)" LOC = "P36" ; NET "Board_Species_PAD(2)" LOC = "P38" ; NET "Board_Species_PAD(7)" LOC = "P39" ; NET "Board_Species_PAD(5)" LOC = "P41" ; NET "Board_Species_PAD(3)" LOC = "P42" ; NET "Board_Species_PAD(1)" LOC = "P43" ; NET "Card_Addr_PAD(4)" LOC = "P44" ; NET "Card_Addr_PAD(0)" LOC = "P46" ; NET "Card_Addr_PAD(2)" LOC = "P47" ; NET "Card_Addr_PAD(5)" LOC = "P48" ; NET "Card_Addr_PAD(3)" LOC = "P49" ; NET "Card_Addr_PAD(1)" LOC = "P50" ; NET "53_MHz_Clock_In_PAD" LOC = "P51" ; NET "53%4_MHz_Clock_Out_PAD" LOC = "P52" ; NET "JTAG_Controller_Enable_PAD" LOC = "P53" ; NET "JTAG_Test_Logic_Activate_PAD" LOC = "P54" ; NET "JTAG_RDY_PAD*" LOC = "P55" ; NET "Chip_Status_PAD*(18)" LOC = "P56" ; NET "JTAG_WR_PAD*" LOC = "P57" ; NET "JTAG_RD_PAD*" LOC = "P63" ; NET "Config_Chip_PAD*(17)" LOC = "P64" ; NET "Chip_Configed_PAD(17)" LOC = "P65" ; NET "Chip_Status_PAD*(17)" LOC = "P66" ; NET "OCB_Chip_Sel_PAD*(17)" LOC = "P67" ; NET "Config_Chip_PAD*(1)" LOC = "P69" ; NET "Chip_Configed_PAD(1)" LOC = "P70" ; NET "Chip_Status_PAD*(1)" LOC = "P71" ; NET "OCB_Chip_Sel_PAD*(1)" LOC = "P72" ; NET "Config_Chip_PAD*(2)" LOC = "P73" ; NET "Chip_Configed_PAD(2)" LOC = "P74" ; NET "Chip_Status_PAD*(2)" LOC = "P76" ; NET "OCB_Chip_Sel_PAD*(2)" LOC = "P77" ; NET "Config_Chip_PAD*(3)" LOC = "P78" ; NET "Chip_Configed_PAD(3)" LOC = "P79" ; NET "Chip_Status_PAD*(3)" LOC = "P81" ; NET "OCB_Chip_Sel_PAD*(3)" LOC = "P82" ; NET "Config_Chip_PAD*(4)" LOC = "P84" ; NET "Chip_Configed_PAD(4)" LOC = "P85" ; NET "Chip_Status_PAD*(4)" LOC = "P86" ; NET "OCB_Chip_Sel_PAD*(4)" LOC = "P87" ; NET "Config_Chip_PAD*(5)" LOC = "P88" ; NET "Chip_Configed_PAD(5)" LOC = "P92" ; NET "Chip_Status_PAD*(5)" LOC = "P93" ; NET "OCB_Chip_Sel_PAD*(5)" LOC = "P94" ; NET "Config_Chip_PAD*(6)" LOC = "P95" ; NET "Chip_Configed_PAD(6)" LOC = "P96" ; NET "Chip_Status_PAD*(6)" LOC = "P97" ; NET "OCB_Chip_Sel_PAD*(6)" LOC = "P99" ; NET "Config_Chip_PAD*(7)" LOC = "P100" ; NET "Chip_Configed_PAD(7)" LOC = "P102" ; NET "Chip_Status_PAD*(7)" LOC = "P103" ; NET "OCB_Chip_Sel_PAD*(7)" LOC = "P104" ; NET "Config_Chip_PAD*(8)" LOC = "P105" ; NET "Chip_Configed_PAD(8)" LOC = "P107" ; NET "Chip_Status_PAD*(8)" LOC = "P108" ; NET "OCB_Chip_Sel_PAD*(8)" LOC = "P109" ; NET "Config_Chip_PAD*(9)" LOC = "P110" ; NET "Chip_Configed_PAD(9)" LOC = "P111" ; NET "Chip_Status_PAD*(9)" LOC = "P112" ; NET "OCB_Chip_Sel_PAD*(9)" LOC = "P113" ; NET "Config_Chip_PAD*(10)" LOC = "P114" ; NET "Chip_Configed_PAD(10)" LOC = "P115" ; NET "Chip_Status_PAD*(10)" LOC = "P116" ; NET "OCB_Chip_Sel_PAD*(10)" LOC = "P117" ; NET "Config_Chip_PAD*(11)" LOC = "P118" ; NET "Chip_Configed_PAD(11)" LOC = "P123" ; NET "Chip_Status_PAD*(11)" LOC = "P124" ; NET "OCB_Chip_Sel_PAD*(11)" LOC = "P125" ; NET "Config_Chip_PAD*(12)" LOC = "P126" ; NET "Chip_Configed_PAD(12)" LOC = "P127" ; NET "Chip_Status_PAD*(12)" LOC = "P128" ; NET "OCB_Chip_Sel_PAD*(12)" LOC = "P129" ; NET "Config_Chip_PAD*(13)" LOC = "P130" ; NET "Chip_Configed_PAD(13)" LOC = "P131" ; NET "Chip_Status_PAD*(13)" LOC = "P132" ; NET "OCB_Chip_Sel_PAD*(13)" LOC = "P133" ; NET "Config_Chip_PAD*(14)" LOC = "P134" ; NET "Chip_Configed_PAD(14)" LOC = "P136" ; NET "Chip_Status_PAD*(14)" LOC = "P137" ; NET "OCB_Chip_Sel_PAD*(14)" LOC = "P138" ; NET "Config_Chip_PAD*(15)" LOC = "P139" ; NET "Chip_Configed_PAD(15)" LOC = "P141" ; NET "Chip_Status_PAD*(15)" LOC = "P142" ; NET "OCB_Chip_Sel_PAD*(15)" LOC = "P144" ; NET "Config_Chip_PAD*(16)" LOC = "P145" ; NET "Chip_Configed_PAD(16)" LOC = "P146" ; NET "Chip_Status_PAD*(16)" LOC = "P147" ; NET "OCB_Chip_Sel_PAD*(16)" LOC = "P148" ; NET "Config_Chip_PAD*(18)" LOC = "P149" ; NET "Chip_Configed_PAD(18)" LOC = "P152" ; NET "OCB_Chip_Sel_PAD*(18)" LOC = "P153" ; NET "Config_Chip_PAD*(19)" LOC = "P154" ; NET "Chip_Configed_PAD(19)" LOC = "P155" ; NET "Chip_Status_PAD*(19)" LOC = "P156" ; NET "OCB_Chip_Sel_PAD*(19)" LOC = "P157" ; NET "Config_Chip_PAD*(20)" LOC = "P159" ; NET "Chip_Configed_PAD(20)" LOC = "P160" ; NET "Chip_Status_PAD*(20)" LOC = "P162" ; NET "OCB_Chip_Sel_PAD*(20)" LOC = "P163" ; NET "MSA_FPGA_Output_Enable_PAD*" LOC = "P164" ; NET "OCB_Reg_Addr_PAD(2)" LOC = "P167" ; NET "OCB_Reg_Addr_PAD(4)" LOC = "P168" ; NET "OCB_Reg_Addr_PAD(6)" LOC = "P169" ; NET "OCB_Reg_Addr_PAD(1)" LOC = "P170" ; NET "OCB_Reg_Addr_PAD(5)" LOC = "P171" ; NET "OCB_Reg_Addr_PAD(7)" LOC = "P172" ; NET "OCB_Reg_Addr_PAD(0)" LOC = "P173" ; NET "OCB_Reg_Addr_PAD(3)" LOC = "P175" ; NET "OCB_Reg_Addr_PAD(8)" LOC = "P176" ; NET "BSF_FPGA_Output_Enable_PAD*" LOC = "P185" ; NET "MSA_ECL_Output_Enable_PAD" LOC = "P186" ; NET "VME_IACKOUT_PAD" LOC = "P192" ; NET "VME_IRQ4_PAD" LOC = "P193" ; NET "VME_DTACK_PAD" LOC = "P194" ; NET "Board_Species_PAD(8)" LOC = "P197" ; NET "Board_Species_PAD(9)" LOC = "P198" ; NET "Board_Species_PAD(10)" LOC = "P199" ; NET "Board_Species_PAD(11)" LOC = "P200" ; NET "Board_Species_PAD(12)" LOC = "P202" ; NET "Board_Species_PAD(13)" LOC = "P203" ; NET "Board_Species_PAD(14)" LOC = "P205" ; NET "Board_Species_PAD(15)" LOC = "P206" ; NET "VME_A_PAD(9)" LOC = "P207" ; NET "VME_A_PAD(1)" LOC = "P208" ; NET "VME_A_PAD(8)" LOC = "P209" ; NET "VME_A_PAD(11)" LOC = "P210" ; NET "VME_A_PAD(3)" LOC = "P213" ; NET "VME_A_PAD(10)" LOC = "P214" ; NET "VME_A_PAD(2)" LOC = "P215" ; NET "VME_A_PAD(5)" LOC = "P216" ; NET "VME_A_PAD(12)" LOC = "P217" ; NET "VME_A_PAD(4)" LOC = "P218" ; NET "VME_A_PAD(14)" LOC = "P220" ; NET "VME_A_PAD(6)" LOC = "P221" ; NET "VME_A_PAD(13)" LOC = "P223" ; NET "VME_A_PAD(16)" LOC = "P224" ; NET "VME_AM_PAD(4)" LOC = "P225" ; NET "VME_A_PAD(15)" LOC = "P226" ; NET "VME_A_PAD(7)" LOC = "P228" ; NET "VME_A_PAD(18)" LOC = "P229" ; NET "VME_IACKIN_PAD*" LOC = "P230" ; NET "VME_A_PAD(17)" LOC = "P231" ; NET "VME_A_PAD(20)" LOC = "P233" ; NET "VME_AM_PAD(3)" LOC = "P234" ; NET "VME_A_PAD(19)" LOC = "P235" ; NET "VME_IACK_PAD*" LOC = "P236" ; NET "VME_AM_PAD(1)" LOC = "P237" ; NET "VME_AS_PAD*" LOC = "P238" ; NET "VME_A_PAD(21)" LOC = "P239" ; // Wire-wrap jumpers on the board // NET "J200" LOC = "P183" ; // NET "J201" LOC = "P187" ; # Int IRQ // NET "J202" LOC = "P178" ; // NET "J203" LOC = "P184" ; // NET "J204" LOC = "P174" ; # Wrt_Stb* // NET "J205" LOC = "P68" ; # LDC // NET "J206" LOC = "P181" ; // NET "J208" LOC = "P191" ; // NET "J209" LOC = "P193" ; // NET "J210" LOC = "P191" ; # RA(8)