# # Timing Origination Module # TOM # Mentor Key-In Net List File # ----------------------------- # # Original Rev. 2-JULY-1996 # Most Recent Rev. 20-SEPT-1996 # # # Format: # # ---> a comment # / ---> used to indicate the hierarchical structure of # the schematic from which the netlist came. # # Each line begins with the word NET followed by a blank space # and then the net name contained in single quotes '. Nodes are # in the form of Reference ID then a dash - then a pin number. # All of this node information is without any spaces. There is # a space between nodes. Nets can be continued on the next line # by just repeating the net name. # # All capital letters are used in the net list specification. # # A number of net properties can be attached to a net (e.g. # length, order, priority, type, restrict, source, terminator). # The P1 backplane design should not need to use any of these # properties. # # Voltage LOW active signals end in a *. # The non-inverted half of a differential signal ends in _NINV. # The inverted half of a differential signal ends in _INV. # # # # # Recall the layout of our 5 Row VME P1 Backplane # # # 5 Row VME Layout # -------------------- # Rev. 1-MAR-1996 # # The following is the layout that is used in P1 of all Run II Framework VME # Crates. In addition to the normal VME signals, this 5 Row VME layout # caries 16 differential ECL timing signals and additional power supplies: # -2V and -4.5V. # # Pins Signal Function # ------------------------------------------------------------------- # Pin Row Row Row Row Row # Number A B C D E # ------ ----------- ----------- ----------- ----------- ----------- # # 1 TS_00_Inv TS_00_NonInv GND TS_08_Inv TS_08_NonInv # 2 GND GND GND GND GND # 3 TS_01_Inv TS_01_NonInv GND TS_09_Inv TS_09_NonInv # 4 TS_02_Inv TS_02_NonInv GND TS_10_Inv TS_10_NonInv # 5 TS_03_Inv TS_03_NonInv GND TS_11_Inv TS_11_NonInv # 6 TS_04_Inv TS_04_NonInv GND TS_12_Inv TS_12_NonInv # 7 TS_05_Inv TS_05_NonInv GND TS_13_Inv TS_13_NonInv # 8 TS_06_Inv TS_06_NonInv GND TS_14_Inv TS_14_NonInv # 9 TS_07_Inv TS_07_NonInv GND TS_15_Inv TS_15_NonInv # 10 GND GND GND GND GND # # 11 Data_00 BBSY* Data_08 Data_01 BCLR* # 12 Data_09 Data_02 GND ACFAIL* GND # 13 Data_10 Data_03 BG0IN* Data_11 Data_04 # 14 BG0OUT* Data_12 Data_05 BG1IN* Data_13 # 15 Data_06 BG1OUT* Data_14 Data_07 BG2IN* # 16 Data_15 BG2OUT* SYSCLK BG3IN* SYSFAIL* # 17 BG3OUT* BERR* GND DS1* GND # 18 BR0* GND SYSRESET* GND DS0* # 19 BR1* LWORD* GND WRITE* GND # # 20 BR2* GND AM5 BR3* Adrs_23 # 21 GND DTACK* GND AM0 Adrs_22 # 22 AM1 GND AS* GND Adrs_21 # 23 AM2 Adrs_20 AM3 Adrs_19 IACK* # 24 Adrs_18 IACKIN* SERCLK Adrs_17 IACKOUT* # 25 SERDAT* Adrs_16 AM4 Adrs_15 Adrs_07 # 26 IRQ7* Adrs_14 Adrs_06 IRQ6* Adrs_13 # 27 Adrs_05 IRQ5* Adrs_12 Adrs_04 IRQ4* # 28 Adrs_11 Adrs_03 IRQ3* Adrs_10 Adrs_02 # 29 IRQ2* Adrs_09 Adrs_01 IRQ1* Adrs_08 # # 30 GND GND GND GND GND # 31 -2V -12V +5V STDBY +12V -4.5V # 32 -2V +5V +5V +5V -4.5V # # ------ ----------- ----------- ----------- ----------- ----------- # Pin A B C D E # Number Row Row Row Row Row # # # # # The Following Is the Standard 3 Row VME Pinout # ------------------------------------------------ # # Pins Signal Function # --------------------------------------- # Pin Row Row Row # Number A B C # ------ ----------- ----------- ----------- # # 1 Data_00 _BBSY*_ Data_08 # 2 Data_01 _BCLR*_ Data_09 # 3 Data_02 ACFAIL* Data_10 # 4 Data_03 BG0IN*_ Data_11 # 5 Data_04 BG0OUT* Data_12 # 6 Data_05 BG1IN*_ Data_13 # 7 Data_06 BG1OUT* Data_14 # 8 Data_07 BG2IN*_ Data_15 # 9 __GND__ BG2OUT* __GND__ # # 10 SYSCLK_ BG3IN*_ SYSFAL* # 11 __GND__ BG3OUT* BERR*__ # 12 _DS1*__ _BR0*__ SYSRST* # 13 _DS0*__ _BR1*__ LWORD*_ # 14 WRITE*_ _BR2*__ __AM5__ # # 15 __GND__ _BR3*__ Adrs_23 # 16 DTACK*_ __AM0__ Adrs_22 # 17 __GND__ __AM1__ Adrs_21 # 18 __AS*__ __AM2__ Adrs_20 # 19 __GND__ __AM3__ Adrs_19 # 20 _IACK*_ __GND__ Adrs_18 # 21 IACKIN* SERCLK_ Adrs_17 # 22 IAKOUT* SERDAT* Adrs_16 # 23 __AM4__ __GND__ Adrs_15 # # 24 Adrs_07 _IRQ7*_ Adrs_14 # 25 Adrs_06 _IRQ6*_ Adrs_13 # 26 Adrs_05 _IRQ5*_ Adrs_12 # 27 Adrs_04 _IRQ4*_ Adrs_11 # 28 Adrs_03 _IRQ3*_ Adrs_10 # 29 Adrs_02 _IRQ2*_ Adrs_09 # 30 Adrs_01 _IRQ1*_ Adrs_08 # # 31 _-12V__ +5STDBY _+12V__ # 32 __+5V__ __+5V__ __+5V__ # # ------ ----------- ----------- ----------- # Pin A B C # Number Row Row Row # # # # Now Recall the Row C power and ground pin out of the 5 row P2-P3 # # P2 Row C P3 Row C # -------------- --------------- # # C1 Gnd-1 C1 Gnd-1 # C2 +3V-1 C2 +3V-1 # C3 Gnd-2 C3 Gnd-2 # C4 +3V-2 C4 +3V-2 # C5 -2V-1 C5 -4.5V-1 # C6 Gnd-3 C6 Gnd-3 # C7 +3V-3 C7 +3V-3 # C8 Gnd-4 C8 Gnd-4 # C9 +5V-1 C9 +5V-1 # # C10 Gnd-5 C10 Gnd-5 # C11 +3V-4 C11 +3V-4 # C12 Gnd-6 C12 Gnd-6 # C13 +3V-5 C13 +3V-5 # C14 Gnd-7 C14 Gnd-7 # C15 -2V-2 C15 -4.5V-2 # C16 Gnd-8 C16 Gnd-8 # C17 +3V-6 C17 +3V-6 # C18 Gnd-9 C18 Gnd-9 # C19 +5V-2 C19 +5V-2 # # C20 +3V-7 C20 +3V-7 # C21 Gnd-10 C21 Gnd-10 # C22 +3V-8 C22 +3V-8 # C23 Gnd-11 C23 Gnd-11 # C24 -2V-3 C24 -4.5V-3 # C25 Gnd-12 C25 Gnd-12 # C26 +3V-9 C26 +3V-9 # C27 Gnd-13 C27 Gnd-13 # C28 +5V-3 C28 +5V-3 # C29 +3V-10 C29 +3V-10 # # C30 Gnd-14 C30 Gnd-14 # C31 +3V-11 C31 +3V-11 # C32 Gnd-15 C32 Gnd-15 # # # # # The first part of the Net List is the normal VME P1 connections. # These nets are presented in a rational order similar to how they # appear in a normal 3 row VME DIN connector. # # This section of the net list also includes the connections to # the VME Terminator resistor networks. These are wired up in # the following way: # # R50 pin #2 : #9 J1-A11 : J1-A20 # R55 pin #2 : #9 J1-A20 : J1-A29 # # R51 and R56 same thing for the J1 "B" row # R52 and R57 same thing for the J1 "C" row # R53 and R58 same thing for the J1 "D" row # R54 and R59 same thing for the J1 "E" row # # # # NET 'DATA_00' J4-A1 J1-A11 R50-2 NET 'DATA_01' J4-A2 J1-D11 R53-2 NET 'DATA_02' J4-A3 J1-B12 R51-3 NET 'DATA_03' J4-A4 J1-B13 R51-4 NET 'DATA_04' J4-A5 J1-E13 R54-3 NET 'DATA_05' J4-A6 J1-C14 R52-4 NET 'DATA_06' J4-A7 J1-A15 R50-5 NET 'DATA_07' J4-A8 J1-D15 R53-5 # NET 'DATA_08' J4-C1 J1-C11 R52-2 NET 'DATA_09' J4-C2 J1-A12 R50-3 NET 'DATA_10' J4-C3 J1-A13 R50-4 NET 'DATA_11' J4-C4 J1-D13 R53-4 NET 'DATA_12' J4-C5 J1-B14 R51-5 NET 'DATA_13' J4-C6 J1-E14 R54-4 NET 'DATA_14' J4-C7 J1-C15 R52-5 NET 'DATA_15' J4-C8 J1-A16 R50-6 # NET 'BBSY*' J4-B1 J1-B11 R51-2 NET 'BCLR*' J4-B2 J1-E11 R54-2 NET 'ACFAIL*' J4-B3 J1-D12 R53-3 # NET 'BG0IN*' J4-B4 J1-C13 NET 'BG0OUT*' J4-B5 J1-A14 NET 'BG1IN*' J4-B6 J1-D14 NET 'BG1OUT*' J4-B7 J1-B15 NET 'BG2IN*' J4-B8 J1-E15 NET 'BG2OUT*' J4-B9 J1-B16 NET 'BG3IN*' J4-B10 J1-D16 NET 'BG3OUT*' J4-B11 J1-A17 # NET 'SYSCLK' J4-A10 J1-C16 R52-6 NET 'DS1*' J4-A12 J1-D17 R53-7 NET 'DS0*' J4-A13 J1-E18 R54-7 NET 'WRITE*' J4-A14 J1-D19 R53-8 NET 'DTACK*' J4-A16 J1-B21 R56-2 NET 'AS*' J4-A18 J1-C22 R57-2 NET 'IACK*' J4-A20 J1-E23 R59-4 NET 'IACKIN*' J4-A21 J1-B24 NET 'IAKOUT*' J4-A22 J1-E24 NET 'AM4' J4-A23 J1-C25 R57-5 # NET 'SYSFAL*' J4-C10 J1-E16 R54-5 NET 'BERR*' J4-C11 J1-B17 R51-7 NET 'SYSRST*' J4-C12 J1-C18 R52-8 NET 'LWORD*' J4-C13 J1-B19 R51-9 NET 'AM5' J4-C14 J1-C20 R52-9 # NET 'BR0*' J4-B12 J1-A18 R50-7 NET 'BR1*' J4-B13 J1-A19 R50-8 NET 'BR2*' J4-B14 J1-A20 R50-9 NET 'BR3*' J4-B15 J1-D20 R53-9 # NET 'AM0' J4-B16 J1-D21 R58-2 NET 'AM1' J4-B17 J1-A22 R55-2 NET 'AM2' J4-B18 J1-A23 R55-3 NET 'AM3' J4-B19 J1-C23 R57-3 # NET 'SERCLK' J4-B21 J1-C24 R57-4 NET 'SERDAT' J4-B22 J1-A25 R55-5 # NET 'IRQ7*' J4-B24 J1-A26 R55-6 NET 'IRQ6*' J4-B25 J1-D26 R58-6 NET 'IRQ5*' J4-B26 J1-B27 R56-7 NET 'IRQ4*' J4-B27 J1-E27 R59-7 NET 'IRQ3*' J4-B28 J1-C28 R57-8 NET 'IRQ2*' J4-B29 J1-A29 R55-9 NET 'IRQ1*' J4-B30 J1-D29 R58-9 # NET 'ADRS_23' J4-C15 J1-E20 R54-8 NET 'ADRS_22' J4-C16 J1-E21 R54-9 NET 'ADRS_21' J4-C17 J1-E22 R59-3 NET 'ADRS_20' J4-C18 J1-B23 R56-4 NET 'ADRS_19' J4-C19 J1-D23 R58-3 NET 'ADRS_18' J4-C20 J1-A24 R55-4 NET 'ADRS_17' J4-C21 J1-D24 R58-4 NET 'ADRS_16' J4-C22 J1-B25 R56-5 NET 'ADRS_15' J4-C23 J1-D25 R58-5 NET 'ADRS_14' J4-C24 J1-B26 R56-6 NET 'ADRS_13' J4-C25 J1-E26 R59-6 NET 'ADRS_12' J4-C26 J1-C27 R57-7 NET 'ADRS_11' J4-C27 J1-A28 R55-8 NET 'ADRS_10' J4-C28 J1-D28 R58-8 NET 'ADRS_09' J4-C29 J1-B29 R56-9 NET 'ADRS_08' J4-C30 J1-E29 R59-9 # NET 'ADRS_07' J4-A24 J1-E25 R59-5 NET 'ADRS_06' J4-A25 J1-C26 R57-6 NET 'ADRS_05' J4-A26 J1-A27 R55-7 NET 'ADRS_04' J4-A27 J1-D27 R58-7 NET 'ADRS_03' J4-A28 J1-B28 R56-8 NET 'ADRS_02' J4-A29 J1-E28 R59-8 NET 'ADRS_01' J4-A30 J1-C29 R57-9 # # # Now pickup the power and ground on the "VME P1 connector", i.e. J4 # # NET 'GROUND' J4-A9 J4-A11 J4-A15 J4-A17 J4-A19 NET 'GROUND' J4-B20 J4-B23 J4-C9 # NET '-12V' J4-A31 NET '+5STDBY' J4-B31 NET '+12V' J4-C31 NET 'VCC' J4-A32 J4-B32 J4-C32 # # # Now let's get the power and ground on J1, # i.e the 5 row P1 backplane connector # NET 'GROUND' J1-A2 J1-A10 J1-A21 J1-A30 NET 'GROUND' J1-B2 J1-B10 J1-B18 J1-B20 J1-B22 J1-B30 NET 'GROUND' J1-C1 J1-C2 J1-C3 J1-C4 J1-C5 J1-C6 J1-C7 J1-C8 NET 'GROUND' J1-C9 J1-C10 J1-C12 J1-C17 J1-C19 J1-C21 J1-C30 NET 'GROUND' J1-D2 J1-D10 J1-D18 J1-D22 J1-D30 NET 'GROUND' J1-E2 J1-E10 J1-E12 J1-E17 J1-E19 J1-E30 # NET 'VTT' J1-A31 J1-A32 NET '-12V' J1-B31 NET '+5STDBY' J1-C31 NET '+12V' J1-D31 NET 'VEE' J1-E31 J1-E32 NET 'VCC' J1-B32 J1-C32 J1-D32 # # # The following section is the center row on TOM's 5 row J2 and J3 # connectors, i.e. the connections to the P2-P3 backplane. # NET 'GROUND' J2-C1 J2-C3 J2-C6 J2-C8 J2-C10 J2-C12 J2-C14 NET 'GROUND' J2-C16 J2-C18 J2-C21 J2-C23 J2-C25 J2-C27 J2-C30 NET 'GROUND' J2-C32 # NET 'VCC' J2-C9 J2-C19 J2-C28 # # NET 'VDD' J2-C2 J2-C4 J2-C7 J2-C11 J2-C13 ! NO Connection # NET 'VDD' J2-C17 J2-C20 J2-C22 J2-C26 J2-C29 ! here. See below # NET 'VDD' J2-C31 ! under VDD Caps. # NET 'VTT' J2-C5 J2-C15 J2-C24 # NET 'GROUND' J3-C1 J3-C3 J3-C6 J3-C8 J3-C10 J3-C12 J3-C14 NET 'GROUND' J3-C16 J3-C18 J3-C21 J3-C23 J3-C25 J3-C27 J3-C30 NET 'GROUND' J3-C32 # NET 'VCC' J3-C9 J3-C19 J3-C28 # # NET 'VDD' J3-C2 J3-C4 J3-C7 J3-C11 J3-C13 ! NO Connection # NET 'VDD' J3-C17 J3-C20 J3-C22 J3-C26 J3-C29 ! NO Connection # NET 'VDD' J3-C31 ! NO Connection # NET 'VEE' J3-C5 J3-C15 J3-C24 # # # Now pick up the center row on the 3 row VME P2 connector i.e. J5. The # power and ground connections to the 3 row VME P2 will be defined here. # The A32-D32 signals on J5's row B are connected only to access via's. # NET 'VCC' J5-B1 V01_P2C-1 NET 'GROUND' J5-B2 V02_P2C-1 NET 'RETRY*' J5-B3 V03_P2C-1 NET 'ADRS_24' J5-B4 V04_P2C-1 NET 'ADRS_25' J5-B5 V05_P2C-1 NET 'ADRS_26' J5-B6 V06_P2C-1 NET 'ADRS_27' J5-B7 V07_P2C-1 NET 'ADRS_28' J5-B8 V08_P2C-1 NET 'ADRS_29' J5-B9 V09_P2C-1 NET 'ADRS_30' J5-B10 V10_P2C-1 NET 'ADRS_31' J5-B11 V11_P2C-1 NET 'GROUND' J5-B12 V12_P2C-1 NET 'VCC' J5-B13 V13_P2C-1 NET 'DATA_16' J5-B14 V14_P2C-1 NET 'DATA_17' J5-B15 V15_P2C-1 NET 'DATA_18' J5-B16 V16_P2C-1 NET 'DATA_19' J5-B17 V17_P2C-1 NET 'DATA_20' J5-B18 V18_P2C-1 NET 'DATA_21' J5-B19 V19_P2C-1 NET 'DATA_22' J5-B20 V20_P2C-1 NET 'DATA_23' J5-B21 V21_P2C-1 NET 'GROUND' J5-B22 V22_P2C-1 NET 'DATA_24' J5-B23 V23_P2C-1 NET 'DATA_25' J5-B24 V24_P2C-1 NET 'DATA_26' J5-B25 V25_P2C-1 NET 'DATA_27' J5-B26 V26_P2C-1 NET 'DATA_28' J5-B27 V27_P2C-1 NET 'DATA_29' J5-B28 V28_P2C-1 NET 'DATA_30' J5-B29 V29_P2C-1 NET 'DATA_31' J5-B30 V30_P2C-1 NET 'GROUND' J5-B31 V31_P2C-1 NET 'VCC' J5-B32 V32_P2C-1 # # # Along this row of via's that connect to the center row of this 3 row # VME P2 connector (i.e. J5) there is an extra marker via at every 5th # location, i.e. 1,5,10,15,20,25,30,32. Connect these marker via's to # the GROUND net. # NET 'GROUND' V01_P2G-1 V05_P2G-1 V10_P2G-1 V15_P2G-1 NET 'GROUND' V20_P2G-1 V25_P2G-1 V30_P2G-1 V32_P2G-1 # # # The two outer rows on the 3 row VME P2 connector are the # "User Defined" pins. The TOM module will route the "A" row # of the 3 row VME P2 connector to the "A" row of the 5 row # P2 backplane connector, and it will route the "C" row of the # 3 row VME P2 connector to the "B" row of the 5 row P2 # backplane connector. # NET 'USER_A1' J5-A1 J2-A1 NET 'USER_A2' J5-A2 J2-A2 NET 'USER_A3' J5-A3 J2-A3 NET 'USER_A4' J5-A4 J2-A4 NET 'USER_A5' J5-A5 J2-A5 NET 'USER_A6' J5-A6 J2-A6 NET 'USER_A7' J5-A7 J2-A7 NET 'USER_A8' J5-A8 J2-A8 NET 'USER_A9' J5-A9 J2-A9 NET 'USER_A10' J5-A10 J2-A10 NET 'USER_A11' J5-A11 J2-A11 NET 'USER_A12' J5-A12 J2-A12 NET 'USER_A13' J5-A13 J2-A13 NET 'USER_A14' J5-A14 J2-A14 NET 'USER_A15' J5-A15 J2-A15 NET 'USER_A16' J5-A16 J2-A16 NET 'USER_A17' J5-A17 J2-A17 NET 'USER_A18' J5-A18 J2-A18 NET 'USER_A19' J5-A19 J2-A19 NET 'USER_A20' J5-A20 J2-A20 NET 'USER_A21' J5-A21 J2-A21 NET 'USER_A22' J5-A22 J2-A22 NET 'USER_A23' J5-A23 J2-A23 NET 'USER_A24' J5-A24 J2-A24 NET 'USER_A25' J5-A25 J2-A25 NET 'USER_A26' J5-A26 J2-A26 NET 'USER_A27' J5-A27 J2-A27 NET 'USER_A28' J5-A28 J2-A28 NET 'USER_A29' J5-A29 J2-A29 NET 'USER_A30' J5-A30 J2-A30 NET 'USER_A31' J5-A31 J2-A31 NET 'USER_A32' J5-A32 J2-A32 # NET 'USER_C1' J5-C1 J2-B1 NET 'USER_C2' J5-C2 J2-B2 NET 'USER_C3' J5-C3 J2-B3 NET 'USER_C4' J5-C4 J2-B4 NET 'USER_C5' J5-C5 J2-B5 NET 'USER_C6' J5-C6 J2-B6 NET 'USER_C7' J5-C7 J2-B7 NET 'USER_C8' J5-C8 J2-B8 NET 'USER_C9' J5-C9 J2-B9 NET 'USER_C10' J5-C10 J2-B10 NET 'USER_C11' J5-C11 J2-B11 NET 'USER_C12' J5-C12 J2-B12 NET 'USER_C13' J5-C13 J2-B13 NET 'USER_C14' J5-C14 J2-B14 NET 'USER_C15' J5-C15 J2-B15 NET 'USER_C16' J5-C16 J2-B16 NET 'USER_C17' J5-C17 J2-B17 NET 'USER_C18' J5-C18 J2-B18 NET 'USER_C19' J5-C19 J2-B19 NET 'USER_C20' J5-C20 J2-B20 NET 'USER_C21' J5-C21 J2-B21 NET 'USER_C22' J5-C22 J2-B22 NET 'USER_C23' J5-C23 J2-B23 NET 'USER_C24' J5-C24 J2-B24 NET 'USER_C25' J5-C25 J2-B25 NET 'USER_C26' J5-C26 J2-B26 NET 'USER_C27' J5-C27 J2-B27 NET 'USER_C28' J5-C28 J2-B28 NET 'USER_C29' J5-C29 J2-B29 NET 'USER_C30' J5-C30 J2-B30 NET 'USER_C31' J5-C31 J2-B31 NET 'USER_C32' J5-C32 J2-B32 # # # Ground and supply Vcc to the proper pins on the # 10 VME Terminator resistor networks. Pin #1 is the 470 Ohm # end and goes to GND, pin #10 is the 330 Ohm end and goes to Vcc. # Also supply VCC and Gnd to the bypass capacitors on the VME # Terminator resistor packs. # NET 'GROUND' R50-1 R51-1 R52-1 R53-1 R54-1 NET 'GROUND' R55-1 R56-1 R57-1 R58-1 R59-1 # NET 'VCC' R50-10 R51-10 R52-10 R53-10 R54-10 NET 'VCC' R55-10 R56-10 R57-10 R58-10 R59-10 # NET 'VCC' C51-1 C52-1 C53-1 C54-1 C55-1 C56-1 C50-1 NET 'GROUND' C51-2 C52-2 C53-2 C54-2 C55-2 C56-2 C50-2 # # # # # # *********************************************************************** # *xxx * # * Timing Signal Line Receivers * # * * # * This section describes the Line Receivers for the Timing Signals * # * the terminators on these lines and the associated bypass * # * capacitors. * # * * # *********************************************************************** # # The following nets are the input signal pins from the backplane and # the terminator resistors and the line receiver inputs. # NET 'TS_00_INV_INP' J3-A2 R1-2 U1-20 NET 'TS_00_NON_INP' J3-B2 R1-1 U1-19 # NET 'TS_01_INV_INP' J3-A4 R2-1 U1-18 NET 'TS_01_NON_INP' J3-B4 R2-2 U1-17 # NET 'TS_02_INV_INP' J3-A6 R3-2 U1-13 NET 'TS_02_NON_INP' J3-B6 R3-1 U1-12 # NET 'TS_03_INV_INP' J3-A8 R4-2 U1-11 NET 'TS_03_NON_INP' J3-B8 R4-1 U1-10 # NET 'U1_VBB' U1-16 U1-21 U1-23 # NET 'TS_04_INV_INP' J3-A10 R5-2 U2-20 NET 'TS_04_NON_INP' J3-B10 R5-1 U2-19 # NET 'TS_05_INV_INP' J3-A12 R6-1 U2-18 NET 'TS_05_NON_INP' J3-B12 R6-2 U2-17 # NET 'TS_06_INV_INP' J3-A14 R7-2 U2-13 NET 'TS_06_NON_INP' J3-B14 R7-1 U2-12 # NET 'TS_07_INV_INP' J3-A16 R8-2 U2-11 NET 'TS_07_NON_INP' J3-B16 R8-1 U2-10 # NET 'U2_VBB' U2-16 U2-21 U2-23 # NET 'TS_08_INV_INP' J3-A18 R9-2 U3-20 NET 'TS_08_NON_INP' J3-B18 R9-1 U3-19 # NET 'TS_09_INV_INP' J3-A20 R10-1 U3-18 NET 'TS_09_NON_INP' J3-B20 R10-2 U3-17 # NET 'TS_10_INV_INP' J3-A22 R11-2 U3-13 NET 'TS_10_NON_INP' J3-B22 R11-1 U3-12 # NET 'TS_11_INV_INP' J3-A24 R12-2 U3-11 NET 'TS_11_NON_INP' J3-B24 R12-1 U3-10 # NET 'U3_VBB' U3-16 U3-21 U3-23 # NET 'TS_12_INV_INP' J3-A26 R13-2 U4-20 NET 'TS_12_NON_INP' J3-B26 R13-1 U4-19 # NET 'TS_13_INV_INP' J3-A28 R14-1 U4-18 NET 'TS_13_NON_INP' J3-B28 R14-2 U4-17 # NET 'TS_14_INV_INP' J3-A30 R15-2 U4-13 NET 'TS_14_NON_INP' J3-B30 R15-1 U4-12 # NET 'TS_15_INV_INP' J3-A32 R16-2 U4-11 NET 'TS_15_NON_INP' J3-B32 R16-1 U4-10 # NET 'U4_VBB' U4-16 U4-21 U4-23 # # # Now List the Output from the Timing Signal Line Receivers and the # inputs to the Front Panel Drivers. # NET 'TS_00_INV_BFR' U1-26 U5-20 NET 'TS_00_NON_BFR' U1-27 U5-19 # NET 'TS_01_INV_BFR' U1-3 U5-18 NET 'TS_01_NON_BFR' U1-4 U5-17 # NET 'TS_02_INV_BFR' U1-5 U5-13 NET 'TS_02_NON_BFR' U1-6 U5-12 # NET 'TS_03_INV_BFR' U1-7 U5-11 NET 'TS_03_NON_BFR' U1-9 U5-10 # # NET 'TS_04_INV_BFR' U2-26 U6-20 NET 'TS_04_NON_BFR' U2-27 U6-19 # NET 'TS_05_INV_BFR' U2-3 U6-18 NET 'TS_05_NON_BFR' U2-4 U6-17 # NET 'TS_06_INV_BFR' U2-5 U6-13 NET 'TS_06_NON_BFR' U2-6 U6-12 # NET 'TS_07_INV_BFR' U2-7 U6-11 NET 'TS_07_NON_BFR' U2-9 U6-10 # # NET 'TS_08_INV_BFR' U3-26 U7-20 NET 'TS_08_NON_BFR' U3-27 U7-19 # NET 'TS_09_INV_BFR' U3-3 U7-18 NET 'TS_09_NON_BFR' U3-4 U7-17 # NET 'TS_10_INV_BFR' U3-5 U7-13 NET 'TS_10_NON_BFR' U3-6 U7-12 # NET 'TS_11_INV_BFR' U3-7 U7-11 NET 'TS_11_NON_BFR' U3-9 U7-10 # # NET 'TS_12_INV_BFR' U4-26 U8-20 NET 'TS_12_NON_BFR' U4-27 U8-19 # NET 'TS_13_INV_BFR' U4-3 U8-18 NET 'TS_13_NON_BFR' U4-4 U8-17 # NET 'TS_14_INV_BFR' U4-5 U8-13 NET 'TS_14_NON_BFR' U4-6 U8-12 # NET 'TS_15_INV_BFR' U4-7 U8-11 NET 'TS_15_NON_BFR' U4-9 U8-10 # # # VEE and Ground Connections to the Timing Signal Receiver Chips # NET 'VEE' U1-8 U1-14 U1-15 U1-22 NET 'GROUND' U1-1 U1-2 U1-28 # NET 'VEE' U2-8 U2-14 U2-15 U2-22 NET 'GROUND' U2-1 U2-2 U2-28 # NET 'VEE' U3-8 U3-14 U3-15 U3-22 NET 'GROUND' U3-1 U3-2 U3-28 # NET 'VEE' U4-8 U4-14 U4-15 U4-22 NET 'GROUND' U4-1 U4-2 U4-28 # # # The following are the VEE and Gnd net for the bypass capacitors # that are associated with the Timing Signal Line Receivers. # NET 'VEE' C1-1 C2-1 C3-1 C4-1 NET 'GROUND' C1-2 C2-2 C3-2 C4-2 # # # # # # # # *********************************************************************** # *xxx * # * Front Panel Timing Signal Buffers * # * * # * The following section describes the Timing Signal Buffers that * # * send a copy of the Timing Signals to the Front Panel connector. * # * * # * * # *********************************************************************** # # These are the VBB nets for the 4 driver chips for the front panel. # NET 'U5_VBB' U5-16 U5-21 U5-23 NET 'U6_VBB' U6-16 U6-21 U6-23 NET 'U7_VBB' U7-16 U7-21 U7-23 NET 'U8_VBB' U8-16 U8-21 U8-23 # # # VEE and Ground Connections to the Timing Signal Front Panel Buffer ICs. # NET 'VEE' U5-8 U5-14 U5-15 U5-22 NET 'GROUND' U5-1 U5-2 U5-28 # NET 'VEE' U6-8 U6-14 U6-15 U6-22 NET 'GROUND' U6-1 U6-2 U6-28 # NET 'VEE' U7-8 U7-14 U7-15 U7-22 NET 'GROUND' U7-1 U7-2 U7-28 # NET 'VEE' U8-8 U8-14 U8-15 U8-22 NET 'GROUND' U8-1 U8-2 U8-28 # # # The following are the VEE and Gnd net for the bypass capacitors # that are associated with the Front Panel Timing Signal Buffer. # NET 'VEE' C5-1 C6-1 C7-1 C8-1 NET 'GROUND' C5-2 C6-2 C7-2 C8-2 # # # # # # # # *********************************************************************** # *xxx * # * Backplane Timing Signal Drivers * # * * # * The following section describes the Timing Signal output nets. * # * These are the nets that include the output from the Driver Chips, * # * the pull down resistor packs, the Timing Signal output pins * # * on the J1 connector, the pull down resistors for the input to * # * these output drivers, and the various bypass capacitors. * # * * # *********************************************************************** # # First let's map out which Driver Chip handles which Timing Signal: # # TS_00 = U20-Q4 TS_04 = U22-Q4 TS_08 = U21-Q4 TS_12 = U23-Q4 # TS_01 = U20-Q3 TS_05 = U22-Q3 TS_09 = U21-Q3 TS_13 = U23-Q3 # TS_02 = U20-Q2 TS_06 = U22-Q2 TS_10 = U21-Q2 TS_14 = U23-Q2 # TS_03 = U20-Q1 TS_07 = U22-Q1 TS_11 = U21-Q1 TS_15 = U23-Q1 # # # Driver Chip Output Pins, Pulldowns, and J1 Output Pins # NET 'TS_00_INV_OUT' J1-A1 R20-9 U20-5 NET 'TS_00_NON_OUT' J1-B1 R20-1 U20-6 # NET 'TS_01_INV_OUT' J1-A3 R20-7 U20-3 NET 'TS_01_NON_OUT' J1-B3 R20-3 U20-4 # NET 'TS_02_INV_OUT' J1-A4 R21-9 U20-26 NET 'TS_02_NON_OUT' J1-B4 R21-1 U20-25 # NET 'TS_03_INV_OUT' J1-A5 R21-7 U20-24 NET 'TS_03_NON_OUT' J1-B5 R21-3 U20-23 # # NET 'TS_04_INV_OUT' J1-A6 R22-9 U22-5 NET 'TS_04_NON_OUT' J1-B6 R22-1 U22-6 # NET 'TS_05_INV_OUT' J1-A7 R22-7 U22-3 NET 'TS_05_NON_OUT' J1-B7 R22-3 U22-4 # NET 'TS_06_INV_OUT' J1-A8 R23-9 U22-26 NET 'TS_06_NON_OUT' J1-B8 R23-1 U22-25 # NET 'TS_07_INV_OUT' J1-A9 R23-7 U22-24 NET 'TS_07_NON_OUT' J1-B9 R23-3 U22-23 # # NET 'TS_08_INV_OUT' J1-D1 R20-8 U21-5 NET 'TS_08_NON_OUT' J1-E1 R20-2 U21-6 # NET 'TS_09_INV_OUT' J1-D3 R20-6 U21-3 NET 'TS_09_NON_OUT' J1-E3 R20-4 U21-4 # NET 'TS_10_INV_OUT' J1-D4 R21-8 U21-26 NET 'TS_10_NON_OUT' J1-E4 R21-2 U21-25 # NET 'TS_11_INV_OUT' J1-D5 R21-6 U21-24 NET 'TS_11_NON_OUT' J1-E5 R21-4 U21-23 # # NET 'TS_12_INV_OUT' J1-D6 R22-8 U23-5 NET 'TS_12_NON_OUT' J1-E6 R22-2 U23-6 # NET 'TS_13_INV_OUT' J1-D7 R22-6 U23-3 NET 'TS_13_NON_OUT' J1-E7 R22-4 U23-4 # NET 'TS_14_INV_OUT' J1-D8 R23-8 U23-26 NET 'TS_14_NON_OUT' J1-E8 R23-2 U23-25 # NET 'TS_15_INV_OUT' J1-D9 R23-6 U23-24 NET 'TS_15_NON_OUT' J1-E9 R23-4 U23-23 # # # Input Signals to the Driver Chips and Their Pulldowns # NET 'TS_00_INV_BFR' U20-10 R25-1 NET 'TS_00_NON_BFR' U20-9 R25-7 # NET 'TS_01_INV_BFR' U20-12 R25-3 NET 'TS_01_NON_BFR' U20-11 R25-5 # NET 'TS_02_INV_BFR' U20-18 R26-1 NET 'TS_02_NON_BFR' U20-19 R26-7 # NET 'TS_03_INV_BFR' U20-20 R26-3 NET 'TS_03_NON_BFR' U20-21 R26-5 # # NET 'TS_04_INV_BFR' U22-10 R27-1 NET 'TS_04_NON_BFR' U22-9 R27-7 # NET 'TS_05_INV_BFR' U22-12 R27-3 NET 'TS_05_NON_BFR' U22-11 R27-5 # NET 'TS_06_INV_BFR' U22-18 R28-1 NET 'TS_06_NON_BFR' U22-19 R28-7 # NET 'TS_07_INV_BFR' U22-20 R28-3 NET 'TS_07_NON_BFR' U22-21 R28-5 # # NET 'TS_08_INV_BFR' U21-10 R29-1 NET 'TS_08_NON_BFR' U21-9 R29-7 # NET 'TS_09_INV_BFR' U21-12 R29-3 NET 'TS_09_NON_BFR' U21-11 R29-5 # NET 'TS_10_INV_BFR' U21-18 R30-1 NET 'TS_10_NON_BFR' U21-19 R30-7 # NET 'TS_11_INV_BFR' U21-20 R30-3 NET 'TS_11_NON_BFR' U21-21 R30-5 # # NET 'TS_12_INV_BFR' U23-10 R31-1 NET 'TS_12_NON_BFR' U23-9 R31-7 # NET 'TS_13_INV_BFR' U23-12 R31-3 NET 'TS_13_NON_BFR' U23-11 R31-5 # NET 'TS_14_INV_BFR' U23-18 R32-1 NET 'TS_14_NON_BFR' U23-19 R32-7 # NET 'TS_15_INV_BFR' U23-20 R32-3 NET 'TS_15_NON_BFR' U23-21 R32-5 # # # Connect the Driver Chip OE pins to a Voltage HIGH ECL level # NET 'ECL_HI' U20-16 U21-16 U22-16 U23-16 # # # VEE and Ground Connections to the Driver Chips # NET 'VEE' U20-8 U20-13 U20-14 U20-15 U20-22 NET 'GROUND' U20-1 U20-2 U20-27 U20-28 # NET 'VEE' U21-8 U21-13 U21-14 U21-15 U21-22 NET 'GROUND' U21-1 U21-2 U21-27 U21-28 # NET 'VEE' U22-8 U22-13 U22-14 U22-15 U22-22 NET 'GROUND' U22-1 U22-2 U22-27 U22-28 # NET 'VEE' U23-8 U23-13 U23-14 U23-15 U23-22 NET 'GROUND' U23-1 U23-2 U23-27 U23-28 # # # VTT Pull Down Resistors and Bypass Capacitors # NET 'VTT' R20-5 R20-10 R21-5 R21-10 NET 'VTT' R22-5 R22-10 R23-5 R23-10 # NET 'VTT' R25-4 R25-8 R26-4 R26-8 NET 'VTT' R27-4 R27-8 R28-4 R28-8 NET 'VTT' R29-4 R29-8 R30-4 R30-8 NET 'VTT' R31-4 R31-8 R32-4 R32-8 # NET 'VTT' C21-2 C22-1 C27-2 C28-2 C30-2 NET 'GROUND' C21-1 C22-2 C27-1 C28-1 C30-1 # # # VEE Bypass Capacitors # NET 'VEE' C23-2 C24-2 C25-2 C26-2 C29-2 NET 'GROUND' C23-1 C24-1 C25-1 C26-1 C29-1 # # # # # # # # *********************************************************************** # *xxx * # * "EXTRA" Bypass Capacitors * # * * # * The following section describes the nets for the "EXTRA" bypass * # * capacitors that are used to keep the 4 planes at the same * # * AC ground and for bulk energy storage. Also described here * # * are the capacitors for +12V, -12V, and +5STDBY. * # * * # *********************************************************************** # # The following are the VCC and GND nets for the "EXTRA" VCC # bypass capacitors. First the Ceramic capacitors. ----- # NET 'VCC' C80-1 C81-1 C84-1 C87-1 C90-1 NET 'GROUND' C80-2 C81-2 C84-2 C87-2 C90-2 # # Now the Tantalum and Electrolytic capacitors. # NET 'VCC' C71-1 C74-1 C94-1 NET 'GROUND' C71-2 C74-2 C94-2 # # # The following are the VEE and GND nets for the "EXTRA" VEE # bypass capacitors. First the Ceramic capacitors. ----- # NET 'VEE' C82-2 C85-2 C88-2 C91-2 NET 'GROUND' C82-1 C85-1 C88-1 C91-1 # # Now the Tantalum and Electrolytic capacitors. # NET 'VEE' C72-2 C75-2 C95-2 NET 'GROUND' C72-1 C75-1 C95-1 # # # The following are the VTT and GND nets for the "EXTRA" VTT # bypass capacitors. First the Ceramic capacitors. ----- # NET 'VTT' C83-2 C86-2 C89-2 C92-2 C98-2 C97-1 NET 'GROUND' C83-1 C86-1 C89-1 C92-1 C98-1 C97-2 # # Now the Tantalum and Electrolytic capacitors. # NET 'VTT' C73-2 C76-2 C96-2 NET 'GROUND' C73-1 C76-1 C96-1 # # # The following are the VTT and GND nets for the "EXTRA" VDD # bypass capacitors. ----- # There is only one Electrolytic capacitor and one Tantalum capacitor # for VDD. # NET 'VDD' C93-1 C103-1 NET 'GROUND' C93-2 C103-2 # # Connect to +3V VDD ONLY on J2 because we do not want these noisy # lines running around the J3 Timing Signal input Receiver lines. # NET 'VDD' J2-C2 J2-C4 J2-C7 J2-C11 J2-C13 NET 'VDD' J2-C17 J2-C20 J2-C22 J2-C26 J2-C29 NET 'VDD' J2-C31 # # # Now connect the Tantalum Capacitors for the +12V, -12V and +5STDBY. # NET '+5STDBY' C102-1 NET 'GROUND' C102-2 # NET '+12V' C101-1 NET 'GROUND' C101-2 # NET 'GROUND' C100-1 NET '-12V' C100-2 # # # # # # ************************************************************************* # *xxx * # * NET's for the Proto-Type I/O Connections * # * * # * The following section describes the nets for the I/O connections * # * on J2 for the Proto-Type area. Rows "D" and "E" on the J2 * # * connector are used for this Proto-Type I/O. For differential * # * ECL signals, J2 row "D" is the Inverted half and row "E" is the * # * Non-Inv half of the signal. These J2 pins just come out via's * # * where wire wrap wires could be connected for proto-type work. * # * * # ************************************************************************* # # NET 'V1_Inv' J2-D1 V1_Inv-1 NET 'V1_Non' J2-E1 V1_Non-1 # NET 'V2_Inv' J2-D2 V2_Inv-1 NET 'V2_Non' J2-E2 V2_Non-1 # NET 'V3_Inv' J2-D3 V3_Inv-1 NET 'V3_Non' J2-E3 V3_Non-1 # NET 'V4_Inv' J2-D4 V4_Inv-1 NET 'V4_Non' J2-E4 V4_Non-1 # NET 'V5_Inv' J2-D5 V5_Inv-1 NET 'V5_Non' J2-E5 V5_Non-1 # NET 'V6_Inv' J2-D6 V6_Inv-1 NET 'V6_Non' J2-E6 V6_Non-1 # NET 'V7_Inv' J2-D7 V7_Inv-1 NET 'V7_Non' J2-E7 V7_Non-1 # NET 'V8_Inv' J2-D8 V8_Inv-1 NET 'V8_Non' J2-E8 V8_Non-1 # NET 'V9_Inv' J2-D9 V9_Inv-1 NET 'V9_Non' J2-E9 V9_Non-1 # NET 'V10_Inv' J2-D10 V10_Inv-1 NET 'V10_Non' J2-E10 V10_Non-1 # NET 'V11_Inv' J2-D11 V11_Inv-1 NET 'V11_Non' J2-E11 V11_Non-1 # NET 'V12_Inv' J2-D12 V12_Inv-1 NET 'V12_Non' J2-E12 V12_Non-1 # NET 'V13_Inv' J2-D13 V13_Inv-1 NET 'V13_Non' J2-E13 V13_Non-1 # NET 'V14_Inv' J2-D14 V14_Inv-1 NET 'V14_Non' J2-E14 V14_Non-1 # NET 'V15_Inv' J2-D15 V15_Inv-1 NET 'V15_Non' J2-E15 V15_Non-1 # NET 'V16_Inv' J2-D16 V16_Inv-1 NET 'V16_Non' J2-E16 V16_Non-1 # # NET 'V17_Inv' J2-D17 V17_Inv-1 NET 'V17_Non' J2-E17 V17_Non-1 # NET 'V18_Inv' J2-D18 V18_Inv-1 NET 'V18_Non' J2-E18 V18_Non-1 # NET 'V19_Inv' J2-D19 V19_Inv-1 NET 'V19_Non' J2-E19 V19_Non-1 # NET 'V20_Inv' J2-D20 V20_Inv-1 NET 'V20_Non' J2-E20 V20_Non-1 # NET 'V21_Inv' J2-D21 V21_Inv-1 NET 'V21_Non' J2-E21 V21_Non-1 # NET 'V22_Inv' J2-D22 V22_Inv-1 NET 'V22_Non' J2-E22 V22_Non-1 # NET 'V23_Inv' J2-D23 V23_Inv-1 NET 'V23_Non' J2-E23 V23_Non-1 # NET 'V24_Inv' J2-D24 V24_Inv-1 NET 'V24_Non' J2-E24 V24_Non-1 # NET 'V25_Inv' J2-D25 V25_Inv-1 NET 'V25_Non' J2-E25 V25_Non-1 # NET 'V26_Inv' J2-D26 V26_Inv-1 NET 'V26_Non' J2-E26 V26_Non-1 # NET 'V27_Inv' J2-D27 V27_Inv-1 NET 'V27_Non' J2-E27 V27_Non-1 # NET 'V28_Inv' J2-D28 V28_Inv-1 NET 'V28_Non' J2-E28 V28_Non-1 # NET 'V29_Inv' J2-D29 V29_Inv-1 NET 'V29_Non' J2-E29 V29_Non-1 # NET 'V30_Inv' J2-D30 V30_Inv-1 NET 'V30_Non' J2-E30 V30_Non-1 # NET 'V31_Inv' J2-D31 V31_Inv-1 NET 'V31_Non' J2-E31 V31_Non-1 # NET 'V32_Inv' J2-D32 V32_Inv-1 NET 'V32_Non' J2-E32 V32_Non-1 # # NET 'GROUND' V1_Gnd-1 V5_Gnd-1 V10_Gnd-1 V15_Gnd-1 NET 'GROUND' V20_Gnd-1 V25_Gnd-1 V30_Gnd-1 V32_Gnd-1 # # # # # *********************************************************************** # *xxx * # * GROUND connections on TOM's 5 Row J3 Connector * # * * # * The J3 Connector receives the Timing Signal Inputs to TOM on * # * rows "A" and "B". The un-used pins on rows "A" and "B" are all * # * connected to GROUND. * # * * # * The J3 center row has power and ground connections all of which * # * have been made above. * # * * # * All pins on J3 row "D" are connected to GROUND. * # * All pins on J3 row "E" are left unconnected. * # * * # *********************************************************************** # # NET 'GROUND' J3-A1 J3-B1 J3-A3 J3-B3 NET 'GROUND' J3-A5 J3-B5 J3-A7 J3-B7 NET 'GROUND' J3-A9 J3-B9 J3-A11 J3-B11 NET 'GROUND' J3-A13 J3-B13 J3-A15 J3-B15 NET 'GROUND' J3-A17 J3-B17 J3-A19 J3-B19 NET 'GROUND' J3-A21 J3-B21 J3-A23 J3-B23 NET 'GROUND' J3-A25 J3-B25 J3-A27 J3-B27 NET 'GROUND' J3-A29 J3-B29 J3-A31 J3-B31 # NET 'GROUND' J3-D1 J3-D2 J3-D3 J3-D4 NET 'GROUND' J3-D5 J3-D6 J3-D7 J3-D8 NET 'GROUND' J3-D9 J3-D10 J3-D11 J3-D12 NET 'GROUND' J3-D13 J3-D14 J3-D15 J3-D16 NET 'GROUND' J3-D17 J3-D18 J3-D19 J3-D20 NET 'GROUND' J3-D21 J3-D22 J3-D23 J3-D24 NET 'GROUND' J3-D25 J3-D26 J3-D27 J3-D28 NET 'GROUND' J3-D29 J3-D30 J3-D31 J3-D32 # # NET 'NO Connection' J3-E1 J3-E2 J3-E3 J3-E4 # NET 'NO Connection' J3-E5 J3-E6 J3-E7 J3-E8 # NET 'NO Connection' J3-E9 J3-E10 J3-E11 J3-E12 # NET 'NO Connection' J3-E13 J3-E14 J3-E15 J3-E16 # NET 'NO Connection' J3-E17 J3-E18 J3-E19 J3-E20 # NET 'NO Connection' J3-E21 J3-E22 J3-E23 J3-E24 # NET 'NO Connection' J3-E25 J3-E26 J3-E27 J3-E28 # NET 'NO Connection' J3-E29 J3-E30 J3-E31 J3-E32 # # # # # # *********************************************************************** # *xxx * # * Front Panel Timing Signal Output Connectors J6 J7 * # * * # * This is the nets for the Front Panel copies of the Timing * # * Signals. There is both a differential copy of the Timing * # * Signals (via J6 on the TOM board) and a single ended copy * # * (via J7 on the Front Panel) for scope monitoring. * # * * # * This is also the Front Panel power supply voltage Test Point * # * nets, i.e. the Johnson test points and PicoFuses. * # * * # *********************************************************************** # # # Now List the Output from the Timing Signal Line Receivers and the # inputs to the Front Panel Drivers. # NET 'TS_00_INV_FPD' U5-26 J6-2 R120-9 NET 'TS_00_NON_FPD' U5-27 J6-1 R120-1 R124-8 # NET 'TS_01_INV_FPD' U5-3 J6-4 R120-8 NET 'TS_01_NON_FPD' U5-4 J6-3 R120-2 R124-7 # NET 'TS_02_INV_FPD' U5-5 J6-6 R120-7 NET 'TS_02_NON_FPD' U5-6 J6-5 R120-3 R124-6 # NET 'TS_03_INV_FPD' U5-7 J6-8 R120-6 NET 'TS_03_NON_FPD' U5-9 J6-7 R120-4 R124-5 # # NET 'TS_04_INV_FPD' U6-26 J6-10 R121-9 NET 'TS_04_NON_FPD' U6-27 J6-9 R121-1 R125-8 # NET 'TS_05_INV_FPD' U6-3 J6-12 R121-8 NET 'TS_05_NON_FPD' U6-4 J6-11 R121-2 R125-7 # NET 'TS_06_INV_FPD' U6-5 J6-14 R121-7 NET 'TS_06_NON_FPD' U6-6 J6-13 R121-3 R125-6 # NET 'TS_07_INV_FPD' U6-7 J6-16 R121-6 NET 'TS_07_NON_FPD' U6-9 J6-15 R121-4 R125-5 # # NET 'TS_08_INV_FPD' U7-26 J6-18 R122-9 NET 'TS_08_NON_FPD' U7-27 J6-17 R122-1 R126-8 # NET 'TS_09_INV_FPD' U7-3 J6-20 R122-8 NET 'TS_09_NON_FPD' U7-4 J6-19 R122-2 R126-7 # NET 'TS_10_INV_FPD' U7-5 J6-22 R122-7 NET 'TS_10_NON_FPD' U7-6 J6-21 R122-3 R126-6 # NET 'TS_11_INV_FPD' U7-7 J6-24 R122-6 NET 'TS_11_NON_FPD' U7-9 J6-23 R122-4 R126-5 # # NET 'TS_12_INV_FPD' U8-26 J6-26 R123-9 NET 'TS_12_NON_FPD' U8-27 J6-25 R123-1 R127-8 # NET 'TS_13_INV_FPD' U8-3 J6-28 R123-8 NET 'TS_13_NON_FPD' U8-4 J6-27 R123-2 R127-7 # NET 'TS_14_INV_FPD' U8-5 J6-30 R123-7 NET 'TS_14_NON_FPD' U8-6 J6-29 R123-3 R127-6 # NET 'TS_15_INV_FPD' U8-7 J6-32 R123-6 NET 'TS_15_NON_FPD' U8-9 J6-31 R123-4 R127-5 # # NET 'GROUND' J6-33 J6-34 # # # VTT to the Front panel Timing Signal output copy # Pull Down Resistors and their Bypass Capacitors # NET 'VTT' R120-5 R120-10 R121-5 R121-10 NET 'VTT' R122-5 R122-10 R123-5 R123-10 # NET 'VTT' C120-2 C121-1 NET 'GROUND' C120-1 C121-2 # # # Front Panel J7 Single Ended copy of the Timing Signals # for monitoring on a scope # NET 'TS_00_NON_FPS' J7-31 R124-1 NET 'TS_01_NON_FPS' J7-29 R124-2 NET 'TS_02_NON_FPS' J7-27 R124-3 NET 'TS_03_NON_FPS' J7-25 R124-4 # NET 'TS_04_NON_FPS' J7-23 R125-1 NET 'TS_05_NON_FPS' J7-21 R125-2 NET 'TS_06_NON_FPS' J7-19 R125-3 NET 'TS_07_NON_FPS' J7-17 R125-4 # NET 'TS_08_NON_FPS' J7-15 R126-1 NET 'TS_09_NON_FPS' J7-13 R126-2 NET 'TS_10_NON_FPS' J7-11 R126-3 NET 'TS_11_NON_FPS' J7-9 R126-4 # NET 'TS_12_NON_FPS' J7-7 R127-1 NET 'TS_13_NON_FPS' J7-5 R127-2 NET 'TS_14_NON_FPS' J7-3 R127-3 NET 'TS_15_NON_FPS' J7-1 R127-4 # # NET 'GROUND' J7-2 J7-4 J7-6 J7-8 NET 'GROUND' J7-10 J7-12 J7-14 J7-16 NET 'GROUND' J7-18 J7-20 J7-22 J7-24 NET 'GROUND' J7-26 J7-28 J7-30 J7-32 # # # Front Panel Power Supply Voltage Test Points # NET 'VCC_TEST' T5-2 F5-1 NET 'VCC' F5-2 # NET 'VDD_TEST' T4-2 F4-1 NET 'VDD' F4-2 # NET 'VTT_TEST' T3-2 F3-1 NET 'VTT' F3-2 # NET 'VEE_TEST' T2-2 F2-1 NET 'VEE' F2-2 # NET 'GROUND' T1-1 T1-2 # # # # # # *********************************************************************** # *xxx * # * Receive and Display the VME AS* and DTACK* signals * # * * # * This IC, U70 is used to receive the VME AS* signal and the * # * VME DTACK* signal and to send a copy of each of these signals * # * to the front panel where they can be displayed. The four unused * # * sections of U70 are brought out to pins where these inverters * # * may be used for proto type purposes. * # * At the front panel, U92 stretches both the AS* and the DTACK* * # * signals and sends them to LED's for display. * # * The unstretched AS* and DTACK* signals are also routed through * # * driver chip, IC U93, a 74ALS02 then through a 100 Ohm resistor * # * and then AS* to pin #33 and DTACK* to pin #34 of J7 so that * # * they may be monitored on a scope. * # * * # * * # *********************************************************************** # # # The following are the actual signals in and out of U70, a 74ALS04, # all unused sections are tied to vias for wire wrap wiring. # NET 'AS*' U70-13 NET 'DTACK*' U70-1 # NET 'U70_V03' U70-3 U70_V03-1 NET 'U70_V04' U70-4 U70_V04-1 NET 'U70_V05' U70-5 U70_V05-1 NET 'U70_V06' U70-6 U70_V06-1 NET 'U70_V11' U70-11 U70_V11-1 NET 'U70_V10' U70-10 U70_V10-1 NET 'U70_V09' U70-9 U70_V09-1 NET 'U70_V08' U70-8 U70_V08-1 # NET 'GROUND' U70-7 U92-8 U93-7 NET 'VCC' U70-14 U92-16 U93-14 # NET 'GROUND' U92-1 U92-9 U92-14 C110-1 U92-6 C111-2 NET 'VCC' U92-3 U92-11 R110-2 R111-1 # NET 'AS_BUF' U70-12 U92-2 U93-3 U93-5 U93-6 NET 'AS_STRTCH' U92-13 U93-2 NET 'AS_TIME' U92-15 C110-2 R110-1 NET 'AS_LED' U93-1 LED23-3 NET 'AS_LED_UP' LED23-4 R90-2 NET 'AS_MON' U93-4 R115-2 NET 'AS_ST_MON' R115-1 J7-33 # NET 'DTACK_BUF' U70-2 U92-10 U93-11 U93-8 U93-9 NET 'DTACK_STRTCH' U92-5 U93-12 NET 'DTACK_TIME' U92-7 C111-1 R111-2 NET 'DTACK_LED' U93-13 LED23-5 NET 'DTACK_LED_UP' LED23-6 R90-3 NET 'DTACK_MON' U93-10 R116-2 NET 'DTACK_ST_MON' R116-1 J7-34 # # # # # # # *********************************************************************** # *xxx * # * VME SYSRESET and ACFAIL Circuits * # * * # * IC U90, a 74ALS00 debounces the two pushbutton switches that * # * initiate the VME SYSRESET and ACFAIL circuits. These * # * two signals are driven onto the backplane by IC U70, a 74F38. * # * The two picofuses are used as links so that the ability to * # * generate the SYSRESET and ACFAIL can be disabled on a given * # * TOM card. * # * * # *********************************************************************** # # NET 'GROUND' U71-7 U90-7 NET 'VCC' U71-14 U90-14 R90-5 R90-10 # NET 'U71_V04' U71-4 U71_V04-1 NET 'U71_V05' U71-5 U71_V05-1 NET 'U71_V06' U71-6 U71_V06-1 NET 'U71_V08' U71-8 U71_V08-1 NET 'U71_V09' U71-9 U71_V09-1 NET 'U71_V10' U71-10 U71_V10-1 # # NET 'SYSRST*' U71-3 NET 'SYSRST' U71-1 U71-2 U90-2 U90-6 NET 'SYSRST_FF' U90-3 U90-4 NET 'SYSRST_CLR' PB1-2 U90-1 R90-9 NET 'SYSRST_SWT' PB1-4 F6-1 NET 'SYSRST_SET' F6-2 U90-5 R90-8 NET 'GROUND' PB1-1 PB1-3 # # NET 'ACFAIL*' U71-11 NET 'ACFAIL' U71-12 U71-13 U90-8 U90-12 NET 'ACFAIL_FF' U90-10 U90-11 NET 'ACFAIL_CLR' PB2-2 U90-13 R90-6 NET 'ACFAIL_SWT' PB2-4 F7-1 NET 'ACFAIL_SET' F7-2 U90-9 R90-7 NET 'GROUND' PB2-1 PB2-3 # # # # # # *********************************************************************** # *xxx * # * LED Display Power OK and Proto-Type * # * * # * This section contains the nets for all of LED displays except * # * for the VME AS* and VME DTACK* * # * * # * This section also contains the nets for all of the bypass * # * capacitors in the vicinity of the Front Panel. * # * * # *********************************************************************** # # +5.0 Volts OK LED # NET 'GROUND' LED13-1 NET 'OK_VCC' LED13-2 R90-1 # # # +3.3 Volts OK LED # NET 'GROUND' LED13-3 NET 'OK_VDD' LED13-4 R92-1 NET 'VDD' R92-2 # # # -2.0 Volts OK LED # NET 'GROUND' LED13-6 NET 'OK_VTT' LED13-5 R93-1 R94-1 NET 'VTT' R93-2 R94-2 # # # -4.5 Volts OK LED # NET 'GROUND' LED23-2 NET 'OK_VEE' LED23-1 R95-1 NET 'VEE' R95-2 # # # Proto-Type Display #1 # NET 'PT1_UP' LED33-2 R91-1 NET 'PT1' LED33-1 U91-2 NET 'PT1_IN' U91-1 R101-2 V101-1 NET 'GROUND' R101-1 # # Proto-Type Display #2 # NET 'PT2_UP' LED33-4 R91-2 NET 'PT2' LED33-3 U91-4 NET 'PT2_IN' U91-3 R102-2 V102-1 NET 'GROUND' R102-1 # # Proto-Type Display #3 # NET 'PT3_UP' LED33-6 R91-3 NET 'PT3' LED33-5 U91-6 NET 'PT3_IN' U91-5 R103-2 V103-1 NET 'GROUND' R103-1 # # Proto-Type Display #4 # NET 'PT4_UP' LED43-2 R91-8 NET 'PT4' LED43-1 U91-8 NET 'PT4_IN' U91-9 R104-2 V104-1 NET 'GROUND' R104-1 # # Proto-Type Display #5 # NET 'PT5_UP' LED43-4 R91-7 NET 'PT5' LED43-3 U91-10 NET 'PT5_IN' U91-11 R105-2 V105-1 NET 'GROUND' R105-1 # # Proto-Type Display #6 # NET 'PT6_UP' LED43-6 R91-6 NET 'PT6' LED43-5 U91-12 NET 'PT6_IN' U91-13 R106-2 V106-1 NET 'GROUND' R106-1 # # NET 'VCC' U91-14 R91-5 R91-10 NET 'GROUND' U91-7 # # Front Panel vicinity bypass capacitors. # NET 'GROUND' C130-1 C131-1 C132-1 C133-1 C134-1 NET 'VCC' C130-2 C133-2 C134-2 NET 'VEE' C131-2 NET 'VTT' C132-2 # # # # # # *********************************************************************** # *xxx * # * ECL HI - LOW Level Generator * # * * # * This section contains the nets for the resistor network that * # * makes ECL HI and LOW logic levels. * # * * # *********************************************************************** # # NET 'GROUND' R151-5 C150-2 NET 'VTT' R150-1 C150-1 # NET 'ECL_LOW' R150-2 R151-8 V150-1 NET 'ECL_MID' R151-1 R151-2 NET 'ECL_HI' R151-7 R151-6 V151-1 NET 'ECL_SUP' R151-3 R151-4 # # # # # *********************************************************************** # *xxx * # * Fisrt 100398 ECL <---> TTL Translator Circuit * # * * # * This section contains the nets for the "fist" ECL <--> TTL * # * translator circuit in the proto type area. * # * * # *********************************************************************** # # NET 'GROUND' U160-1 U160-2 U160-8 U160-11 U160-15 NET 'GROUND' U160-16 U160-20 U160-22 U160-28 # NET 'VEE' U160-3 U160-27 NET 'VCC' U160-14 U160-17 # NET 'ETT1-E2' U160-4 R160-3 V160-1 NET 'ETT1-E2*' U160-5 R160-4 V161-1 NET 'ETT1-E3' U160-6 R160-5 V162-1 NET 'ETT1-E3*' U160-7 R160-6 V163-1 # NET 'ETT1-E1' U160-26 R161-3 V164-1 NET 'ETT1-E1*' U160-25 R161-4 V165-1 NET 'ETT1-E0' U160-24 R161-5 V166-1 NET 'ETT1-E0*' U160-23 R161-6 V167-1 # NET 'ETT1-T3' U160-12 V172-1 NET 'ETT1-T2' U160-13 V173-1 NET 'ETT1-T1' U160-18 V174-1 NET 'ETT1-T0' U160-19 V175-1 # NET 'ETT1-OE' U160-9 V170-1 NET 'ETT1-DIR' U160-10 V171-1 NET 'ETT1-LE' U160-21 V176-1 # NET 'GROUND' V177-1 NET 'VTT' V178-1 NET 'VCC' V179-1 # NET 'VTT' R160-1 R161-1 # NET 'GROUND' C160-2 C161-1 C162-1 NET 'VEE' C160-1 NET 'VTT' C161-2 NET 'VCC' C162-2 # # # # # *********************************************************************** # *xxx * # * Second 100398 ECL <---> TTL Translator Circuit * # * * # * This section contains the nets for the "fist" ECL <--> TTL * # * translator circuit in the proto type area. * # * * # *********************************************************************** # # NET 'GROUND' U180-1 U180-2 U180-8 U180-11 U180-15 NET 'GROUND' U180-16 U180-20 U180-22 U180-28 # NET 'VEE' U180-3 U180-27 NET 'VCC' U180-14 U180-17 # NET 'ETT2-E2' U180-4 R180-3 V180-1 NET 'ETT2-E2*' U180-5 R180-4 V181-1 NET 'ETT2-E3' U180-6 R180-5 V182-1 NET 'ETT2-E3*' U180-7 R180-6 V183-1 # NET 'ETT2-E1' U180-26 R181-3 V184-1 NET 'ETT2-E1*' U180-25 R181-4 V185-1 NET 'ETT2-E0' U180-24 R181-5 V186-1 NET 'ETT2-E0*' U180-23 R181-6 V187-1 # NET 'ETT2-T3' U180-12 V192-1 NET 'ETT2-T2' U180-13 V193-1 NET 'ETT2-T1' U180-18 V194-1 NET 'ETT2-T0' U180-19 V195-1 # NET 'ETT2-OE' U180-9 V190-1 NET 'ETT2-DIR' U180-10 V191-1 NET 'ETT2-LE' U180-21 V196-1 # NET 'GROUND' V197-1 NET 'VTT' V198-1 NET 'VCC' V199-1 # NET 'VTT' R180-1 R181-1 # NET 'GROUND' C180-2 C181-1 C182-1 NET 'VEE' C180-1 NET 'VTT' C181-2 NET 'VCC' C182-2 # # # # # # *********************************************************************** # *xxx * # * First UNIVERSAL 28PCC Foot Print * # * * # * This section contains the nets for the "fist" UNIVERSAL 28PCC * # * foot print section. * # * * # *********************************************************************** # # NET 'U200-01_TO_VIA' U200-1 V201-1 NET 'U200-02_TO_VIA' U200-2 V202-1 NET 'U200-03_TO_VIA' U200-3 V203-1 NET 'U200-04_TO_VIA' U200-4 V204-1 NET 'U200-05_TO_VIA' U200-5 V205-1 NET 'U200-06_TO_VIA' U200-6 V206-1 NET 'U200-07_TO_VIA' U200-7 V207-1 NET 'U200-08_TO_VIA' U200-8 V208-1 NET 'U200-09_TO_VIA' U200-9 V209-1 NET 'U200-10_TO_VIA' U200-10 V210-1 NET 'U200-11_TO_VIA' U200-11 V211-1 NET 'U200-12_TO_VIA' U200-12 V212-1 NET 'U200-13_TO_VIA' U200-13 V213-1 NET 'U200-14_TO_VIA' U200-14 V214-1 NET 'U200-15_TO_VIA' U200-15 V215-1 NET 'U200-16_TO_VIA' U200-16 V216-1 NET 'U200-17_TO_VIA' U200-17 V217-1 NET 'U200-18_TO_VIA' U200-18 V218-1 NET 'U200-19_TO_VIA' U200-19 V219-1 NET 'U200-20_TO_VIA' U200-20 V220-1 NET 'U200-21_TO_VIA' U200-21 V221-1 NET 'U200-22_TO_VIA' U200-22 V222-1 NET 'U200-23_TO_VIA' U200-23 V223-1 NET 'U200-24_TO_VIA' U200-24 V224-1 NET 'U200-25_TO_VIA' U200-25 V225-1 NET 'U200-26_TO_VIA' U200-26 V226-1 NET 'U200-27_TO_VIA' U200-27 V227-1 NET 'U200-28_TO_VIA' U200-28 V228-1 # NET 'R200-03_TO_VIA' R200-3 V230-1 NET 'R200-04_TO_VIA' R200-4 V231-1 NET 'R200-05_TO_VIA' R200-5 V232-1 NET 'R200-06_TO_VIA' R200-6 V233-1 # NET 'R201-03_TO_VIA' R201-3 V234-1 NET 'R201-04_TO_VIA' R201-4 V235-1 NET 'R201-05_TO_VIA' R201-5 V236-1 NET 'R201-06_TO_VIA' R201-6 V237-1 # NET 'VTT' R200-1 R201-1 V239-1 # NET 'GROUND' C200-1 C201-1 C202-1 V238-1 NET 'VEE' C200-2 NET 'VTT' C201-2 NET 'VCC' C202-2 # # # # # # *********************************************************************** # *xxx * # * Second UNIVERSAL 28PCC Foot Print * # * * # * This section contains the nets for the "second" UNIVERSAL * # * 28PCC foot print section. * # * * # *********************************************************************** # # NET 'U250-01_TO_VIA' U250-1 V251-1 NET 'U250-02_TO_VIA' U250-2 V252-1 NET 'U250-03_TO_VIA' U250-3 V253-1 NET 'U250-04_TO_VIA' U250-4 V254-1 NET 'U250-05_TO_VIA' U250-5 V255-1 NET 'U250-06_TO_VIA' U250-6 V256-1 NET 'U250-07_TO_VIA' U250-7 V257-1 NET 'U250-08_TO_VIA' U250-8 V258-1 NET 'U250-09_TO_VIA' U250-9 V259-1 NET 'U250-10_TO_VIA' U250-10 V260-1 NET 'U250-11_TO_VIA' U250-11 V261-1 NET 'U250-12_TO_VIA' U250-12 V262-1 NET 'U250-13_TO_VIA' U250-13 V263-1 NET 'U250-14_TO_VIA' U250-14 V264-1 NET 'U250-15_TO_VIA' U250-15 V265-1 NET 'U250-16_TO_VIA' U250-16 V266-1 NET 'U250-17_TO_VIA' U250-17 V267-1 NET 'U250-18_TO_VIA' U250-18 V268-1 NET 'U250-19_TO_VIA' U250-19 V269-1 NET 'U250-20_TO_VIA' U250-20 V270-1 NET 'U250-21_TO_VIA' U250-21 V271-1 NET 'U250-22_TO_VIA' U250-22 V272-1 NET 'U250-23_TO_VIA' U250-23 V273-1 NET 'U250-24_TO_VIA' U250-24 V274-1 NET 'U250-25_TO_VIA' U250-25 V275-1 NET 'U250-26_TO_VIA' U250-26 V276-1 NET 'U250-27_TO_VIA' U250-27 V277-1 NET 'U250-28_TO_VIA' U250-28 V278-1 # NET 'R250-03_TO_VIA' R250-3 V280-1 NET 'R250-04_TO_VIA' R250-4 V281-1 NET 'R250-05_TO_VIA' R250-5 V282-1 NET 'R250-06_TO_VIA' R250-6 V283-1 # NET 'R251-03_TO_VIA' R251-3 V284-1 NET 'R251-04_TO_VIA' R251-4 V285-1 NET 'R251-05_TO_VIA' R251-5 V286-1 NET 'R251-06_TO_VIA' R251-6 V287-1 # NET 'VTT' R250-1 R251-1 V289-1 # NET 'GROUND' C250-1 C251-1 C252-1 V288-1 NET 'VEE' C250-2 NET 'VTT' C251-2 NET 'VCC' C252-2 # # # # # # *********************************************************************** # *xxx * # * Power and Ground Nets for the UNIVERSAL 28PCC Foot Print * # * * # * This section contains the Power and Ground Via nets for the * # * both of the UNIVERSAL 28PCC foot print sections. * # * * # *********************************************************************** # # Top and Bottom Power and Grounds # NET 'GROUND' V301-1 V303-1 V305-1 V311-1 V313-1 V315-1 NET 'GROUND' V321-1 V323-1 V325-1 V331-1 V333-1 V335-1 NET 'VCC' V300-1 V306-1 V310-1 V316-1 NET 'VCC' V320-1 V326-1 V330-1 V336-1 NET 'VEE' V302-1 V304-1 V312-1 V314-1 NET 'VEE' V322-1 V324-1 V332-1 V334-1 # # Side Power and Grounds # NET 'GROUND' V340-1 V343-1 V346-1 V350-1 V353-1 V356-1 NET 'GROUND' V360-1 V363-1 V366-1 NET 'VCC' V341-1 V345-1 V351-1 V355-1 NET 'VCC' V361-1 V365-1 NET 'VEE' V342-1 V344-1 V352-1 V354-1 NET 'VEE' V362-1 V364-1 # # # # # *********************************************************************** # *xxx * # * NETS for the 50 MHz Crystal Oscillator * # * * # * This section contains the nets for the 50 MHz Crystal Oscillator. * # * * # *********************************************************************** # NET 'GROUND' U370-2 C370-1 V371-1 NET 'VCC' U370-4 C370-2 NET 'OSC_OUT' U370-3 V370-1 # # # # # *********************************************************************** # *xxx * # * Signal Power and Ground Nets for the DIP Foot Print Area * # * * # * This section contains the nets for the seven 20_DIP Foot prints. * # * * # *********************************************************************** # # Signal Nets for U381 # NET 'U381_P01' U381-1 V4101-1 NET 'U381_P02' U381-2 V4102-1 NET 'U381_P03' U381-3 V4103-1 NET 'U381_P04' U381-4 V4104-1 NET 'U381_P05' U381-5 V4105-1 NET 'U381_P06' U381-6 V4106-1 NET 'U381_P07' U381-7 V4107-1 NET 'U381_P08' U381-8 V4108-1 NET 'U381_P09' U381-9 V4109-1 NET 'U381_P10' U381-10 V4110-1 NET 'U381_P11' U381-11 V4111-1 NET 'U381_P12' U381-12 V4112-1 NET 'U381_P13' U381-13 V4113-1 NET 'U381_P14' U381-14 V4114-1 NET 'U381_P15' U381-15 V4115-1 NET 'U381_P16' U381-16 V4116-1 NET 'U381_P17' U381-17 V4117-1 NET 'U381_P18' U381-18 V4118-1 NET 'U381_P19' U381-19 V4119-1 NET 'U381_P20' U381-20 V4120-1 # # Power-Ground Nets for U381 # NET 'GROUND' V4132-1 V4134-1 NET 'VCC' V4131-1 V4135-1 NET 'VEE' V4133-1 # # Signal Nets for U382 # NET 'U382_P01' U382-1 V4201-1 NET 'U382_P02' U382-2 V4202-1 NET 'U382_P03' U382-3 V4203-1 NET 'U382_P04' U382-4 V4204-1 NET 'U382_P05' U382-5 V4205-1 NET 'U382_P06' U382-6 V4206-1 NET 'U382_P07' U382-7 V4207-1 NET 'U382_P08' U382-8 V4208-1 NET 'U382_P09' U382-9 V4209-1 NET 'U382_P10' U382-10 V4210-1 NET 'U382_P11' U382-11 V4211-1 NET 'U382_P12' U382-12 V4212-1 NET 'U382_P13' U382-13 V4213-1 NET 'U382_P14' U382-14 V4214-1 NET 'U382_P15' U382-15 V4215-1 NET 'U382_P16' U382-16 V4216-1 NET 'U382_P17' U382-17 V4217-1 NET 'U382_P18' U382-18 V4218-1 NET 'U382_P19' U382-19 V4219-1 NET 'U382_P20' U382-20 V4220-1 # # Power-Ground Nets for U382 # NET 'GROUND' V4232-1 V4234-1 NET 'VCC' V4231-1 V4235-1 NET 'VEE' V4233-1 # # Signal Nets for U383 # NET 'U383_P01' U383-1 V4301-1 NET 'U383_P02' U383-2 V4302-1 NET 'U383_P03' U383-3 V4303-1 NET 'U383_P04' U383-4 V4304-1 NET 'U383_P05' U383-5 V4305-1 NET 'U383_P06' U383-6 V4306-1 NET 'U383_P07' U383-7 V4307-1 NET 'U383_P08' U383-8 V4308-1 NET 'U383_P09' U383-9 V4309-1 NET 'U383_P10' U383-10 V4310-1 NET 'U383_P11' U383-11 V4311-1 NET 'U383_P12' U383-12 V4312-1 NET 'U383_P13' U383-13 V4313-1 NET 'U383_P14' U383-14 V4314-1 NET 'U383_P15' U383-15 V4315-1 NET 'U383_P16' U383-16 V4316-1 NET 'U383_P17' U383-17 V4317-1 NET 'U383_P18' U383-18 V4318-1 NET 'U383_P19' U383-19 V4319-1 NET 'U383_P20' U383-20 V4320-1 # # Power-Ground Nets for U383 # NET 'GROUND' V4331-1 V4333-1 V4335-1 NET 'VCC' V4334-1 NET 'VEE' V4332-1 # # Signal Nets for U384 # NET 'U384_P01' U384-1 V4401-1 NET 'U384_P02' U384-2 V4402-1 NET 'U384_P03' U384-3 V4403-1 NET 'U384_P04' U384-4 V4404-1 NET 'U384_P05' U384-5 V4405-1 NET 'U384_P06' U384-6 V4406-1 NET 'U384_P07' U384-7 V4407-1 NET 'U384_P08' U384-8 V4408-1 NET 'U384_P09' U384-9 V4409-1 NET 'U384_P10' U384-10 V4410-1 NET 'U384_P11' U384-11 V4411-1 NET 'U384_P12' U384-12 V4412-1 NET 'U384_P13' U384-13 V4413-1 NET 'U384_P14' U384-14 V4414-1 NET 'U384_P15' U384-15 V4415-1 NET 'U384_P16' U384-16 V4416-1 NET 'U384_P17' U384-17 V4417-1 NET 'U384_P18' U384-18 V4418-1 NET 'U384_P19' U384-19 V4419-1 NET 'U384_P20' U384-20 V4420-1 # # Power-Ground Nets for U384 # NET 'GROUND' V4431-1 V4433-1 V4435-1 NET 'VCC' V4432-1 NET 'VEE' V4434-1 # # Signal Nets for U385 # NET 'U385_P01' U385-1 V4501-1 NET 'U385_P02' U385-2 V4502-1 NET 'U385_P03' U385-3 V4503-1 NET 'U385_P04' U385-4 V4504-1 NET 'U385_P05' U385-5 V4505-1 NET 'U385_P06' U385-6 V4506-1 NET 'U385_P07' U385-7 V4507-1 NET 'U385_P08' U385-8 V4508-1 NET 'U385_P09' U385-9 V4509-1 NET 'U385_P10' U385-10 V4510-1 NET 'U385_P11' U385-11 V4511-1 NET 'U385_P12' U385-12 V4512-1 NET 'U385_P13' U385-13 V4513-1 NET 'U385_P14' U385-14 V4514-1 NET 'U385_P15' U385-15 V4515-1 NET 'U385_P16' U385-16 V4516-1 NET 'U385_P17' U385-17 V4517-1 NET 'U385_P18' U385-18 V4518-1 NET 'U385_P19' U385-19 V4519-1 NET 'U385_P20' U385-20 V4520-1 # # Power-Ground Nets for U385 # NET 'GROUND' V4532-1 V4534-1 NET 'VCC' V4531-1 V4535-1 NET 'VEE' V4533-1 # # Signal Nets for U386 # NET 'U386_P01' U386-1 V4601-1 NET 'U386_P02' U386-2 V4602-1 NET 'U386_P03' U386-3 V4603-1 NET 'U386_P04' U386-4 V4604-1 NET 'U386_P05' U386-5 V4605-1 NET 'U386_P06' U386-6 V4606-1 NET 'U386_P07' U386-7 V4607-1 NET 'U386_P08' U386-8 V4608-1 NET 'U386_P09' U386-9 V4609-1 NET 'U386_P10' U386-10 V4610-1 NET 'U386_P11' U386-11 V4611-1 NET 'U386_P12' U386-12 V4612-1 NET 'U386_P13' U386-13 V4613-1 NET 'U386_P14' U386-14 V4614-1 NET 'U386_P15' U386-15 V4615-1 NET 'U386_P16' U386-16 V4616-1 NET 'U386_P17' U386-17 V4617-1 NET 'U386_P18' U386-18 V4618-1 NET 'U386_P19' U386-19 V4619-1 NET 'U386_P20' U386-20 V4620-1 # # Power-Ground Nets for U386 # NET 'GROUND' V4632-1 V4634-1 NET 'VCC' V4631-1 V4635-1 NET 'VEE' V4633-1 # # Signal Nets for U387 # NET 'U387_P01' U387-1 V4701-1 NET 'U387_P02' U387-2 V4702-1 NET 'U387_P03' U387-3 V4703-1 NET 'U387_P04' U387-4 V4704-1 NET 'U387_P05' U387-5 V4705-1 NET 'U387_P06' U387-6 V4706-1 NET 'U387_P07' U387-7 V4707-1 NET 'U387_P08' U387-8 V4708-1 NET 'U387_P09' U387-9 V4709-1 NET 'U387_P10' U387-10 V4710-1 NET 'U387_P11' U387-11 V4711-1 NET 'U387_P12' U387-12 V4712-1 NET 'U387_P13' U387-13 V4713-1 NET 'U387_P14' U387-14 V4714-1 NET 'U387_P15' U387-15 V4715-1 NET 'U387_P16' U387-16 V4716-1 NET 'U387_P17' U387-17 V4717-1 NET 'U387_P18' U387-18 V4718-1 NET 'U387_P19' U387-19 V4719-1 NET 'U387_P20' U387-20 V4720-1 # # Power-Ground Nets for U387 # NET 'GROUND' V4731-1 V4733-1 V4735-1 NET 'VCC' V4734-1 NET 'VEE' V4732-1 # # Bypass capacitor nets for the 20_DIP foot print proto type area # NET 'GROUND' C381-1 C382-1 C383-1 C384-1 C385-1 NET 'VCC' C381-2 C383-2 C385-2 NET 'VEE' C382-2 C384-2 # # # #