Run II Trailer Sheets --------------------- Term Receiver Module Original: 16-JUN-1998 Latest: 1-MAR-2000 ======================================================================== Card Type: TRM Rev. Date of this Entry: 25-JUN-1998 S/N: 01 Final Assembly/Check-in: 17-JUN-1998 by Dan/Kirsten Testing: Download/VME Access: 17-JUN-1998 Connectivity: 17-JUN-1998 Single-Chance: ----------- Repairs: On 25-JUN-1998 the card would not configure its FPGA's. Remove the solder bridge between pins 121 and 122 on FPGA #7. This card had previously passed CT. Was this bridge caused when the 74FCT164245T was removed. Notes: Card has had its 74 FCT 164245 T pulled off. 25-JUN-1998 retested and passed connectivity test. ======================================================================== Card Type: TRM Rev. Date of this Entry: 22-JUN-1998 S/N: 02 Final Assembly/Check-in: 17-JUN-1998 by Dan/Kirsten Testing: Download/VME Access: 17-JUN-1998 Connectivity: 18-JUN-1998 Single-Chance: ----------- Repairs: Found FPGA #7 had pins 177 and 178 (OCB_Data_0 and HSRO_Data_0) solder bridged together, VME FPGA needed pin 134 re-soldered, FPGA #7 needed pin 175 re-soldered, re-solder part of FPGA #7 pins 61:120, FPGA #8 needed pin 239 re-soldered, re-solder all of FPGA #8 pins 121:180. Still could not configure FPGA #8, all other FPGA's configure OK. Find solder bridge on FPGA #13 between pins 175,176. Now all FPGA's configure but can not pass CT. FPGA #2 pin 12 bent over into pin 11. FPGA #4 pins 58 and 59 shorted. And finally FPGA #11 pins 239 shorted to pin 240. Now it tentatively passes CT. Notes: Initially failed connectivity test. It was though that this card's 74FCT164245T had survived operating with poser supplies that did not keep Vcc at least as positive as a diode drop below Vdd. When switched to operating with such supplies this card's 74FCT164245T no longer got hot but when drying to access registers in the 8990 it had a bit stuck low (read back f7ff instead of ffff). Card has had its 74 FCT 164245 T pulled off. 25-JUN-1998 retested and passed connectivity test (4 errors were found on one loop, but 2 million further loops did not produce any more errors). ======================================================================== Card Type: TRM Rev. Date of this Entry: 1-MAR-2000 S/N: 03 Final Assembly/Check-in: 17-JUN-1998 by Dan/Kirsten Testing: Download/VME Access: 17-JUN-1998 Connectivity: 17-JUN-1998 Single-Chance: ----------- Repairs: Notes: Card has had its 74 FCT 164245 T pulled off. 25-JUN-1998 retested and passed connectivity test. 1-MAR-2000 modified for use in L2 FW connected VME P187 (via J201) to BSF P65 (BG_IO(0)) installed 56-ohm 6-pin pulldown resistors in sites R154 and R155 ======================================================================== Card Type: TRM Rev. Date of this Entry: 20-JUN-1998 S/N: 04 Final Assembly/Check-in: 17-JUN-1998 by Dan/Kirsten Testing: Download/VME Access: 17-JUN-1998 Connectivity: 17-JUN-1998 Single-Chance: ----------- Repairs: Notes: Initially showed approximately 50 Ohms between VDD and ground. Applied power (current limited) and the problem disappeared. Card has had its 74 FCT 164245 T pulled off. 25-JUN-1998 retested and passed connectivity test. ======================================================================== Card Type: TRM Rev. Date of this Entry: 20-JUN-1998 S/N: 05 Final Assembly/Check-in: 17-JUN-1998 by Dan/Kirsten Testing: Download/VME Access: 17-JUN-1998 Connectivity: 17-JUN-1998 Single-Chance: ----------- Repairs: Notes: Card has had its 74 FCT 164245 T pulled off. 25-JUN-1998 retested and passed connectivity test. ======================================================================== Card Type: TRM Rev. Date of this Entry: 22-JUL-1999 S/N: 06 Final Assembly/Check-in: 17-JUN-1998 by Dan/Kirsten Testing: Download/VME Access: 17-JUN-1998 Connectivity: 17-JUN-1998 Single-Chance: ----------- Repairs: 7-APR-1999 Kirsten: unused CMOS inputs ECO bridged pins 11, 12, 13 on U44 Notes: Some connection between VCC and ground (not a hard short), but the card seems to work fine. Card has had its 74 FCT 164245 T pulled off. 25-JUN-1998 retested and passed connectivity test. Now that the 74FCT164245T has been removed there is not longer a Vcc to Gnd connection shown during the standard Fluke shorts check. 15-JAN-1999: On MSA FPGA 5, OCB_Data bits 14 and 15 appear stuck low. 22-JUL-1999: Tried using this TRM in the MSU Test FW as the Individual Disable input TRM. Single Chance Test worked just fine just so long as we did not "Include Scalers". The scaler for Term #7 screwed up. Details are in TRICS log file: logfile_990722_V60.Log;3. We switched to using TRM SN#01 in the MSU Test FW and then SCT ran fine with Scalers. ======================================================================== Card Type: TRM Rev. Date of this Entry: 20-JUN-1998 S/N: 07 Final Assembly/Check-in: 16-JUN-1998 by Steve/Kirsten Testing: Download/VME Access: 17-JUN-1998 Connectivity: 17-JUN-1998 Single-Chance: ----------- Repairs: Initially failed CT with a problem in HSRO_8 getting from FPGA #12 up to BSF. Re-Soldered all of FPGA #12 pins 121:180. Now tentatively passes CT. Notes: Initially failed connectivity test. Card has had its 74 FCT 164245 T pulled off. 25-JUN-1998 retested and passed connectivity test. ======================================================================== Card Type: TRM Rev. Date of this Entry: 28-JAN-1999 S/N: 08 Final Assembly/Check-in: 16-JUN-1998 by Steve/Kirsten Testing: Download/VME Access: 17-JUN-1998 Connectivity: 17-JUN-1998 Single-Chance: ----------- Repairs: On 24-JUN-1998 removed a solder bridge between pins 121-122. This bridge was probably made when the 74FCT164245T was removed. 28-JAN-1999 This card was and continues to be in use in slot #3 top crate M123. It was noticed that some pins on the BSF FGPA were bent. Pins 115:120 on the BSF were straightened and this card was returned to service. Notes: Card has had its 74 FCT 164245 T pulled off. 24-JUN-1998 retested and passed connectivity test. ======================================================================== Card Type: TRM Rev. Date of this Entry: 28-JAN-1999 S/N: 09 Final Assembly/Check-in: 3-JULY-1998 by Dan Testing: Download/VME Access: 3-JULY-1998 Connectivity: 3-JULY-1998 Single-Chance: ----------- Repairs: 28-JAN-1999 This card was and continues to be in use in slot #2 top crate M123. It was noticed that some pins on the BSF FGPA were bent. Pins 114:120 on the BSF were straightened. Pin 120 was very beaten up and needed to be re-soldered. This card was returned to service. Notes: This card has two bad scratches on its solder side. One of these scratches is especially bad and actually apears to have cut a solder side trace. Ohm meter says that it is OK. I put a drop of supper glue over the worst spot. 2-JULY-1998 ======================================================================== Card Type: TRM Rev. Date of this Entry: 2-JULY-1998 S/N: 10 Final Assembly/Check-in: 1-JULY-1998 by Kirsten Testing: Download/VME Access: 2-JULY-1998 Connectivity: 2-JULY-1998 Single-Chance: ----------- Repairs: Notes: ======================================================================== Card Type: TRM Rev. Date of this Entry: 2-JULY-1998 S/N: 11 Final Assembly/Check-in: 1-JULY-1998 by Kirsten Testing: Download/VME Access: 2-JULY-1998 Connectivity: 2-JULY-1998 Single-Chance: ----------- Repairs: At first it did not pass CT. Failed P5 Glb IO bit 8 which is pin 104 on the BSF FPGA. Found that a group of pins along the top row of the BSF FPGA had been smashed in. Pins 104 through 115 were straightened and this area re-soldered. Notes: ======================================================================== Card Type: TRM Rev. Date of this Entry: 2-JULY-1998 S/N: 12 Final Assembly/Check-in: 1-JULY-1998 by Kirsten Testing: Download/VME Access: 2-JULY-1998 Connectivity: 2-JULY-1998 Single-Chance: ----------- Repairs: Notes: ======================================================================== Card Type: TRM Rev. Date of this Entry: 3-JULY-1998 S/N: 13 Final Assembly/Check-in: 1-JULY-1998 by Kirsten Testing: Download/VME Access: 3-JULY-1998 Connectivity: 3-JULY-1998 Single-Chance: ----------- Repairs: At first it did not pass CT. FPGA #4 would not load. Pins along the top edge of the BSF FPGA had been smashed in and shorted. Straightened these pins with breaking any solder joints. The On-Card-Bus side of FPGA #4 had two or 3 solder bridge shorts. Cut these with exacto. Notes: ======================================================================== Card Type: TRM Rev. Date of this Entry: 20-JUN-1998 S/N: 14 Final Assembly/Check-in: 16-JUN-1998 by Kirsten Testing: Download/VME Access: 16-JUN-1998 Connectivity: 16-JUN-1998 Single-Chance: ----------- Repairs: Notes: Card has had its 74 FCT 164245 T pulled off. 24-JUN-1998 retested and passed connectivity test. ======================================================================== Card Type: TRM Rev. Date of this Entry: 7-JUL-1999 S/N: 15 Final Assembly/Check-in: 12-AUG-1998 by Kirsten Testing: Download/VME Access: ___________ Connectivity: ___________ Single-Chance: ----------- Repairs: 19-JAN-1999 Steve/Kirsten: resolder MSA FPGA 10 pin 120 (plus neighboring pins) 25-JAN-199 Kirsten: unused CMOS inputs ECO bridged pins 11, 12, 13 on U44 Notes: FPGA's: BSF and Main Array 1, 4, 8 are the wrong type. They are XC5215 instead of XC4028XL. ======================================================================== Card Type: TRM Rev. Date of this Entry: 1-MAR-2000 S/N: 16 Final Assembly/Check-in: 12-AUG-1998 by Kirsten Testing: Download/VME Access: 7-APR-1999 Connectivity: 7-APR-1999 Single-Chance: ----------- Repairs: 19-JAN-1999 Steve/Kirsten: Resolder MSA FPGA 5 pins 181-220 Also removed solder bridges on U34: pins 20 and 21, pins 16 and 17 25-JAN-199 Kirsten: unused CMOS inputs ECO bridged pins 11, 12, 13 on U44 Notes: 1-MAR-2000 modified for use in L2 FW connected VME P187 (via J201) to BSF P65 (BG_IO(0)) installed 56-ohm 6-pin pulldown resistors in sites R154 and R155 ======================================================================== Card Type: TRM Rev. Date of this Entry: 7-APR-1999 S/N: 17 Final Assembly/Check-in: 14-JUL-1998 by Kirsten Testing: Download/VME Access: 7-APR-1999 Connectivity: 7-APR-1999 Single-Chance: ----------- Repairs: 19-JAN-1999 Steve/Kirsten: remove solder bridge on BSF FPGA pins 1-2 25-JAN-199 Kirsten: unused CMOS inputs ECO bridged pins 11, 12, 13 on U44 Notes: ======================================================================== Card Type: TRM Rev. Date of this Entry: 1-JUL-1999 S/N: 18 Final Assembly/Check-in: 14-JUL-1998 by Kirsten Testing: Download/VME Access: 1-JUL-1999 Connectivity: 1-JUL-1999 Single-Chance: ----------- Repairs: 25-JAN-199 Kirsten: unused CMOS inputs ECO bridged pins 11, 12, 13 on U44 1-JUL-1999 DE Resoldered FPGA #13 pins 1:60. Lots of unsoldered stuff in the 20's and 50's. Remove solder bridge at FPGA #5 pins 188-189 Notes: 1-JUL-1999 DE FPGA #4 pins 173:180 are bent up badly. I did not try to straighten them. All is working OK so I put a drop of super glue on them to stablize them in their current positions. ======================================================================== Card Type: TRM Rev. Date of this Entry: 1-JUL-1999 S/N: 19 Final Assembly/Check-in: 14-JUL-1998 by Kirsten Testing: Download/VME Access: 12-AUG-1998 Connectivity: 12-AUG-1998 Single-Chance: ----------- Repairs: 25-JAN-199 Kirsten: unused CMOS inputs ECO bridged pins 11, 12, 13 on U44 Notes: This card has a problem waking up. It occurs very rarely at 50 MHz, but basically all the time at 60 MHz. 1-JUL-1999 The card is passing single card connectivity test OK so we will try using it in the MSU Test FW. ======================================================================== Card Type: TRM Rev. Date of this Entry: 1-JUL-1999 S/N: 20 Final Assembly/Check-in: 14-JUL-1998 by Kirsten Testing: Download/VME Access: 1-JUL-1999 Connectivity: 1-JUL-1999 Single-Chance: ----------- Repairs: 19-JAN-1999 Steve/Kirsten: resolder MSA FPGA 15 pin 52 (and neighbors) resolder MSA FPGA 15 pins 61-100 25-JAN-1999 Kirsten: unused CMOS inputs ECO bridged pins 11, 12, 13 on U44 1-JUL-1999 DE solder FPGA #15 pins 160 through 180. Notes: Pad delaminated: MSA FPGA 15 pin 42. This is an unused user I/O pin. Loss of this pad leaves the card functional but this card should still remain at MSU if possible. ======================================================================== Card Type: TRM Rev. Date of this Entry: 1-JUL-1998 S/N: 21 Final Assembly/Check-in: 14-JUL-1998 by Kirsten Testing: Download/VME Access: 1-JUL-1999 Connectivity: 1-JUL-1999 Single-Chance: ----------- Repairs: 25-JAN-1999 Kirsten: unused CMOS inputs ECO bridged pins 11, 12, 13 on U44 1-JUL-1999 DE Removed shorts from VME FPGA pins 1-2 and 63-64 and from FPGA #2 pins 181-182 Notes: ======================================================================== Card Type: TRM Rev. Date of this Entry: 14-JUL-1998 S/N: 22 Final Assembly/Check-in: 14-JUL-1998 by Kirsten Testing: Download/VME Access: 12-AUG-1998 Connectivity: 12-AUG-1998 Single-Chance: ----------- Repairs: Notes: ======================================================================== Card Type: TRM Rev. Date of this Entry: 14-JUL-1998 S/N: 23 Final Assembly/Check-in: 14-JUL-1998 by Kirsten Testing: Download/VME Access: 12-AUG-1998 Connectivity: 12-AUG-1998 Single-Chance: ----------- Repairs: Notes: ======================================================================== Card Type: TRM Rev. Date of this Entry: 1-MAR-2000 S/N: 24 Final Assembly/Check-in: 25-JUN-1998 by ? Testing: Download/VME Access: 1-JUL-1998 Connectivity: 1-JUL-1998 Single-Chance: ----------- Repairs: Did not pass its first try at CT. Removed a solder bridge on a HQ Timing Signal U4 pins 62 to 63. 1-JULY-1998 Notes: Noticed that U10 pin 34 does not have a pad. 1-MAR-2000 modified for use in L2 FW connected VME P187 (via J201) to BSF P65 (BG_IO(0)) installed 56-ohm 6-pin pulldown resistors in sites R154 and R155 ======================================================================== Card Type: TRM Rev. Date of this Entry: 1-JUL-1999 S/N: 25 Final Assembly/Check-in: 14-JUL-1998 by Kirsten Testing: Download/VME Access: 29-OCT-1998 Connectivity: 1-JUL-1999 Single-Chance: ----------- Repairs: Solder the P121:P180 side of the following FPGA's: MSA-9 MSA-13 MSA-16 25-JAN-1999 Kirsten: unused CMOS inputs ECO bridged pins 11, 12, 13 on U44 1-JUL-1999 DE Install #30 wire wrap wire jumpers from via's to pins 147 and 149 on FPGA 13. These are HSRO_Data 3 and 11. Use rosin flux to "glue" these down as it looks impractical to clean the board enough in this area to use super glue. Notes: C1 on P4 is not soldered. (Board has been damaged.) P90 on VME FPGA is disconnected at chip body. This is a VDD pin. Several pads (P143, P147, P149) are de-laminated on MSA-13. P143 is a no-connect, P147/P149 are used for HSRO_Data. This card has a 4013XL VME FPGA. Because of the wire wrap wire connections to FPGA #13 it may be best to use this card only at MSU and not at Fermi. ======================================================================== vvvvvvvvvvv TEMPLATE VVVVVVVVVVVVV ======================================================================== Card Type: TRM Rev. Date of this Entry: __-___-1998 S/N: 00 Final Assembly/Check-in: ___________ by _____ Testing: Download/VME Access: ___________ Connectivity: ___________ Single-Chance: ----------- Repairs: Notes: ^^^^^^^^^^^ END TEMPLATE ^^^^^^^^^