Reader's Guide to the files about the L3 <--> TFW Control Path Interface
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                                                 Original Rev.  24-APR-2002
                                                  Current Rev.  25-APR-2002



control_path_interface.txt          This is the original general description
                                    of this system.


dave_fpga_description.txt           Detailed description of the DAVE FPGA that
                                    is used to implement this interface.
                                    Bit level description of all the registers.


control_path_interface_cards.pdf    Shows the setup of the 3 THE-Cards that
                                    are used to implement this interface.

dave_input_section_diagram.pdf      Shows the input section of the DAVE FPGA.

dave_output_section_diagram.pdf     Shows the output section of the DAVE FPGA.
                                    (note 25-APR-02  there is one mistake in
                                     this drawing that I still need to fix.)


Dave_Init_Normal_Operation_1.rio    Initialize the DAVE FPGA's,  i.e. the
                                    L3 Interface to the Control Path,  for
                                    normal operation.  This file calls
                                    Dave_Init_Norm_Op_Include.rii

Dave_Init_Norm_Op_Include.rii       This is an include file called by the above

Dave_Read_Fifo.rio                  This reads the status of the Control Path
                                    Interface and then reads one entry from the
                                    FIFO,  i.e. reads the Triggers Fired Mask
                                    and the associated L3_Transfer_Number.
                                    Finally it increments the Read Pointer to
                                    get the FIFO ready for the next time you
                                    read from it.



Dave_Init_Test_1.rio             Initialize the DAVE FPGA's for just testing
                                 using the 3 "test" rio files shown below.

Dave_Default_Init_Test_1.rii     An include file called by the above.

Dave_Inc_Rd_Pntr_Test_1.rio      Test to verify that the FIFO Read Pointer
                                 is working OK on all cards and all FPGA's.

Dave_Inc_Wrt_Pntr_Test_1.rio     Test to verify that the FIFO Write Pointer
                                 is working OK on all cards and all FPGA's.

Dave_Wrt_Rd_Test_1.rio           A Test that uses the Test Data Register as
                                 the data input to the FIFO.  Do some writes
                                 and then read.