Original:  1-August-2000
						 Current:  1-August-2000

To power up the Master Clock turn on the following in this order:
   Instrument Power Transformer Input
   Rack Monitor
   Fan Power Strip
   Clock +- 12Volt
   Push the RMI Reset
   Clock +5 -5.2 Volt

At this point the Master Clock crate should wake up.  It looks like it is setup
so that the Fan Power Strip runs the fan and the Clock +-12 Volts enables the
water flow.  So both of these need to be on before you can reset the RMI.

Now comes the fun part - actually making the clock run.  There are
several places where we have seen problems - the ethernet and/or
terminal server may need to be reset, the clock program may need to be
run several times (this is the most common problem and just about
guaranteed to happen), and a file may need to be copied.

The first step is to try and connect to the terminal server: telnet to
t-d0-mch1 and login as ioc.  If this fails, in the same rack as the L3
equipment (same side but several racks down from the framework) there
is both a box for ethernet connections and a terminal server box.  The
ethernet box has an inset reset button on the front.  Pushing this
sometimes seems to fix the problem.  (If TCC's connection is messed
up, this is also a way to fix that.)  The terminal server box has a
power switch on the back; power cycling it has also produced results
in the past.  It might be possible to telnet directly to the master
clock (d0olctl06), but we've never tried that.

Once you're connected to t-d0-mch1, it's usually pretty easy.
                1) connect to t-d0-mch1
                2) login as ioc
                3) type the following: connect 1
                4) type: sp clkSetup
                5) repeat #4 until the clock works

The clock is working when the sequencer halted light isn't on and you
no longer have a sequencer halted message when you run sp clkSetup.

If this method proves to be impossible, there is one other thing to
try.  On d0ola (usual trigger password) in
~trgmgr/master_clock/config_files, version 1 is "magic" - it seems to
allow the clock to reboot if it's the program that runs when the front
panel reset button of the clock is pushed.  There is an alias so
cdboot takes you directly to the boot directory.  Copying clkSetup.v1
to clkSetup in the boot directory and pushing the front panel reset
(maybe more than once?) should hopefully clear the sequencer halted
error.  Then you need to return the current version (clkSetup.v26) to
clkSetup and reset the clock again to get the current timing line
setup.  (Under DZero Master Clock there is a web page where the various
versions of the clock file are described in case there are any
questions.)  This method hasn't been used recently, and it's possible
that version 1 is no longer magic, but hopefully it won't come to
that.

Finally there is one other problem that we've seen.  When the clock
was reset, the processor never even tried to talk to the fanouts.
Fritz came to have a look, and he discovered that a file had been
deleted from d0ola.  Specifically, in the boot directory there is a
startup file clkSetup.st.  This file does various things before
eventually loading and spawning the clkSetup executable.  One thing it
tries to do is load the file ../d0App.dbd; this file was missing.  To
fix this, Fritz copied the file ../test.d0App.dbd to ../d0App.dbd.
The clkSetup.st file then ran to completion and correctly loaded and
ran clkSetup.  We've had to do this same thing on at least one other
occasion.