L2 Parts Count | |||||||||||||||||||
6/5/2001 14:03 | |||||||||||||||||||
6/5/2001 14:03 | PC | Alpha | MBT(7) | SCLMe | SLIC | SFO | FIC(4) | VTM(4) | CIC | Bit3 | PCIB[1] | VBD | Cables | Crate | Mbus | Power | Cooling | Cost | |
Unit Cost | 2500 | 5000 | 4000 | 400 | 5000 | 2000 | 3500 | 2500 | 2000 | 3700 | 1800 | 0 | 75[2] | 4500 | 1500 | 6000 | 2000 | ||
Count of Standard Parts | |||||||||||||||||||
Global | 1 | 2 | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 16 | 1 | 1 | 1 | 0.5 | 40600 | |
Multiworker | 0 | 3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 8 | 1 | 1 | 1 | 0.5 | 36700 | |
SLIC+ 1 worker | 0 | 2 | 1 | 1 | 2 | 1 | 2 | 3 | 2 | 1 | 0 | 1 | 20 | 1 | 1 | 1 | 0.5 | 63100 | |
Data | 0 | 0[3] | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 16 | 1 | 1 | 1 | 0.5 | 25900 | |
Spares[4] | 1 | 6[5] | 2 | 2 | 2 | 14[6] | 5 | 0 | 2 | 2 | 1 | 0 | 225[7] | 2 | 3 | 2 | 0 | 152375 | |
Test System/Spares | 2 | 13 | 8 | 5 | 4 | 15 | 7 | 3 | 4 | 6 | 2 | 3 | 285 | 6 | 7 | 6 | 2 | 166300 | |
System | 1 | 2 | 2 | 1 | 0 | 1[8] | 0 | 0 | 0 | 1 | 1 | 1 | 16 | 1 | 1 | 1 | 1 | 43600 | |
Development (System)[9] | 0 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 5 | 1 | 1 | 1 | 0 | 30475 | MSU |
Global[10] | 1 | 4 | 3 | 2 | 0 | 1 | 0 | 0 | 0 | 2 | 1 | 1 | 21 | 2 | 2 | 2 | 1 | 71475 | |
System | 0 | 4 | 2 | 1 | 0 | 0 | 3 | 3 | 0 | 1 | 0 | 1 | 16 | 1 | 1 | 1 | 1 | 65300 | |
Alpha Debug Test Stand | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 16 | 0 | 0 | 0.3 | 0.25 | 3500 | UIC |
Cal | 0 | 4 | 2 | 1 | 0 | 0 | 3 | 3 | 0 | 1 | 0 | 1 | 32 | 1 | 1 | 1.3 | 1.25 | 68800 | |
System[11] | 0 | 4[12] | 3[13] | 1 | 0[14] | 0 | 2[15] | 2 | 0 | 1 | 0 | 1 | 8 | 1 | 1 | 1 | 1 | 62700 | |
Development(FIC)[16] | 0 | 0 | 0 | 0 | 0 | 0 | 0[17] | 0[18] | 0 | 0 | 0 | 0 | 8[19] | 0[20] | 0 | 0 | 0 | 600 | Saclay |
Development(MBT)[21] | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 10 | 0[22] | 0 | 0.3 | 0.25 | 3050 | UMD |
CTT (Tracking) | 0 | 4 | 3 | 1 | 0 | 0 | 2 | 2 | 0 | 1 | 0 | 1 | 26 | 1 | 1 | 1.3 | 1.25 | 66350 | |
System | 0 | 4 | 4 | 2 | 18 | 2 | 0 | 0 | 14 | 2 | 0 | 2 | 150[23] | 3[24] | 2 | 2 | 1 | 207950 | |
Development(SLIC)[25] | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0[26] | 0 | 0 | 0 | 0 | Nevis |
Mu | 0 | 4 | 4 | 2 | 18 | 2 | 0 | 0 | 14 | 2 | 0 | 2 | 150 | 3 | 2 | 2 | 1 | 207950 | |
System[27] | 0 | 4 | 3 | 1 | 0 | 0 | 4 | 4 | 0 | 1 | 0 | 1 | 16 | 1 | 1 | 1 | 1 | 75300 | |
Development[28] | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | SB |
Preshower | 0 | 4 | 3 | 1 | 0 | 0 | 4 | 4 | 0 | 1 | 0 | 1 | 16 | 1 | 1 | 1 | 1 | 50900 | |
Totals for Parts | 3 | 33 | 23 | 12 | 22 | 18 | 16 | 12 | 18 | 13 | 3 | 9 | 530 | 14 | 14 | 13.6 | 7.5 | 631775 | |
Fraction Spares | 33% | 18% | 9% | 17% | 9% | 78% | 31% | 0% | 11% | 15% | 33% | 0% | 42% | 14% | 21% | 15% | 0% | 24% | |
Fraction Spares+Devel | 67% | 45% | 39% | 50% | 18% | 83% | 44% | 25% | 22% | 54% | 67% | 33% | 61% | 50% | 57% | 56% | 33% | 32% | |
System[29] | 0 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 16 | 1 | 1 | 1 | 1 | 38700 | |
Development[30] | 1 | 2 | 1 | 0 | 0 | 0 | 0 | 2 | 0 | 1 | 0 | 0 | 5 | 1 | 1 | 1 | 0 | 37575 | BU? |
STT | 1 | 4 | 3 | 0 | 0 | 0 | 0 | 54 | 0 | 2 | 1 | 1 | 21 | 2 | 2 | 2 | 1 | 69475 | |
Less STT Devel in Test | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Totals Parts (w/ STT) | 4 | 37 | 26 | 12 | 22 | 18 | 16 | 66 | 18 | 15 | 4 | 10 | 551 | 16 | 16 | 15.6 | 8.5 | 1112500 | |
Fraction Spares | 25% | 16% | 8% | 17% | 9% | 78% | 31% | 0% | 11% | 13% | 25% | 0% | 41% | 13% | 19% | 13% | 0% | 14% | |
Fraction Spares+Devel | 75% | 46% | 38% | 50% | 18% | 83% | 44% | 8% | 22% | 53% | 50% | 30% | 60% | 50% | 56% | 55% | 29% | 22% |