Wait_Start_Read IDNT ; Title of Section SECTION Sect_Wait_Start_Read,4,C ; Declare a noncommon code section. ; Align to Longwords. *************************************************************************** * * * Wait_Start_Read_Vert_1 Rev. 30-JAN-1994 * * * *************************************************************************** *************************************************************************** * * * Wait Start Read Vertical Interconnect part of the Cyclic Operation. * * * * Zero the loop counter that times the wait for finding either * * Start Jet List or else Slave Ready. * * * * Wait for either the Start Jet List signal or else the Slave Ready * * signal from the COMINT and verify their state. * * If it takes too long (e.g. > 2 min) then: pulse Data Cable * * Driver Finished line to help "clear" the COMINT card, Set * * the TWB that says no Slave Ready seen, put a warning * * message on the 68k console, and go back to waiting for either * * of these signals. * * While waiting for these signals pulse the 68k running OK line * * to keep the VME NOT Running TWB from becoming active. * * * * Once either Start Jet List or else Slave Ready is received: * * Call the routine to read the Absolute Time data. * * Call the Subroutine to read the Calorimeter Pulser Programming * * Data and the Central Detector Pulser Programming Data. * * * * Zero the loop counter that times the wait for Slave Ready. * * Wait for the Slave Ready signal from the COMINT and verify * * that Slave Ready is HIGH. If it takes too long (e.g. * * > 1/2 sec ) then: pulse Data Cable Driver Finished to * * "clear" the COMINT card, Set the TWB that says no Slave * * Ready seen, and put a warning message on the 68k console. * * While waiting for Slave Ready pulse the 68k running OK line * * to keep the VME NOT Running TWB from becoming active. * * * * Once Slave Ready is received: * * Return to the calling routine. * * * * * * Control of the Trouble Warning Bits * * * * During the period while waiting for the Start Jet List or the * * Slave Ready signal: * * In every cycle of the loop testing for Slave Ready, cycle the * * VME Transfer Program Running TWB (bit #1) Low-High-Low. * * If Slave Ready is not seen with in the max wait time then set * * the Slave Ready Not Seen TWB (bit #4) High. If Slave Ready * * is seen then make certain that the Slave Ready Not Seen Bit * * has been cleared. * * * * * * Control of the State Bits * * * * At various places in this routine set the State Bits to indicate * * which section of the L1 Data Block transfer to L2 is currently * * taking place: * * * * 1. At the start of this routine set the StateWaitStJet state bit * * and clear all other the state bits. * * * * 2. Once the Start Jet List signal arrives then clear the * * StateWaitStJet state bit. * * * * 3. After the Vertical Interconnects have been read and we are * * ready to wait for the Slave Ready then set the WaitSvRd State * * bit. Once the Slave Ready signal arrives then clear the * * WaitSvRd State Bit. * * * *************************************************************************** ************************************************************************* * This section defines program-specific macros: * * * * RDIO: Read bit from IRONICS I/O card and returns state * * WRIO: Write bit(s) to the IRONICS I/O card * * SOFTWAIT: Software delay timer for short waits * * * ************************************************************************* RdIO MACRO ; Bit Test the byte in the Ironics I/O BTST.B \1,\2 ; Port. Z is set equal to the invers ENDM ; of bit \1 in the byte at adrs \2. WrIO MACRO ; Write byte to Ironics I/O Port. NOT.B \1 ; Complement data byte \1. MOVE.B \1,\2 ; Move to Ironics port at adrs \2. ENDM SoftWait MACRO ; Software timer loop. LOCAL WaitMore ; Define a local symbol. MOVE.L \1,D4 ; Load delay time \1 into D4. WaitMore SUBI.L #1,D4 ; Decrement loop counter. BNE WaitMore ; Test for end of delay. ENDM ; Called with an argument ; of $1000 and with cashe off causes a delay of about 4 ; mill seconds, with cashe on the delay is 2.4 mill sec. ************************************************************************* * Wait_Start_Read Section: * * * * Wait for a L1 trigger and for the COMINT Data Block Builder to * * signal Start Jet List. The Start Jet List signal indicates that * * we are far enough into the Data Block Building process that we will * * not have a L15 Reject. * * * * Recall that the Start Jet List signal is normally HIGH and that it * * goes LOW to signal that it is OK to Start the Jet List. The Slave * * Ready signal is a normal High Active signal, i.e. Slave Ready goes * * HIGH to signal that the Data Block Builder is finished. * * * * Ironics Port #3 * * Bit#4 Bit#0 Indicated Status * * ------- ------- --------------------------------------- * * Hi Low Nothing is ready. * * Hi Hi Slave Ready is indicated. * * Low Low Start Jet List is indicated. * * Low Hi Start Jet List & Slave Ready are indicated. * * * * * * Note that we will also look for the Slave Ready signal just in * * case we have missed the Start Jet List signal. The Start Jet List * * signal does "go away" when the COMINT is finished building the Data * * Block. * * * * While the program is waiting for the Start Jet List signal set the * * StateWaitStJet state bit. While it is reading the Vertical * * Interconnects have none of the State Bits set. The StateWaitSvRd * * State Bit while be set later when we are looking for Slave Ready. * * * * Count how long we have waited for Start Jet List (or Slave Ready) * * to go High in the location SJLLoopCnt. The size of this count * * will let us know how long of an information message can be sent * * to the 68k terminal after the transfer to the VBD and also lets * * us know if there has NOT been a Start Jet List (or Slave Ready) * * signal in a very long time and thus we should pulse the Data * * Cable Driver Finished line to clear something in COMINT. After * * finding a Start Jet List signal (or Slave Ready signal), store * * the wait count in location SJLLoopCnt. * * * * Each time going around the loop waiting for the Start Jet List * * (or Slave Ready) signal pulse the VME Transfer Program Running * * bit in the Trouble Warning Bits low- high-low to indicate that * * the VME Transfer Program is running. * * * * If the Start Jet List (or Slave Ready) signal is not seen within * * the SJLMaxWait number of loops execute the STUCK routine to try * * to free up the COMINT card. In the STUCK routine pulse the Data * * Cable Driver Finished line, send a message to the 68k console, * * and set the No Slave Readies Seen bit in the Trouble Warning * * Bits. * * * * When Start Jet List (or Slave Ready) signal becomes active then * * do the following steps: * * * * Read the Absolute Time over the Vertical Interconnect and * * store the data in the "V" type 214 Memory module that is * * setup for a Load operation. * * * * Read the CD Pulser Programming data and the Cal Pulser * * Programming data over the Vertical Interconnect and store this * * data in the "V" 214 Memory module that is setup for a Load * * operation. * * * * When either the Start Jet List or else the Slave Ready signal is * * received from the COMINT card then clear all of the state bits * * i.e. clear StateWaitStJet. * * * ************************************************************************* ALIGN 4 ; Align to Longword Address. Begin_Wait_Start_Read Move.B #StateWaitStJet,StatePortAdrs ; Set all of the State Bits to show ; State Wait Start Jet List signal. CLR.L D1 ; Starting the wait for Start Jet List ; or else the Slave Ready signal ; so zero the loop counter. TestSJL Move.B TWBData,D0 ; Pulse the Trouble Warning Bit #0, Move.B D0,D7 ; the VME Transfer Program Running ORI.B #$01,D0 ; bit, low-high-low to flag that WrIO D0,TWBPortAdrs ; the VME Transfer Program is AndI.B #$FE,D7 ; Running OK. WrIO D7,TWBPortAdrs RdIO #$04,Ironics_Port_3 ; Look for the Start Jet List to be BEQ VerSJL ; active and if it is then verify it. ; Recall that Start Jet List is ; active Low. RdIO #$00,Ironics_Port_3 ; Look for the Slave Ready to be BNE VerSJL ; active and if it is then verify it. ; Recall that Slave Ready is ; active High. ADD.L #$1,D1 ; Increment the wait for Start Jet ; List counter. CMP.L SJLMaxWait,D1 ; Test to see if it has been the max BEQ SJLstuck ; wait. If so pulse the Finished ; line to wake up the COMINT. JMP TestSJL ; Wait for the Start Jet List or the ; Slave Ready. VerSJL RdIO #$04,Ironics_Port_3 ; Verify the Start Jet List signal. BEQ ReadVert ; If it is still active, then Read ; the Vertical Inter. Recall that ; Start Jet List is active Low. RdIO #$00,Ironics_Port_3 ; Verify the Slave Ready signal. BNE ReadVert ; If it is still active, then Read ; the Vertical Inter. Recall that ; Slave Ready is active High. JMP TestSJL ; Neither Start Jet List nor Slave ; Ready verified as being high so go ; back to waiting for one of them. SJLstuck Move.B #Bits1and2Hi,D0 ; Send a Data Cable Driver Finished WrIO D0,Ironics_Port_2 ; signal to both the Pilot and the ; Assistant COMINT cards. SoftWait #$1000 ; Wait about 4 mill seconds. Move.B #AllBitsLow,D0 ; Drop the Data Cable Driver WrIO D0,Ironics_Port_2 ; Finished signal. PEA.L SJLWaitMsg1 ; Send a message saying that neither JSR ChrStrgOut ; Start Jet List nor Slave Ready ; was seen within Max Wait. PEA.L SJLWaitMsg2 ; Pulsing Data Cable Driver Finished JSR ChrStrgOut ; to free up the COMINT card. Move.B TWBData,D0 ; Set the No Slave Readies Seen bit ORI.B #$08,D0 ; in the Trouble Warning Bits to Move.B D0,TWBData ; flag the problem for monitoring. WRIO D0,TWBPortAdrs ; Send the new TWB's out their port. JMP Begin_Wait_Start_Read ; Start looking again for the Start Jet ; List signal. Zero the SJLLoopCnt. ***** OK we have a Start Jet List or else a Slave Ready so store the ***** ***** count of how long we had to wait for a Start Jet List (or Slave ***** ***** Ready) in the variable SJLLoopCnt, Clear the State Bits, and ***** ***** then read the Absolute Time and the Central Detector and Calo ***** ***** Pulser Programming Data. ***** ReadVert Move.L D1,SJLLoopCnt ; Store the count of how long we have ; waited for either Start Jet List ; or else Slave Ready. Move.B #AllBitsLow,StatePortAdrs ; While reading the Vertical ; Interconnects all State ; Bits will be low, i.e. ; no state is set. ***** Call the subroutine to read the Absolute Time Data. ***** ***** Recall that the "V" type MVME-214 is at its LOAD VME Address. ***** MOVEA.L BAAbsoTime,A0 ; Give the Get_Time the address where it ADD.L #$00300000,A0 ; should store the Absolute Time data. JSR Begin_Get_Time ; Subroutine call to get the Time Data. *** Call the subroutine to read the Central Detector Pulser Programming *** *** Data via the Vertical Interconnect. The starting location to store *** *** this data in MVME-214 memory is passed to the routine in Reg A0. *** *** Recall that the "V" type MVME-214 is at its LOAD VME Address. *** MOVEA.L BAPulser,A0 ; Give Get_CD_Pulser the address where ADD.L #$00300000,A0 ; it should store the CD Pulser data. JSR Begin_Get_CD_Pulser ; Subroutine call to get CD Pulser Data. *** Call the subroutine to read the Calorimeter Pulser Programming *** *** Data via the Vertical Interconnect. The starting location to store *** *** this data in MVME-214 memory is passed to the routine in Reg A0. *** *** Recall that the "V" type MVME-214 is at its LOAD VME Address. *** MOVEA.L BAPulser,A0 ; Give Get_Calo_Pulser the address where ADD.L #$00300100,A0 ; it should store the Calo Pulser data. JSR Begin_Get_Calo_Pulser ; Subroutine call to get Cal Pulser Data. ; All of the Vertical Interconnect data ; has now been read so start waiting ; for the Data Block Builder to finish ; i.e. wait for the Slave Ready signal. ************************************************************************* * Wait Start Read Vertical Interconnect Section: * * * * Wait for a the COMINT Data Block Builder to finish building a new * * L1 Data Block. When COMINT is finished building a Data Block it * * sets the Slave Ready signal High. * * * * If the Slave Ready was not found set high in the above Vertical * * Interconnect reading routine (as it typically should not be high * * yet) then keep the State Bits set to StateWaitSvRd to indicate * * that we are waiting for Slave Ready to go high. * * * * Count how long we have to wait for Slave Ready to go High in the * * location SRLoopCnt. It typically should require only a fraction * * of a mill sec for the Data Block builder to finish. This size of * * this count will let us know how if we have had to wait for a Slave * * Ready signal for too long of a time and thus we should pulse the * * Data Cable Driver Finished line to clear something in COMINT. * * * * Each time going around the loop waiting for Slave Ready pulse the * * VME Transfer Program Running bit in the Trouble Warning Bits low- * * high-low to indicate that the VME Transfer Program is running. * * * * If Slave Ready is not seen within the SRMaxWait number of loops * * execute the STUCK routine to try to free up the COMINT card. In * * the STUCK routine pulse the Data Cable Driver Finished line, send * * a message to the 68k console, and set the No Slave Readies Seen * * bit in the Trouble Warning Bits. * * * * When Slave Ready goes high and is confirmed high then return to * * the calling routine after clearing the state bits. * * * ************************************************************************* Move.B #StateWaitSvRd,StatePortAdrs ; Set the State Bits to ; indicate Waiting for ; Slave Ready to go hi. CLR.L D1 ; Starting the wait for Slave Ready ; so zero the loop counter. TestSR Move.B TWBData,D0 ; Pulse the Trouble Warning Bit #0, Move.B D0,D7 ; the VME Transfer Program Running ORI.B #$01,D0 ; bit, low-high-low to flag that WrIO D0,TWBPortAdrs ; the VME Transfer Program is AndI.B #$FE,D7 ; Running OK. WrIO D7,TWBPortAdrs RdIO #$00,Ironics_Port_3 ; Look for the Slave Ready HI. BNE VerfSR ; If high, then verify that it is HI. ADD.L #$1,D1 ; Increment the wait for Slv Rdy count. CMP.L SRMaxWait,D1 ; Test to see if it has been the max BEQ Stuck ; wait. If so pulse the Finished ; line to wake up the COMINT. JMP TestSR ; Wait for the Slave Ready. VerfSR RdIO #$00,Ironics_Port_3 ; Verify that Slave Ready is HI. BNE ProcEvt ; If still high, then process the event. JMP TestSR ; Back to waiting for the Slave Ready. Stuck Move.B #Bits1and2Hi,D0 ; Send a Data Cable Driver Finished WrIO D0,Ironics_Port_2 ; signal to both the Pilot and the ; Assistant COMINT cards. SoftWait #$1000 ; Wait about 4 mill seconds. Move.B #AllBitsLow,D0 ; Drop the Data Cable Driver WrIO D0,Ironics_Port_2 ; Finished signal. PEA.L SRWaitMsg1 ; Send a message saying that SR not JSR ChrStrgOut ; seen within Max Wait. PEA.L SRWaitMsg2 ; Pulsing Data Cable Driver Finished JSR ChrStrgOut ; to free up the COMINT card. Move.B TWBData,D0 ; Set the No Slave Readies Seen bit ORI.B #$08,D0 ; in the Trouble Warning Bits to Move.B D0,TWBData ; flag the problem for monitoring. WrIO D0,TWBPortAdrs ; Send the new TWB's out their port. JMP Begin_Wait_Start_Read ; We timed out looking for the Slave ; Ready signal after having received ; a Start Jet List signal. The ; Comint card has been cleard via a ; Data Cable Driver Finished signal. ; Start looking again for the Start ; Jet List signal. Zero SJLLoopCnt. ProcEvt Move.B #AllBitsLow,StatePortAdrs ; Set all of the State Bits ; low to indicate no state. ; It is possible that on some earlier ; loop through the cyclic event ; section that the Slave Ready Not ; seen Trouble Warning Bit has been ; set. Now is the time to clear it ; because we know that if the code ; gets to this point that all is OK. Move.B TWBData,D0 ; Clear the No Slave Readies Seen bit AndI.B #$F7,D0 ; in the Trouble Warning Bits. Move.B D0,TWBData ; Other TWB's could still be in WrIO D0,TWBPortAdrs ; effect. Send out the new TWB's. RTS ; Return to the calling routine. ************************************************************************* * Define Constants: * * * * Data used to send messages to the 68k terminal screen. * * * ************************************************************************* ALIGN 4 ; Align to Longword Address. SRWaitMsg1 DC.B 43,$0D,$0A,'Slave Ready not seen within the max wait.' SRWaitMsg2 DC.B 46,'Pulse the Data Cable Driver Finished signal.',$0D,$0A SJLWaitMsg1 DC.B 44,$0D,$0A,'Neither Start Jet List or Slave Ready seen' SJLWaitMsg2 DC.B 46,'within the max wait. Pulse DCD Finished. ',$0D,$0A ************************************************************************* * Define Constants: External References * * * ************************************************************************* XDEF Begin_Wait_Start_Read ; Export this symbol ; to other modules. XREF AllBitsLow ; Symbols referenced XREF BAAbsoTime ; in this program XREF BAPulser ; module but defined XREF Begin_Get_Calo_Pulser ; in another module XREF Begin_Get_CD_Pulser ; Main_Symbols.Include XREF Begin_Get_Time XREF Bits1and2Hi XREF Ironics_Port_2 XREF Ironics_Port_3 XREF ChrStrgOut XREF SJLLoopCnt XREF SJLMaxWait XREF SRMaxWait XREF StatePortAdrs XREF StateWaitSvRd XREF StateWaitStJet XREF TWBData XREF TWBPortAdrs END