**************************************** * * * Calorimeter Trigger Application Card * * to Framework Backplane Conversion * * Paddleboard * * * **************************************** 2-OCT-1991 add Regulator: 15-OCT-1991 add power appendix: 21-JAN-1992 dd MBD front-panel CBUS method: 16-APR-1992 GENERAL DESCRIPTION ------------------- The Calorimeter Card Conversion Paddleboard (CCCP) is a paddleboard which allows as Calorimeter Trigger Application Card to be installed in a Framework Backplane. The CCCP must: i) map the 256 signal pins from the 4 DIN connectors found on a Calorimeter Trigger Application Card to the 256 signal pins on the 2 connectors found in one card slot of a Framework Backplane ii) provide power to the Calorimeter Trigger Application Card from either the Framework Backplane, an external power source, or on-board regulator iii) provide a method for copying the 64 signals carried on the J4 connector of a Calorimeter Trigger Application Card (typically the Specific Backplane Bus) to another connector, with any order or polarity possible iv) allow all signal lines to be easily re-mapped PURPOSE OF THE CARD ------------------- Although the Calorimeter Trigger and Trigger Framework use incompatible bus standards, several Calorimeter Trigger Application Cards could perform useful functions in a Trigger Framework Backplane. For example, some interesting possibilities are: o using a CTMBD as a Framework MBD o using a WPA in e.g. the Level 1.5 Backplane The CCCP is intended to allow this. GENERAL STRUCTURE OF THE CARD ----------------------------- The CCCP has 2 AMP 140-pin female connectors mounted on its Framework Backplane side, and 4 AMP 96-pin DIN-style male connectors mounted on its Calorimeter Trigger Application Card side. The 256 signal pins carried on these connectors are connected by surface traces on both the component and solder side of the board (128 traces/side). Each trace passes through two vias, one at each end, to allow re-mapping of the signals (by cutting traces and installing wire-wrap wire). Additionally, the signal traces normally corresponding to the Specific Backplane Bus pass through another array of vias, arranged appropriately for the installation of a male Samtec connector to drive the Specific Backplane Bus signals off the card. This via array is composed of 3 rows of vias, to allow for polarity change of the outgoing signals. By installing the male connector on the solder side of the CCCP, the order of the outgoing signals can be changed. This extra connector, with selectable polarity and order of the signals, is required to use a CTMBD as a Framework MBD, as the CTMBD has no front panel Specific Backplane Bus connector. The selectable order and polarity allows easy use of extender cables on e.g. the existing AND-OR Card Specific Backplane Bus cables. POWER TRANSMISSION CONSIDERATIONS --------------------------------- The only power supply voltages available on a Framework Backplane are +5.0V, GROUND, and -5.2V. Power supply voltages typically required by Calorimeter Trigger Application Cards include +5.0V, GROUND, -2.0V, -4.5V, and -5.2V. There are also four distinct power pin arrangements for the six different flavors of Calorimeter Trigger Application Cards. They are grouped as shown below: o CAT2, CAT3, WPA o CTMBD o CTFE o CHTCR It is not possible to support all six flavors of Calorimeter Trigger Application Cards with a single style of CCCP. However, the CTFE and CHTCR are of limited usefulness in the Trigger Framework environment, leaving only the CAT2, CAT3, WPA, and CTMBD to be supported. These four flavors of cards have nearly identical power pin arrangements, the only differences being that the VEE supply for the CTMBD is -5.2V, while the VEE supply for the CAT2, CAT3, and WPA is -4.5V; and the CTMBD uses J2 pins 13-16, 18-21, and J3 pins 12-15, 17-20 as GROUND pins, while the CAT2, CAT3, and WPA use these pins for the -4.5V supply. As no card uses both -5.2V and -4.5V, a single style of CCCP can support the four interesting flavors of Calorimeter Trigger Application Cards. Note that, for use as a CCCP for the CTMBD, J2 pins 13-16, 18-21 and J3 pins 12-15, 17-20 on the CCCP must be removed. If they are not removed, a short circuit will exist when the -5.2V pins on the CCCP are connected directly to the GROUND pins on the CTMBD. As previously mentioned, a Framework Backplane does not provide -2.0V. Regulators on the CCCP can provide this supply using the -5.2V rail on the Framework Backplane. Space for mounting one regulator on the CCCP is available. Most likely, National Semiconductor LM333T regulator, capable of providing 3A of current, will be used. Recall that the CTMBD requires approximately 2A of VTT, while VTT can be generated on the WPA if necessary. Alternatively, the -2.0V supply could be brought in from an external -2.0V power supply, if the -2.0V current requirement exceeds the capability of the small regulator. A Framework Backplane also does not supply -4.5V. It is impractical to consider regulating a -4.5V supply on the CCCP, as the current requirements for any Calorimeter Trigger Application Card exceed the capability of small regulators. One possible solution is to bring -4.5V in from an external supply, which requires that the VEE pins on the CCCP do not make contact with the VEE pins on the Framework Backplane. Another possibility is to run the 100K ECL-based Calorimeter Trigger Application Cards from the Framework Backplane -5.2V supply. This latter option requires that the 100K ECL databook be carefully examined for evidence of possible problems. Further attention must be paid to the current consumption of Calorimeter Trigger Application Cards, in terms of the current supply capability of the rather small number of power pins per card slot in a Framework Backplane. A first pass look at this places CTMBD and most sensible WPA-based cards in the realm of possibility, while CAT2 and CAT3 are ruled out. DESCRIPTION OF THE CONNECTORS ----------------------------- J1 : FIRST LEVEL CALORIMETER TRIGGER APPLICATION CARD96 PIN CONNECTOR ----------------------------------------------------------------------------- Pin Function Mnemonic ----------------------------------------------------------------------------- 1 Ground GND 2 Ground GND 3 Ground GND 4 Ground GND 5 Ground GND 6 Ground GND 7 Ground GND 8 Ground GND 9 Ground GND 10 Ground GND 11 Ground GND 12 Unused 13 Power -4.5 V | Power -5.2V VEE 14 Power -4.5 V | Power -5.2V VEE 15 Power -4.5 V | Power -5.2V VEE 16 Power -4.5 V | Power -5.2V VEE 17 Unused 18 Power -4.5 V | Power -5.2V VEE 19 Power -4.5 V | Power -5.2V VEE 20 Power -4.5 V | Power -5.2V VEE 21 Power -4.5 V | Power -5.2V VEE 22 Unused 23 Power -2.0 V VTT 24 Power -2.0 V VTT 25 Power -2.0 V VTT 26 Power -2.0 V VTT 27 Unused 28 Ground GND 29 Ground GND 30 Ground GND 31 Ground GND 32 Ground GND 33 J1 Input/Output Bit 1 Inverted OUT IIO1.1 34 J1 Input/Output Bit 2 Inverted OUT IIO1.2 35 J1 Input/Output Bit 3 Inverted OUT IIO1.3 36 J1 Input/Output Bit 4 Inverted OUT IIO1.4 37 J1 Input/Output Bit 5 Inverted OUT IIO1.5 38 J1 Input/Output Bit 6 Inverted OUT IIO1.6 39 J1 Input/Output Bit 7 Inverted OUT IIO1.7 40 J1 Input/Output Bit 8 Inverted OUT IIO1.8 41 J1 Input/Output Bit 9 Inverted OUT IIO1.9 42 J1 Input/Output Bit 10 Inverted OUT IIO1.10 43 J1 Input/Output Bit 11 Inverted OUT IIO1.11 44 J1 Input/Output Bit 12 Inverted OUT IIO1.12 45 J1 Input/Output Bit 13 Inverted OUT IIO1.13 46 J1 Input/Output Bit 14 Inverted OUT IIO1.14 47 J1 Input/Output Bit 15 Inverted OUT IIO1.15 48 J1 Input/Output Bit 16 Inverted OUT IIO1.16 49 J1 Input/Output Bit 17 Inverted OUT IIO1.17 50 J1 Input/Output Bit 18 Inverted OUT IIO1.18 51 J1 Input/Output Bit 19 Inverted OUT IIO1.19 52 J1 Input/Output Bit 20 Inverted OUT IIO1.20 53 J1 Input/Output Bit 21 Inverted OUT IIO1.21 54 J1 Input/Output Bit 22 Inverted OUT IIO1.22 55 J1 Input/Output Bit 23 Inverted OUT IIO1.23 56 J1 Input/Output Bit 24 Inverted OUT IIO1.24 57 J1 Input/Output Bit 25 Inverted OUT IIO1.25 58 J1 Input/Output Bit 26 Inverted OUT IIO1.26 59 J1 Input/Output Bit 27 Inverted OUT IIO1.27 60 J1 Input/Output Bit 28 Inverted OUT IIO1.28 61 J1 Input/Output Bit 29 Inverted OUT IIO1.29 62 J1 Input/Output Bit 30 Inverted OUT IIO1.30 63 J1 Input/Output Bit 31 Inverted OUT IIO1.31 64 J1 Input/Output Bit 32 Inverted OUT IIO1.32 65 J1 Input/Output Bit 1 Non-Inverted OUT NIO1.1 66 J1 Input/Output Bit 2 Non-inverted OUT NIO1.2 67 J1 Input/Output Bit 3 Non-inverted OUT NIO1.3 68 J1 Input/Output Bit 4 Non-inverted OUT NIO1.4 69 J1 Input/Output Bit 5 Non-inverted OUT NIO1.5 70 J1 Input/Output Bit 6 Non-inverted OUT NIO1.6 71 J1 Input/Output Bit 7 Non-inverted OUT NIO1.7 72 J1 Input/Output Bit 8 Non-inverted OUT NIO1.8 73 J1 Input/Output Bit 9 Non-inverted OUT NIO1.9 74 J1 Input/Output Bit 10 Non-inverted OUT NIO1.10 75 J1 Input/Output Bit 11 Non-inverted OUT NIO1.11 76 J1 Input/Output Bit 12 Non-inverted OUT NIO1.12 77 J1 Input/Output Bit 13 Non-inverted OUT NIO1.13 78 J1 Input/Output Bit 14 Non-inverted OUT NIO1.14 79 J1 Input/Output Bit 15 Non-inverted OUT NIO1.15 80 J1 Input/Output Bit 16 Non-inverted OUT NIO1.16 81 J1 Input/Output Bit 17 Non-inverted OUT NIO1.17 82 J1 Input/Output Bit 18 Non-inverted OUT NIO1.18 83 J1 Input/Output Bit 19 Non-inverted OUT NIO1.19 84 J1 Input/Output Bit 20 Non-inverted OUT NIO1.20 85 J1 Input/Output Bit 21 Non-inverted OUT NIO1.21 86 J1 Input/Output Bit 22 Non-inverted OUT NIO1.22 87 J1 Input/Output Bit 23 Non-inverted OUT NIO1.23 88 J1 Input/Output Bit 24 Non-inverted OUT NIO1.24 89 J1 Input/Output Bit 25 Non-inverted OUT NIO1.25 90 J1 Input/Output Bit 26 Non-inverted OUT NIO1.26 91 J1 Input/Output Bit 27 Non-inverted OUT NIO1.27 92 J1 Input/Output Bit 28 Non-inverted OUT NIO1.28 93 J1 Input/Output Bit 29 Non-inverted OUT NIO1.29 94 J1 Input/Output Bit 30 Non-inverted OUT NIO1.30 95 J1 Input/Output Bit 31 Non-inverted OUT NIO1.31 96 J1 Input/Output Bit 32 Non-inverted OUT NIO1.32 J2 : FIRST LEVEL CALORIMETER TRIGGER APPLICATION CARD 96 PIN CONNECTOR ----------------------------------------------------------------------------- Pin Function Mnemonic ----------------------------------------------------------------------------- 1 Ground GND 2 Ground GND 3 Ground GND 4 Ground GND 5 Ground GND 6 Ground GND 7 Unused 8 Power -2.0 V VTT 9 Power -2.0 V VTT 10 Power -2.0 V VTT 11 Power -2.0 V VTT 12 Unused 13 Power -4.5 V | Power -5.2V VEE 14 Power -4.5 V | Power -5.2V VEE 15 Power -4.5 V | Power -5.2V VEE 16 Power -4.5 V | Power -5.2V VEE 17 Unused 18 Power -4.5 V | Power -5.2V VEE 19 Power -4.5 V | Power -5.2V VEE 20 Power -4.5 V | Power -5.2V VEE 21 Power -4.5 V | Power -5.2V VEE 22 Unused 23 Power +5.0 V VCC 24 Power +5.0 V VCC 25 Power +5.0 V VCC 26 Power +5.0 V VCC 27 Unused 28 Ground GND 29 Ground GND 30 Ground GND 31 Ground GND 32 Ground GND 33 J2 Input/Output Bit 1 Inverted OUT IIO2.1 34 J2 Input/Output Bit 2 Inverted OUT IIO2.2 35 J2 Input/Output Bit 3 Inverted OUT IIO2.3 36 J2 Input/Output Bit 4 Inverted OUT IIO2.4 37 J2 Input/Output Bit 5 Inverted OUT IIO2.5 38 J2 Input/Output Bit 6 Inverted OUT IIO2.6 39 J2 Input/Output Bit 7 Inverted OUT IIO2.7 40 J2 Input/Output Bit 8 Inverted OUT IIO2.8 41 J2 Input/Output Bit 9 Inverted OUT IIO2.9 42 J2 Input/Output Bit 10 Inverted OUT IIO2.10 43 J2 Input/Output Bit 11 Inverted OUT IIO2.11 44 J2 Input/Output Bit 12 Inverted OUT IIO2.12 45 J2 Input/Output Bit 13 Inverted OUT IIO2.13 46 J2 Input/Output Bit 14 Inverted OUT IIO2.14 47 J2 Input/Output Bit 15 Inverted OUT IIO2.15 48 J2 Input/Output Bit 16 Inverted OUT IIO2.16 49 J2 Input/Output Bit 17 Inverted OUT IIO2.17 50 J2 Input/Output Bit 18 Inverted OUT IIO2.18 51 J2 Input/Output Bit 19 Inverted OUT IIO2.19 52 J2 Input/Output Bit 20 Inverted OUT IIO2.20 53 J2 Input/Output Bit 21 Inverted OUT IIO2.21 54 J2 Input/Output Bit 22 Inverted OUT IIO2.22 55 J2 Input/Output Bit 23 Inverted OUT IIO2.23 56 J2 Input/Output Bit 24 Inverted OUT IIO2.24 57 J2 Input/Output Bit 25 Inverted OUT IIO2.25 58 J2 Input/Output Bit 26 Inverted OUT IIO2.26 59 J2 Input/Output Bit 27 Inverted OUT IIO2.27 60 J2 Input/Output Bit 28 Inverted OUT IIO2.28 61 J2 Input/Output Bit 29 Inverted OUT IIO2.29 62 J2 Input/Output Bit 30 Inverted OUT IIO2.30 63 J2 Input/Output Bit 31 Inverted OUT IIO2.31 64 J2 Input/Output Bit 32 Inverted OUT IIO2.32 65 J2 Input/Output Bit 1 Non-Inverted OUT NIO2.1 66 J2 Input/Output Bit 2 Non-inverted OUT NIO2.2 67 J2 Input/Output Bit 3 Non-inverted OUT NIO2.3 68 J2 Input/Output Bit 4 Non-inverted OUT NIO2.4 69 J2 Input/Output Bit 5 Non-inverted OUT NIO2.5 70 J2 Input/Output Bit 6 Non-inverted OUT NIO2.6 71 J2 Input/Output Bit 7 Non-inverted OUT NIO2.7 72 J2 Input/Output Bit 8 Non-inverted OUT NIO2.8 73 J2 Input/Output Bit 9 Non-inverted OUT NIO2.9 74 J2 Input/Output Bit 10 Non-inverted OUT NIO2.10 75 J2 Input/Output Bit 11 Non-inverted OUT NIO2.11 76 J2 Input/Output Bit 12 Non-inverted OUT NIO2.12 77 J2 Input/Output Bit 13 Non-inverted OUT NIO2.13 78 J2 Input/Output Bit 14 Non-inverted OUT NIO2.14 79 J2 Input/Output Bit 15 Non-inverted OUT NIO2.15 80 J2 Input/Output Bit 16 Non-inverted OUT NIO2.16 81 J2 Input/Output Bit 17 Non-inverted OUT NIO2.17 82 J2 Input/Output Bit 18 Non-inverted OUT NIO2.18 83 J2 Input/Output Bit 19 Non-inverted OUT NIO2.19 84 J2 Input/Output Bit 20 Non-inverted OUT NIO2.20 85 J2 Input/Output Bit 21 Non-inverted OUT NIO2.21 86 J2 Input/Output Bit 22 Non-inverted OUT NIO2.22 87 J2 Input/Output Bit 23 Non-inverted OUT NIO2.23 88 J2 Input/Output Bit 24 Non-inverted OUT NIO2.24 89 J2 Input/Output Bit 25 Non-inverted OUT NIO2.25 90 J2 Input/Output Bit 26 Non-inverted OUT NIO2.26 91 J2 Input/Output Bit 27 Non-inverted OUT NIO2.27 92 J2 Input/Output Bit 28 Non-inverted OUT NIO2.28 93 J2 Input/Output Bit 29 Non-inverted OUT NIO2.29 94 J2 Input/Output Bit 30 Non-inverted OUT NIO2.30 95 J2 Input/Output Bit 31 Non-inverted OUT NIO2.31 96 J2 Input/Output Bit 32 Non-inverted OUT NIO2.32 J3 : FIRST LEVEL CALORIMETER TRIGGER APPLICATION CARD 96 PIN CONNECTOR ----------------------------------------------------------------------------- Pin Function Mnemonic ----------------------------------------------------------------------------- 1 Ground GND 2 Ground GND 3 Ground GND 4 Ground GND 5 Ground GND 6 Unused 7 Power +5.0 V VCC 8 Power +5.0 V VCC 9 Power +5.0 V VCC 10 Power +5.0 V VCC 11 Unused 12 Power -4.5 V | Power -5.2V VEE 13 Power -4.5 V | Power -5.2V VEE 14 Power -4.5 V | Power -5.2V VEE 15 Power -4.5 V | Power -5.2V VEE 16 Unused 17 Power -4.5 V | Power -5.2V VEE 18 Power -4.5 V | Power -5.2V VEE 19 Power -4.5 V | Power -5.2V VEE 20 Power -4.5 V | Power -5.2V VEE 21 Unused 22 Power -2.0 V VTT 23 Power -2.0 V VTT 24 Power -2.0 V VTT 25 Power -2.0 V VTT 26 Unused 27 Ground GND 28 Ground GND 29 Ground GND 30 Ground GND 31 Ground GND 32 Ground GND 33 J3 Input/Output Bit 1 Inverted OUT IIO3.1 34 J3 Input/Output Bit 2 Inverted OUT IIO3.2 35 J3 Input/Output Bit 3 Inverted OUT IIO3.3 36 J3 Input/Output Bit 4 Inverted OUT IIO3.4 37 J3 Input/Output Bit 5 Inverted OUT IIO3.5 38 J3 Input/Output Bit 6 Inverted OUT IIO3.6 39 J3 Input/Output Bit 7 Inverted OUT IIO3.7 40 J3 Input/Output Bit 8 Inverted OUT IIO3.8 41 J3 Input/Output Bit 9 Inverted OUT IIO3.9 42 J3 Input/Output Bit 10 Inverted OUT IIO3.10 43 J3 Input/Output Bit 11 Inverted OUT IIO3.11 44 J3 Input/Output Bit 12 Inverted OUT IIO3.12 45 J3 Input/Output Bit 13 Inverted OUT IIO3.13 46 J3 Input/Output Bit 14 Inverted OUT IIO3.14 47 J3 Input/Output Bit 15 Inverted OUT IIO3.15 48 J3 Input/Output Bit 16 Inverted OUT IIO3.16 49 J3 Input/Output Bit 17 Inverted OUT IIO3.17 50 J3 Input/Output Bit 18 Inverted OUT IIO3.18 51 J3 Input/Output Bit 19 Inverted OUT IIO3.19 52 J3 Input/Output Bit 20 Inverted OUT IIO3.20 53 J3 Input/Output Bit 21 Inverted OUT IIO3.21 54 J3 Input/Output Bit 22 Inverted OUT IIO3.22 55 J3 Input/Output Bit 23 Inverted OUT IIO3.23 56 J3 Input/Output Bit 24 Inverted OUT IIO3.24 57 J3 Input/Output Bit 25 Inverted OUT IIO3.25 58 J3 Input/Output Bit 26 Inverted OUT IIO3.26 59 J3 Input/Output Bit 27 Inverted OUT IIO3.27 60 J3 Input/Output Bit 28 Inverted OUT IIO3.28 61 J3 Input/Output Bit 29 Inverted OUT IIO3.29 62 J3 Input/Output Bit 30 Inverted OUT IIO3.30 63 J3 Input/Output Bit 31 Inverted OUT IIO3.31 64 J3 Input/Output Bit 32 Inverted OUT IIO3.32 65 J3 Input/Output Bit 1 Non-Inverted OUT NIO3.1 66 J3 Input/Output Bit 2 Non-inverted OUT NIO3.2 67 J3 Input/Output Bit 3 Non-inverted OUT NIO3.3 68 J3 Input/Output Bit 4 Non-inverted OUT NIO3.4 69 J3 Input/Output Bit 5 Non-inverted OUT NIO3.5 70 J3 Input/Output Bit 6 Non-inverted OUT NIO3.6 71 J3 Input/Output Bit 7 Non-inverted OUT NIO3.7 72 J3 Input/Output Bit 8 Non-inverted OUT NIO3.8 73 J3 Input/Output Bit 9 Non-inverted OUT NIO3.9 74 J3 Input/Output Bit 10 Non-inverted OUT NIO3.10 75 J3 Input/Output Bit 11 Non-inverted OUT NIO3.11 76 J3 Input/Output Bit 12 Non-inverted OUT NIO3.12 77 J3 Input/Output Bit 13 Non-inverted OUT NIO3.13 78 J3 Input/Output Bit 14 Non-inverted OUT NIO3.14 79 J3 Input/Output Bit 15 Non-inverted OUT NIO3.15 80 J3 Input/Output Bit 16 Non-inverted OUT NIO3.16 81 J3 Input/Output Bit 17 Non-inverted OUT NIO3.17 82 J3 Input/Output Bit 18 Non-inverted OUT NIO3.18 83 J3 Input/Output Bit 19 Non-inverted OUT NIO3.19 84 J3 Input/Output Bit 20 Non-inverted OUT NIO3.20 85 J3 Input/Output Bit 21 Non-inverted OUT NIO3.21 86 J3 Input/Output Bit 22 Non-inverted OUT NIO3.22 87 J3 Input/Output Bit 23 Non-inverted OUT NIO3.23 88 J3 Input/Output Bit 24 Non-inverted OUT NIO3.24 89 J3 Input/Output Bit 25 Non-inverted OUT NIO3.25 90 J3 Input/Output Bit 26 Non-inverted OUT NIO3.26 91 J3 Input/Output Bit 27 Non-inverted OUT NIO3.27 92 J3 Input/Output Bit 28 Non-inverted OUT NIO3.28 93 J3 Input/Output Bit 29 Non-inverted OUT NIO3.29 94 J3 Input/Output Bit 30 Non-inverted OUT NIO3.30 95 J3 Input/Output Bit 31 Non-inverted OUT NIO3.31 96 J3 Input/Output Bit 32 Non-inverted OUT NIO3.32 J4 : FIRST LEVEL CALORIMETER TRIGGER APPLICATION CARD 96 PIN CONNECTOR ----------------------------------------------------------------------------- Pin Function Mnemonic ----------------------------------------------------------------------------- 1 Ground GND 2 Ground GND 3 Ground GND 4 Ground GND 5 Ground GND 6 Unused 7 Power -2.0 V VTT 8 Power -2.0 V VTT 9 Power -2.0 V VTT 10 Power -2.0 V VTT 11 Unused 12 Power -4.5 V | Power -5.2V VEE 13 Power -4.5 V | Power -5.2V VEE 14 Power -4.5 V | Power -5.2V VEE 15 Power -4.5 V | Power -5.2V VEE 16 Unused 17 Power -4.5 V | Power -5.2V VEE 18 Power -4.5 V | Power -5.2V VEE 19 Power -4.5 V | Power -5.2V VEE 20 Power -4.5 V | Power -5.2V VEE 21 Unused 22 Ground GND 23 Ground GND 24 Ground GND 25 Ground GND 26 Ground GND 27 Ground GND 28 Ground GND 29 Ground GND 30 Ground GND 31 Ground GND 32 Ground GND 33 Timing & Sync. Signal A Inverted IN ITSA 34 Timing & Sync. Signal B Inverted IN ITSB 35 Timing & Sync. Signal C Inverted IN ITSC 36 Timing & Sync. Signal D Inverted IN ITSD 37 Timing & Sync. Signal E Inverted IN ITSE 38 Timing & Sync. Signal F Inverted IN ITSF 39 Timing & Sync. Signal G Inverted IN ITSG 40 Timing & Sync. Signal H Inverted IN ITSH 41 Card Address Bit#1 Inverted IN IAC1 42 Card Address Bit#2 Inverted IN IAC2 43 Card Address Bit#3 Inverted IN IAC3 44 Card Address Bit#4 Inverted IN IAC4 45 Card Address Bit#5 Inverted IN IAC5 46 Card Address Bit#6 Inverted IN IAC6 47 Function Address Bit#1 Inverted IN IAF1 48 Function Address Bit#2 Inverted IN IAF2 49 Function Address Bit#3 Inverted IN IAF3 50 Function Address Bit#4 Inverted IN IAF4 51 Function Address Bit#5 Inverted IN IAF5 52 Function Address Bit#6 Inverted IN IAF6 53 Function Address Bit#7 Inverted IN IAF7 54 Function Address Bit#8 Inverted IN IAF8 55 Strobe Inverted IN ISTB 56 Direction Inverted IN IDIR 57 Bidirectional Data Bit#1 Inverted IDB1 58 Bidirectional Data Bit#2 Inverted IDB2 59 Bidirectional Data Bit#3 Inverted IDB3 60 Bidirectional Data Bit#4 Inverted IDB4 61 Bidirectional Data Bit#5 Inverted IDB5 62 Bidirectional Data Bit#6 Inverted IDB6 63 Bidirectional Data Bit#7 Inverted IDB7 64 Bidirectional Data Bit#8 Inverted IDB8 65 Timing & Sync. Signal A Non-inverted IN NTSA 66 Timing & Sync. Signal B Non-inverted IN NTSB 67 Timing & Sync. Signal C Non-inverted IN NTSC 68 Timing & Sync. Signal D Non-inverted IN NTSD 69 Timing & Sync. Signal E Non-inverted IN NTSE 70 Timing & Sync. Signal F Non-inverted IN NTSF 71 Timing & Sync. Signal G Non-inverted IN NTSG 72 Timing & Sync. Signal H Non-inverted IN NTSH 73 Card Address Bit#1 Non-inverted IN NAC1 74 Card Address Bit#2 Non-inverted IN NAC2 75 Card Address Bit#3 Non-inverted IN NAC3 76 Card Address Bit#4 Non-inverted IN NAC4 77 Card Address Bit#5 Non-inverted IN NAC5 78 Card Address Bit#6 Non-inverted IN NAC6 79 Function Address Bit#1 Non-inverted IN NAF1 80 Function Address Bit#2 Non-inverted IN NAF2 81 Function Address Bit#3 Non-inverted IN NAF3 82 Function Address Bit#4 Non-inverted IN NAF4 83 Function Address Bit#5 Non-inverted IN NAF5 84 Function Address Bit#6 Non-inverted IN NAF6 85 Function Address Bit#7 Non-inverted IN NAF7 86 Function Address Bit#8 Non-inverted IN NAF8 87 Strobe Non-inverted IN NSTB 88 Direction Non-inverted IN NDIR 89 Bidirectional Data Bit#1 Non-inverted NDB1 90 Bidirectional Data Bit#2 Non-inverted NDB2 91 Bidirectional Data Bit#3 Non-inverted NDB3 92 Bidirectional Data Bit#4 Non-inverted NDB4 93 Bidirectional Data Bit#5 Non-inverted NDB5 94 Bidirectional Data Bit#6 Non-inverted NDB6 95 Bidirectional Data Bit#7 Non-inverted NDB7 96 Bidirectional Data Bit#8 Non-inverted NDB8 J101: FIRST LEVEL TRIGGER FRAMEWORK BACKPLANE 140 PIN CONNECTOR ----------------------------------------------------------------------------- Pin Function Mnemonic ----------------------------------------------------------------------------- 1 Ground GND 2 Ground GND 3 J101-L Input/Output Bit 1 Non-inverted OUT NIO101L.1 4 J101-L Input/Output Bit 1 Inverted OUT IIO101L.1 5 J101-L Input/Output Bit 2 Non-inverted OUT NIO101L.2 6 J101-L Input/Output Bit 2 Inverted OUT IIO101L.2 7 J101-L Input/Output Bit 3 Non-inverted OUT NIO101L.3 8 J101-L Input/Output Bit 3 Inverted OUT IIO101L.3 9 J101-L Input/Output Bit 4 Non-inverted OUT NIO101L.4 10 J101-L Input/Output Bit 4 Inverted OUT IIO101L.4 11 J101-L Input/Output Bit 5 Non-inverted OUT NIO101L.5 12 J101-L Input/Output Bit 5 Inverted OUT IIO101L.5 13 J101-L Input/Output Bit 6 Non-inverted OUT NIO101L.6 14 J101-L Input/Output Bit 6 Inverted OUT IIO101L.6 15 J101-L Input/Output Bit 7 Non-inverted OUT NIO101L.7 16 J101-L Input/Output Bit 7 Inverted OUT IIO101L.7 17 J101-L Input/Output Bit 8 Non-inverted OUT NIO101L.8 18 J101-L Input/Output Bit 8 Inverted OUT IIO101L.8 19 J101-L Input/Output Bit 9 Non-inverted OUT NIO101L.9 20 J101-L Input/Output Bit 9 Inverted OUT IIO101L.9 21 J101-L Input/Output Bit 10 Non-inverted OUT NIO101L.10 22 J101-L Input/Output Bit 10 Inverted OUT IIO101L.10 23 J101-L Input/Output Bit 11 Non-inverted OUT NIO101L.11 24 J101-L Input/Output Bit 11 Inverted OUT IIO101L.11 25 J101-L Input/Output Bit 12 Non-inverted OUT NIO101L.12 26 J101-L Input/Output Bit 12 Inverted OUT IIO101L.12 27 J101-L Input/Output Bit 13 Non-inverted OUT NIO101L.13 28 J101-L Input/Output Bit 13 Inverted OUT IIO101L.13 29 J101-L Input/Output Bit 14 Non-inverted OUT NIO101L.14 30 J101-L Input/Output Bit 14 Inverted OUT IIO101L.14 31 J101-L Input/Output Bit 15 Non-inverted OUT NIO101L.15 32 J101-L Input/Output Bit 15 Inverted OUT IIO101L.15 33 J101-L Input/Output Bit 16 Non-inverted OUT NIO101L.16 34 J101-L Input/Output Bit 16 Inverted OUT IIO101L.16 35 J101-L Input/Output Bit 17 Non-inverted OUT NIO101L.17 36 J101-L Input/Output Bit 17 Inverted OUT IIO101L.17 37 J101-L Input/Output Bit 18 Non-inverted OUT NIO101L.18 38 J101-L Input/Output Bit 18 Inverted OUT IIO101L.18 39 J101-L Input/Output Bit 19 Non-inverted OUT NIO101L.19 40 J101-L Input/Output Bit 19 Inverted OUT IIO101L.19 41 J101-L Input/Output Bit 20 Non-inverted OUT NIO101L.20 42 J101-L Input/Output Bit 20 Inverted OUT IIO101L.20 43 J101-L Input/Output Bit 21 Non-inverted OUT NIO101L.21 44 J101-L Input/Output Bit 21 Inverted OUT IIO101L.21 45 J101-L Input/Output Bit 22 Non-inverted OUT NIO101L.22 46 J101-L Input/Output Bit 22 Inverted OUT IIO101L.22 47 J101-L Input/Output Bit 23 Non-inverted OUT NIO101L.23 48 J101-L Input/Output Bit 23 Inverted OUT IIO101L.23 49 J101-L Input/Output Bit 24 Non-inverted OUT NIO101L.24 50 J101-L Input/Output Bit 24 Inverted OUT IIO101L.24 51 J101-L Input/Output Bit 25 Non-inverted OUT NIO101L.25 52 J101-L Input/Output Bit 25 Inverted OUT IIO101L.25 53 J101-L Input/Output Bit 26 Non-inverted OUT NIO101L.26 54 J101-L Input/Output Bit 26 Inverted OUT IIO101L.26 55 J101-L Input/Output Bit 27 Non-inverted OUT NIO101L.27 56 J101-L Input/Output Bit 27 Inverted OUT IIO101L.27 57 J101-L Input/Output Bit 28 Non-inverted OUT NIO101L.28 58 J101-L Input/Output Bit 28 Inverted OUT IIO101L.28 59 J101-L Input/Output Bit 29 Non-inverted OUT NIO101L.29 60 J101-L Input/Output Bit 29 Inverted OUT IIO101L.29 61 J101-L Input/Output Bit 30 Non-inverted OUT NIO101L.30 62 J101-L Input/Output Bit 30 Inverted OUT IIO101L.30 63 J101-L Input/Output Bit 31 Non-inverted OUT NIO101L.31 64 J101-L Input/Output Bit 31 Inverted OUT IIO101L.31 65 J101-L Input/Output Bit 32 Non-inverted OUT NIO101L.32 66 J101-L Input/Output Bit 32 Inverted OUT IIO101L.32 67 Ground GND 68 Ground GND 69 Power +5.0 V VCC 70 Power +5.0 V VCC 71 Power -5.2 V VEE 72 Power -5.2 V VEE 73 Ground GND 74 Ground GND 75 J101-U Input/Output Bit 1 Non-inverted OUT NIO101U.1 76 J101-U Input/Output Bit 1 Inverted OUT IIO101U.1 77 J101-U Input/Output Bit 2 Non-inverted OUT NIO101U.2 78 J101-U Input/Output Bit 2 Inverted OUT IIO101U.2 79 J101-U Input/Output Bit 3 Non-inverted OUT NIO101U.3 80 J101-U Input/Output Bit 3 Inverted OUT IIO101U.3 81 J101-U Input/Output Bit 4 Non-inverted OUT NIO101U.4 82 J101-U Input/Output Bit 4 Inverted OUT IIO101U.4 83 J101-U Input/Output Bit 5 Non-inverted OUT NIO101U.5 84 J101-U Input/Output Bit 5 Inverted OUT IIO101U.5 85 J101-U Input/Output Bit 6 Non-inverted OUT NIO101U.6 86 J101-U Input/Output Bit 6 Inverted OUT IIO101U.6 87 J101-U Input/Output Bit 7 Non-inverted OUT NIO101U.7 88 J101-U Input/Output Bit 7 Inverted OUT IIO101U.7 89 J101-U Input/Output Bit 8 Non-inverted OUT NIO101U.8 90 J101-U Input/Output Bit 8 Inverted OUT IIO101U.8 91 J101-U Input/Output Bit 9 Non-inverted OUT NIO101U.9 92 J101-U Input/Output Bit 9 Inverted OUT IIO101U.9 93 J101-U Input/Output Bit 10 Non-inverted OUT NIO101U.10 94 J101-U Input/Output Bit 10 Inverted OUT IIO101U.10 95 J101-U Input/Output Bit 11 Non-inverted OUT NIO101U.11 96 J101-U Input/Output Bit 11 Inverted OUT IIO101U.11 97 J101-U Input/Output Bit 12 Non-inverted OUT NIO101U.12 98 J101-U Input/Output Bit 12 Inverted OUT IIO101U.12 99 J101-U Input/Output Bit 13 Non-inverted OUT NIO101U.13 100 J101-U Input/Output Bit 13 Inverted OUT IIO101U.13 101 J101-U Input/Output Bit 14 Non-inverted OUT NIO101U.14 102 J101-U Input/Output Bit 14 Inverted OUT IIO101U.14 103 J101-U Input/Output Bit 15 Non-inverted OUT NIO101U.15 104 J101-U Input/Output Bit 15 Inverted OUT IIO101U.15 105 J101-U Input/Output Bit 16 Non-inverted OUT NIO101U.16 106 J101-U Input/Output Bit 16 Inverted OUT IIO101U.16 107 J101-U Input/Output Bit 17 Non-inverted OUT NIO101U.17 108 J101-U Input/Output Bit 17 Inverted OUT IIO101U.17 109 J101-U Input/Output Bit 18 Non-inverted OUT NIO101U.18 110 J101-U Input/Output Bit 18 Inverted OUT IIO101U.18 111 J101-U Input/Output Bit 19 Non-inverted OUT NIO101U.19 112 J101-U Input/Output Bit 19 Inverted OUT IIO101U.19 113 J101-U Input/Output Bit 20 Non-inverted OUT NIO101U.20 114 J101-U Input/Output Bit 20 Inverted OUT IIO101U.20 115 J101-U Input/Output Bit 21 Non-inverted OUT NIO101U.21 116 J101-U Input/Output Bit 21 Inverted OUT IIO101U.21 117 J101-U Input/Output Bit 22 Non-inverted OUT NIO101U.22 118 J101-U Input/Output Bit 22 Inverted OUT IIO101U.22 119 J101-U Input/Output Bit 23 Non-inverted OUT NIO101U.23 120 J101-U Input/Output Bit 23 Inverted OUT IIO101U.23 121 J101-U Input/Output Bit 24 Non-inverted OUT NIO101U.24 122 J101-U Input/Output Bit 24 Inverted OUT IIO101U.24 123 J101-U Input/Output Bit 25 Non-inverted OUT NIO101U.25 124 J101-U Input/Output Bit 25 Inverted OUT IIO101U.25 125 J101-U Input/Output Bit 26 Non-inverted OUT NIO101U.26 126 J101-U Input/Output Bit 26 Inverted OUT IIO101U.26 127 J101-U Input/Output Bit 27 Non-inverted OUT NIO101U.27 128 J101-U Input/Output Bit 27 Inverted OUT IIO101U.27 129 J101-U Input/Output Bit 28 Non-inverted OUT NIO101U.28 130 J101-U Input/Output Bit 28 Inverted OUT IIO101U.28 131 J101-U Input/Output Bit 29 Non-inverted OUT NIO101U.29 132 J101-U Input/Output Bit 29 Inverted OUT IIO101U.29 133 J101-U Input/Output Bit 30 Non-inverted OUT NIO101U.30 134 J101-U Input/Output Bit 30 Inverted OUT IIO101U.30 135 J101-U Input/Output Bit 31 Non-inverted OUT NIO101U.31 136 J101-U Input/Output Bit 31 Inverted OUT IIO101U.31 137 J101-U Input/Output Bit 32 Non-inverted OUT NIO101U.32 138 J101-U Input/Output Bit 32 Inverted OUT IIO101U.32 139 Ground GND 140 Ground GND J102: FIRST LEVEL TRIGGER FRAMEWORK BACKPLANE 140 PIN CONNECTOR ----------------------------------------------------------------------------- Pin Function Mnemonic ----------------------------------------------------------------------------- 1 Ground GND 2 Ground GND 3 J102-L Input/Output Bit 1 Non-inverted OUT NIO102L.1 4 J102-L Input/Output Bit 1 Inverted OUT IIO102L.1 5 J102-L Input/Output Bit 2 Non-inverted OUT NIO102L.2 6 J102-L Input/Output Bit 2 Inverted OUT IIO102L.2 7 J102-L Input/Output Bit 3 Non-inverted OUT NIO102L.3 8 J102-L Input/Output Bit 3 Inverted OUT IIO102L.3 9 J102-L Input/Output Bit 4 Non-inverted OUT NIO102L.4 10 J102-L Input/Output Bit 4 Inverted OUT IIO102L.4 11 J102-L Input/Output Bit 5 Non-inverted OUT NIO102L.5 12 J102-L Input/Output Bit 5 Inverted OUT IIO102L.5 13 J102-L Input/Output Bit 6 Non-inverted OUT NIO102L.6 14 J102-L Input/Output Bit 6 Inverted OUT IIO102L.6 15 J102-L Input/Output Bit 7 Non-inverted OUT NIO102L.7 16 J102-L Input/Output Bit 7 Inverted OUT IIO102L.7 17 J102-L Input/Output Bit 8 Non-inverted OUT NIO102L.8 18 J102-L Input/Output Bit 8 Inverted OUT IIO102L.8 19 J102-L Input/Output Bit 9 Non-inverted OUT NIO102L.9 20 J102-L Input/Output Bit 9 Inverted OUT IIO102L.9 21 J102-L Input/Output Bit 10 Non-inverted OUT NIO102L.10 22 J102-L Input/Output Bit 10 Inverted OUT IIO102L.10 23 J102-L Input/Output Bit 11 Non-inverted OUT NIO102L.11 24 J102-L Input/Output Bit 11 Inverted OUT IIO102L.11 25 J102-L Input/Output Bit 12 Non-inverted OUT NIO102L.12 26 J102-L Input/Output Bit 12 Inverted OUT IIO102L.12 27 J102-L Input/Output Bit 13 Non-inverted OUT NIO102L.13 28 J102-L Input/Output Bit 13 Inverted OUT IIO102L.13 29 J102-L Input/Output Bit 14 Non-inverted OUT NIO102L.14 30 J102-L Input/Output Bit 14 Inverted OUT IIO102L.14 31 J102-L Input/Output Bit 15 Non-inverted OUT NIO102L.15 32 J102-L Input/Output Bit 15 Inverted OUT IIO102L.15 33 J102-L Input/Output Bit 16 Non-inverted OUT NIO102L.16 34 J102-L Input/Output Bit 16 Inverted OUT IIO102L.16 35 J102-L Input/Output Bit 17 Non-inverted OUT NIO102L.17 36 J102-L Input/Output Bit 17 Inverted OUT IIO102L.17 37 J102-L Input/Output Bit 18 Non-inverted OUT NIO102L.18 38 J102-L Input/Output Bit 18 Inverted OUT IIO102L.18 39 J102-L Input/Output Bit 19 Non-inverted OUT NIO102L.19 40 J102-L Input/Output Bit 19 Inverted OUT IIO102L.19 41 J102-L Input/Output Bit 20 Non-inverted OUT NIO102L.20 42 J102-L Input/Output Bit 20 Inverted OUT IIO102L.20 43 J102-L Input/Output Bit 21 Non-inverted OUT NIO102L.21 44 J102-L Input/Output Bit 21 Inverted OUT IIO102L.21 45 J102-L Input/Output Bit 22 Non-inverted OUT NIO102L.22 46 J102-L Input/Output Bit 22 Inverted OUT IIO102L.22 47 J102-L Input/Output Bit 23 Non-inverted OUT NIO102L.23 48 J102-L Input/Output Bit 23 Inverted OUT IIO102L.23 49 J102-L Input/Output Bit 24 Non-inverted OUT NIO102L.24 50 J102-L Input/Output Bit 24 Inverted OUT IIO102L.24 51 J102-L Input/Output Bit 25 Non-inverted OUT NIO102L.25 52 J102-L Input/Output Bit 25 Inverted OUT IIO102L.25 53 J102-L Input/Output Bit 26 Non-inverted OUT NIO102L.26 54 J102-L Input/Output Bit 26 Inverted OUT IIO102L.26 55 J102-L Input/Output Bit 27 Non-inverted OUT NIO102L.27 56 J102-L Input/Output Bit 27 Inverted OUT IIO102L.27 57 J102-L Input/Output Bit 28 Non-inverted OUT NIO102L.28 58 J102-L Input/Output Bit 28 Inverted OUT IIO102L.28 59 J102-L Input/Output Bit 29 Non-inverted OUT NIO102L.29 60 J102-L Input/Output Bit 29 Inverted OUT IIO102L.29 61 J102-L Input/Output Bit 30 Non-inverted OUT NIO102L.30 62 J102-L Input/Output Bit 30 Inverted OUT IIO102L.30 63 J102-L Input/Output Bit 31 Non-inverted OUT NIO102L.31 64 J102-L Input/Output Bit 31 Inverted OUT IIO102L.31 65 J102-L Input/Output Bit 32 Non-inverted OUT NIO102L.32 66 J102-L Input/Output Bit 32 Inverted OUT IIO102L.32 67 Ground GND 68 Ground GND 69 Power +5.0 V VCC 70 Power +5.0 V VCC 71 Power -5.2 V VEE 72 Power -5.2 V VEE 73 Ground GND 74 Ground GND 75 Timing & Sync. Signal A Non-inverted IN NTSA 76 Timing & Sync. Signal A Inverted IN ITSA 77 Timing & Sync. Signal B Non-inverted IN NTSB 78 Timing & Sync. Signal B Inverted IN ITSB 79 Timing & Sync. Signal C Non-inverted IN NTSC 80 Timing & Sync. Signal C Inverted IN ITSC 81 Timing & Sync. Signal D Non-inverted IN NTSD 82 Timing & Sync. Signal D Inverted IN ITSD 83 Timing & Sync. Signal E Non-inverted IN NTSE 84 Timing & Sync. Signal E Inverted IN ITSE 85 Timing & Sync. Signal F Non-inverted IN NTSF 86 Timing & Sync. Signal F Inverted IN ITSF 87 Timing & Sync. Signal G Non-inverted IN NTSG 88 Timing & Sync. Signal G Inverted IN ITSG 89 Timing & Sync. Signal H Non-inverted IN NTSH 90 Timing & Sync. Signal H Inverted IN ITSH 91 Card Address Bit#1 Non-inverted IN NAC1 92 Card Address Bit#1 Inverted IN IAC1 93 Card Address Bit#2 Non-inverted IN NAC2 94 Card Address Bit#2 Inverted IN IAC2 95 Card Address Bit#3 Non-inverted IN NAC3 96 Card Address Bit#3 Inverted IN IAC3 97 Card Address Bit#4 Non-inverted IN NAC4 98 Card Address Bit#4 Inverted IN IAC4 99 Card Address Bit#5 Non-inverted IN NAC5 100 Card Address Bit#5 Inverted IN IAC5 101 Card Address Bit#6 Non-inverted IN NAC6 102 Card Address Bit#6 Inverted IN IAC6 103 Function Address Bit#1 Non-inverted IN NAF1 104 Function Address Bit#1 Inverted IN IAF1 105 Function Address Bit#2 Non-inverted IN NAF2 106 Function Address Bit#2 Inverted IN IAF2 107 Function Address Bit#3 Non-inverted IN NAF3 108 Function Address Bit#3 Inverted IN IAF3 109 Function Address Bit#4 Non-inverted IN NAF4 110 Function Address Bit#4 Inverted IN IAF4 111 Function Address Bit#5 Non-inverted IN NAF5 112 Function Address Bit#5 Inverted IN IAF5 113 Function Address Bit#6 Non-inverted IN NAF6 114 Function Address Bit#6 Inverted IN IAF6 115 Function Address Bit#7 Non-inverted IN NAF7 116 Function Address Bit#7 Inverted IN IAF7 117 Function Address Bit#8 Non-inverted IN NAF8 118 Function Address Bit#8 Inverted IN IAF8 119 Strobe Non-inverted IN NSTB 120 Strobe Inverted IN ISTB 121 Direction Non-inverted IN NDIR 122 Direction Inverted IN IDIR 123 Bidirectional Data Bit#1 Non-inverted IN NDB1 124 Bidirectional Data Bit#1 Inverted IN IDB1 125 Bidirectional Data Bit#2 Non-inverted IN NDB2 126 Bidirectional Data Bit#2 Inverted IN IDB2 127 Bidirectional Data Bit#3 Non-inverted IN NDB3 128 Bidirectional Data Bit#3 Inverted IN IDB3 129 Bidirectional Data Bit#4 Non-inverted IN NDB4 130 Bidirectional Data Bit#4 Inverted IN IDB4 131 Bidirectional Data Bit#5 Non-inverted IN NDB5 132 Bidirectional Data Bit#5 Inverted IN IDB5 133 Bidirectional Data Bit#6 Non-inverted IN NDB6 134 Bidirectional Data Bit#6 Inverted IN IDB6 135 Bidirectional Data Bit#7 Non-inverted IN NDB7 136 Bidirectional Data Bit#7 Inverted IN IDB7 137 Bidirectional Data Bit#8 Non-inverted IN NDB8 138 Bidirectional Data Bit#8 Inverted IN IDB8 139 Ground GND 140 Ground GND APPENDIX 1: COMPARISON OF POWER SUPPLY PINS ON THE CAT2, CAT3, WPA, ---------- CTMBD, AND CCCP CAT2 CAT3 CTMBD WPA CCCP NOTES Pin J1 Pin J1 Pin J1 --- ---------- --- ---------- --- ------------ 1 Ground 1 Ground 1 Ground 2 Ground 2 Ground 2 Ground 3 Ground 3 Ground 3 Ground 4 Ground 4 Ground 4 Ground 5 Ground 5 Ground 5 Ground 6 Ground 6 Ground 6 Ground 7 Ground 7 Ground 7 Ground 8 Ground 8 Ground 8 Ground 9 Ground 9 Ground 9 Ground 10 Ground 10 Ground 10 Ground 11 Ground 11 Ground 11 Ground 12 Unused 12 Unused 12 Unused 13 Power -5.2 13 Power -4.5 13 Power -4.5/-5.2 14 Power -5.2 14 Power -4.5 14 Power -4.5/-5.2 15 Power -5.2 15 Power -4.5 15 Power -4.5/-5.2 16 Power -5.2 16 Power -4.5 16 Power -4.5/-5.2 17 Unused 17 Unused 17 Unused 18 Power -5.2 18 Power -4.5 18 Power -4.5/-5.2 19 Power -5.2 19 Power -4.5 19 Power -4.5/-5.2 20 Power -5.2 20 Power -4.5 20 Power -4.5/-5.2 21 Power -5.2 21 Power -4.5 21 Power -4.5/-5.2 22 Unused 22 Unused 22 Unused 23 Power -2.0 23 Power -2.0 23 Power -2.0 24 Power -2.0 24 Power -2.0 24 Power -2.0 25 Power -2.0 25 Power -2.0 25 Power -2.0 26 Power -2.0 26 Power -2.0 26 Power -2.0 27 Unused 27 Unused 27 Unused 28 Ground 28 Ground 28 Ground 29 Ground 29 Ground 29 Ground 30 Ground 30 Ground 30 Ground 31 Ground 31 Ground 31 Ground 32 Ground 32 Ground 32 Ground CAT2 CAT3 CTMBD WPA CCCP Pin J2 Pin J2 Pin J2 --- ---------- --- ---------- --- ----------- 1 Ground 1 Ground 1 Ground 2 Ground 2 Ground 2 Ground 3 Ground 3 Ground 3 Ground 4 Ground 4 Ground 4 Ground 5 Ground 5 Ground 5 Ground 6 Ground 6 Ground 6 Ground 7 Unused 7 Unused 7 Unused 8 Power -2.0 8 Power -2.0 8 Power -2.0 9 Power -2.0 9 Power -2.0 9 Power -2.0 10 Power -2.0 10 Power -2.0 10 Power -2.0 11 Power -2.0 11 Power -2.0 11 Power -2.0 12 Unused 12 Unused 12 Unused 13 Ground 13 Power -4.5 13 Power -4.5/-5.2 (1) 14 Ground 14 Power -4.5 14 Power -4.5/-5.2 (1) 15 Ground 15 Power -4.5 15 Power -4.5/-5.2 (1) 16 Ground 16 Power -4.5 16 Power -4.5/-5.2 (1) 17 Unused 17 Unused 17 Unused 18 Ground 18 Power -4.5 18 Power -4.5/-5.2 (1) 19 Ground 19 Power -4.5 19 Power -4.5/-5.2 (1) 20 Ground 20 Power -4.5 20 Power -4.5/-5.2 (1) 21 Ground 21 Power -4.5 21 Power -4.5/-5.2 (1) 22 Unused 22 Unused 22 Unused 23 Power +5.0 23 Power +5.0 23 Power +5.0 24 Power +5.0 24 Power +5.0 24 Power +5.0 25 Power +5.0 25 Power +5.0 25 Power +5.0 26 Power +5.0 26 Power +5.0 26 Power +5.0 27 Unused 27 Unused 27 Unused 28 Ground 28 Ground 28 Ground 29 Ground 29 Ground 29 Ground 30 Ground 30 Ground 30 Ground 31 Ground 31 Ground 31 Ground 32 Ground 32 Ground 32 Ground CAT2 CAT3 CTMBD WPA CCCP Pin J3 Pin J3 Pin J3 --- ---------- --- ---------- --- ----------- 1 Ground 1 Ground 1 Ground 2 Ground 2 Ground 2 Ground 3 Ground 3 Ground 3 Ground 4 Ground 4 Ground 4 Ground 5 Ground 5 Ground 5 Ground 6 Unused 6 Unused 6 Unused 7 Power +5.0 7 Power +5.0 7 Power +5.0 8 Power +5.0 8 Power +5.0 8 Power +5.0 9 Power +5.0 9 Power +5.0 9 Power +5.0 10 Power +5.0 10 Power +5.0 10 Power +5.0 11 Unused 11 Unused 11 Unused 12 Ground 12 Power -4.5 12 Power -4.5/-5.2 (1) 13 Ground 13 Power -4.5 13 Power -4.5/-5.2 (1) 14 Ground 14 Power -4.5 14 Power -4.5/-5.2 (1) 15 Ground 15 Power -4.5 15 Power -4.5/-5.2 (1) 16 Unused 16 Unused 16 Unused 17 Ground 17 Power -4.5 17 Power -4.5/-5.2 (1) 18 Ground 18 Power -4.5 18 Power -4.5/-5.2 (1) 19 Ground 19 Power -4.5 19 Power -4.5/-5.2 (1) 20 Ground 20 Power -4.5 20 Power -4.5/-5.2 (1) 21 Unused 21 Unused 21 Unused 22 Power -2.0 22 Power -2.0 22 Power -2.0 23 Power -2.0 23 Power -2.0 23 Power -2.0 24 Power -2.0 24 Power -2.0 24 Power -2.0 25 Power -2.0 25 Power -2.0 25 Power -2.0 26 Unused 26 Unused 26 Unused 27 Ground 27 Ground 27 Ground 28 Ground 28 Ground 28 Ground 29 Ground 29 Ground 29 Ground 30 Ground 30 Ground 30 Ground 31 Ground 31 Ground 31 Ground 32 Ground 32 Ground 32 Ground CAT2 CAT3 CTMBD WPA CCCP Pin J4 Pin J4 Pin J4 --- ---------- --- ---------- --- ----------- 1 Ground 1 Ground 1 Ground 2 Ground 2 Ground 2 Ground 3 Ground 3 Ground 3 Ground 4 Ground 4 Ground 4 Ground 5 Ground 5 Ground 5 Ground 6 Unused 6 Unused 6 Unused 7 Power -2.0 7 Power -2.0 7 Power -2.0 8 Power -2.0 8 Power -2.0 8 Power -2.0 9 Power -2.0 9 Power -2.0 9 Power -2.0 10 Power -2.0 10 Power -2.0 10 Power -2.0 11 Unused 11 Unused 11 Unused 12 Power -5.2 12 Power -4.5 12 Power -4.5/-5.2 13 Power -5.2 13 Power -4.5 13 Power -4.5/-5.2 14 Power -5.2 14 Power -4.5 14 Power -4.5/-5.2 15 Power -5.2 15 Power -4.5 15 Power -4.5/-5.2 16 Unused 16 Unused 16 Unused 17 Power -5.2 17 Power -4.5 17 Power -4.5/-5.2 18 Power -5.2 18 Power -4.5 18 Power -4.5/-5.2 19 Power -5.2 19 Power -4.5 19 Power -4.5/-5.2 20 Power -5.2 20 Power -4.5 20 Power -4.5/-5.2 21 Unused 21 Unused 21 Unused 22 Ground 22 Ground 22 Ground 23 Ground 23 Ground 23 Ground 24 Ground 24 Ground 24 Ground 25 Ground 25 Ground 25 Ground 26 Ground 26 Ground 26 Ground 27 Ground 27 Ground 27 Ground 28 Ground 28 Ground 28 Ground 29 Ground 29 Ground 29 Ground 30 Ground 30 Ground 30 Ground 31 Ground 31 Ground 31 Ground 32 Ground 32 Ground 32 Ground Notes: (1) CCCP J2 pins 13-16, 18-21 and J3 pins 12-15, 17-20 must be removed when the CCCP is used to install a CTMBD in a Framework Backplane, otherwise a short circuit exists between the CCCP -5.2V plane and the CTMBD GROUND plane APPENDIX 2: BUILDING A CCCP TO ALLOW A CTMBD TO REPLACE A (FW)MBD ---------- Two things must be done to use a CCCP and CTMBD to replace a (Framework) MBD. First, the power pin distribution on a CTMBD is not identical to the power pin distribution on a CCCP, as noted directly above. To compensate, do the following on the CCCP (as described above): REMOVE PINS: J2 pins 13-16 J2 pins 18-21 J3 pins 12-15 J3 pins 17-20 Next, if the CTMBD needs to support a front panel CBUS (that is, it drives an IML, IMLRO, AOC, DGM, or TLM card), a 64-pin right-angle male connector needs to be installed on the via section provided for this purpose near J4 on the CCCP. This connector must be a Samtek-style connector, which looks like the standard Samtek wire wrap posts except for the 90 degree bend. The short pins which are soldered into the board must be bent to allow the long pins to "stick up" a bit (rather than be parallel to the board). The appropriate amount of bend gives a 20 to 30 degree angle between the long pins and the CCCP. The soldering must be done very carefully because the short pins will not protrude very far (or at all) through the board. The typical installation places this connector on the TOP side of the CCCP, and in the REAR TWO ROWS of pins. This provides a connector which is 100% electrically the same as the (FW)MBD front panel CBUS connector (NINV on the top row, INV on the bottom row, TSS-A on the left, and DATA BIT 8 on the right). If used to replace an existing (FW)MBD, this will require replacing the old Specific Backplane Bus cable with one that can reache this connector. It is also possible to place the connector in the front two rows of pins and make an extension cable, which would mate directly with the new connector, and pass through a female-to-female polarity-inverting connector to reach the old Specific Backplane Bus cable.