WIRING BETWEEN THE FSTD and SBSC ***************************************** 2-NOV-1988 modified 12-DEC-1989 The outputs from the FSTD to control the SBSC gates are active LOW i.e. the FSTD gate control outputs to the SBSC go LOW when the SBSC should be incrementing. This matches the SBSC individual Gate Inputs which are also active LOW. Note that these Individual Gate Inputs on the SBSC card are LOW by default when nothing is connected to them, thus enabling the SBSC to increment when nothing is connected to control the Individual Gate Inputs. The SBSC uses Timing and Synchronization Signal E as its Increment Scaler (Clock) signal. The connection between the FSTD and SBSC is made with four twisted-pair harnesses, each with AMP 16-contact headers on each end. Each harness has 7 twisted pairs between the FSTD and SBSC (signal pairs 1-2 through signal pairs 13-14. On the FSTD end, contact pair 15-16 must be filed off to leave the AND-OR FIRED output pins on the backplane exposed. The cable harnesses are to be made with wires that are 4" long, and should be loaded with the red wire on top on both ends. A special SBSC is required to count AND-OR FIRED signals. This SBSC resides in rack M102, top middle backplane, slot 19. It is addressed as MBA = 68, CA = 55. It receives the FSTD AND-OR FIRED signals on its back-panel gate inputs using two twisted-pair cable harnesses. On the SBSC end, each harness ends in an AMP 34-contact header, loaded with red on top. On the FSTD end, each harness ends in 16 AMP 2-contact headers, which are placed on the AND-OR FIRED pins that were exposed by filing the 16-contact headers. They are loaded with black on top (this may change with the nature of the clock signal given to the special SBSC). FSTD AND-OR FIRED #1 appears on SBSC GATE CONTROL #1. The AND-OR FIRED count SBSC is therefore wired with its inputs in reverse order (SPECIFIC TRIGGER #1 FIRED is counted using CHANNEL #32) and reverse polarity. The AND-OR FIRED count SBSC receives its clock signal on J2 pins 3 and 4 (the original INCREMENT SCALER signal). The clock is simply the DBSC Increment Scaler signal that daisy-chains through the 8 DBSC cards in that backplane, with an inversion. That is, the cable should be loaded on the SBSC end with black on top. The 110 Ohm termination resistor should be installed to act as a terminator for this long clock line. The signals are mapped as follows: FSTD J1 SBSC J1 CONNECTOR SIGNAL CONNECTOR PIN PAIR PIN PAIR --------- ------ --------- 75 & 76 PRE-SCL DS FSTD CHAN #1 75 & 76 77 & 78 LEVEL 1.5 DS FSTD CHAN #1 77 & 78 79 & 80 LEVEL 2.0 DS FSTD CHAN #1 79 & 80 81 & 82 AUX 1 DISABLE FSTD CHAN #1 81 & 82 83 & 84 AUX 2 DISABLE FSTD CHAN #1 83 & 84 85 & 86 AUX 3 DISABLE FSTD CHAN #1 85 & 86 87 & 88 AUTO-DISABLE FSTD CHAN #1 87 & 88 89 & 90 AND-OR HIT FSTD CHAN #1 (AND-OR FIRED SBSC higher channel number) 91 & 92 PRE-SCL DS FSTD CHAN #2 91 & 92 93 & 94 LEVEL 1.5 DS FSTD CHAN #2 93 & 94 95 & 96 LEVEL 2.0 DS FSTD CHAN #2 95 & 96 97 & 98 AUX 1 DISABLE FSTD CHAN #2 97 & 98 99 & 100 AUX 2 DISABLE FSTD CHAN #2 99 & 100 101 & 102 AUX 3 DISABLE FSTD CHAN #2 101 & 102 103 & 104 AUTO-DISABLE FSTD CHAN #2 103 & 104 105 & 106 AND-OR HIT FSTD CHAN #2 (AND-OR FIRED SBSC) 107 & 108 PRE-SCL DS FSTD CHAN #3 107 & 108 109 & 110 LEVEL 1.5 DS FSTD CHAN #3 109 & 110 111 & 112 LEVEL 2.0 DS FSTD CHAN #3 111 & 112 113 & 114 AUX 1 DISABLE FSTD CHAN #3 113 & 114 115 & 116 AUX 2 DISABLE FSTD CHAN #3 115 & 116 117 & 118 AUX 3 DISABLE FSTD CHAN #3 117 & 118 119 & 120 AUTO-DISABLE FSTD CHAN #3 119 & 120 121 & 122 AND-OR HIT FSTD CHAN #3 (AND-OR FIRED SBSC) 123 & 124 PRE-SCL DS FSTD CHAN #4 123 & 124 125 & 126 LEVEL 1.5 DS FSTD CHAN #4 125 & 126 127 & 128 LEVEL 2.0 DS FSTD CHAN #4 127 & 128 129 & 130 AUX 1 DISABLE FSTD CHAN #4 129 & 130 131 & 132 AUX 2 DISABLE FSTD CHAN #4 131 & 132 133 & 134 AUX 3 DISABLE FSTD CHAN #4 133 & 134 135 & 136 AUTO-DISABLE FSTD CHAN #4 135 & 136 137 & 138 AND-OR HIT FSTD CHAN #4 (AND-OR FIRED SBSC lower channel number)