---------------------------------------------------------------- ! ! ! D0 FIRST LEVEL TRIGGER SYSTEM ANDOR CARD ! ! ! ---------------------------------------------------------------- Michigan State University - 2-Jun-1987 Rev. 5-JUN-1995 GENERAL DESCRIPTION The ANDOR card is used in the Trigger Framework. These cards form a computer programmable matrix which allows the logical combination of experiment triggers (level zero triggers, calorimeter triggers etc) into specific triggers. The experiment triggers are supplied to the ANDOR card from an IML card of which there is 1 per MOTHERBOARD. A total of 64 of these cards will occupy 16 slots in the bottom two mother boards in the two racks that make up the trigger framework. The ANDOR card receives its experiment trigger inputs as 128 differential ECL signals on two connectors J1 and J2 from the mother board. Computer input is supplied on the front of the card via 32 differential ECL signals supplied via ribbon cable from the mother board driver card. The ANDOR card supplies one half of a specific trigger on two pins of a 34 pin front panel connector. This final specific trigger output is a differential ECL signal. The ANDOR card has 4 I/O connectors J1 through J4. Connectors J1 and J2 are D0 Trigger Framework backplane connectors. These connectors carry power onto the board and carry the 128 experiment triggers. Connector J3 is a 34 pin front panel connector. The specific trigger output is carried on two pins on this connector. The pair is determined by the position of the card in the rack and is selected by wire wrap jumpers on the board. Connector J4 is a 64 pin front panel connector. The computer bus (data, address, function code, and timing signals) is carried on this connector. The ANDOR card uses two power supplies. A power supply of +5.0 volts @3.5 amps is used for the bulk of the logic on the board. A power supply of -5.2 volts @ 2.0 amps is used for the differential ECL driver and receiver circuits in the I/O section. These supply voltages are brought on to the card through the backplane connectors J1 and J2. PROGRAMMING The ANDOR card has 32 eight bit programmable read/write registers. These registers are accessed with function codes 0 through 31. Each register controls 4 bits of external trigger input. When power is first applied these registers contain random data and must be programmed to contain the proper data by writing appropriate data to them. As an example consider the register selected by function code 0. The 4 low order bits (bits 0-3) of this word control the sense of experiment trigger bits 0-3. A 0 on these bits require the corresponding experiment trigger to be a 1 to be in the trigger. A 1 on these bits require the corresponding experiment trigger to be a 0 to be in the specific trigger. The 4 high order bits (bits 4-7) of this word select which bits will be used in forming a trigger. A 1 on one of these bits eliminates that bit from the trigger while a 0 on that bit select it for the trigger according to its sense bit. This information is summarized in the table below. trigger control bit trigger sense bit programmed result ---------------------------------------------------------- 0 0 must be high 0 1 must be low 1 0 not in trigger 1 1 not in trigger The following table is a bit list for the latch at function address 0 the other 31 function address's follow this convention. bit function ----------------------------- 0 trigger sense IL0 1 trigger sense IL1 2 trigger sense IL2 3 trigger sense IL3 4 trigger control IL0 5 trigger control IL1 6 trigger control IL2 7 trigger control IL3 The following table is a map for function codes 0-31. function code bits function ---------------------------------------------------- 0 0-3 trigger sense bits 0-3 0 4-7 trigger control bits 0-3 1 0-3 trigger sense bits 4-7 1 4-7 trigger control bits 4-7 2 0-3 trigger sense bits 8-11 2 4-7 trigger control bits 8-11 3 0-3 trigger sense bits 12-15 3 4-7 trigger control bits 12-15 4 0-3 trigger sense bits 16-19 4 4-7 trigger control bits 16-19 5 0-3 trigger sense bits 20-23 5 4-7 trigger control bits 20-23 6 0-3 trigger sense bits 24-27 6 4-7 trigger control bits 24-27 7 0-3 trigger sense bits 28-31 7 4-7 trigger control bits 28-31 8 0-3 trigger sense bits 32-35 8 4-7 trigger control bits 32-35 9 0-3 trigger sense bits 36-39 9 4-7 trigger control bits 36-39 10 0-3 trigger sense bits 40-43 10 4-7 trigger control bits 40-43 11 0-3 trigger sense bits 44-47 11 4-7 trigger control bits 44-47 12 0-3 trigger sense bits 48-51 12 4-7 trigger control bits 48-51 13 0-3 trigger sense bits 52-55 13 4-7 trigger control bits 52-55 14 0-3 trigger sense bits 56-59 14 4-7 trigger control bits 56-59 15 0-3 trigger sense bits 60-63 15 4-7 trigger control bits 60-63 16 0-3 trigger sense bits 64-67 16 4-7 trigger control bits 64-67 17 0-3 trigger sense bits 68-71 17 4-7 trigger control bits 68-71 18 0-3 trigger sense bits 72-75 18 4-7 trigger control bits 72-75 19 0-3 trigger sense bits 76-79 19 4-7 trigger control bits 76-79 20 0-3 trigger sense bits 80-83 20 4-7 trigger control bits 80-83 21 0-3 trigger sense bits 84-87 21 4-7 trigger control bits 84-87 22 0-3 trigger sense bits 88-91 22 4-7 trigger control bits 88-91 23 0-3 trigger sense bits 92-95 23 4-7 trigger control bits 92-95 24 0-3 trigger sense bits 96-99 24 4-7 trigger control bits 96-99 25 0-3 trigger sense bits 100-103 25 4-7 trigger control bits 100-103 26 0-3 trigger sense bits 104-107 26 4-7 trigger control bits 104-107 27 0-3 trigger sense bits 108-111 27 4-7 trigger control bits 108-111 28 0-3 trigger sense bits 112-117 28 4-7 trigger control bits 112-117 29 0-3 trigger sense bits 116-119 29 4-7 trigger control bits 116-119 30 0-3 trigger sense bits 120-123 30 4-7 trigger control bits 120-123 31 0-3 trigger sense bits 124-127 31 4-7 trigger control bits 124-127 There is one 8 position dip switch on the board. This switch is used to set the card address. Switches 1-6 correspond to card addresses 1-6 with the switch in the on position giving a logical 0. Switches 7 and 8 are unused. There is a two pin header J5 to which the final sum high and final sum low signals from the output of the ANDOR network are brought. These lines are then wire wrapped to two pins on the 34 pin header J6 which carries the signal to the FINAL SPECIFIC TRIGGER decision card. The front panel has 2 pair of LED's. Each pair is a differential pair used to indicate one signal. The signals displayed are "select" which indicates the card address matches the address set up by the DIP switch and that function codes in the appropriate range have been applied. The other led pair is used to indicate that the conditions to produce a hit as set up by the programming matrix have been met. CONNECTORS J1 : FIRST LEVEL TRIGGER CONTROL COMPUTER BUS 140 PIN CONNECTOR ------------------------------------------------------------------------------ Plug & Pin Function Wire # Mnemonic # on cable ----------------------------------------------------------------------------- 1 Ground GND 2 Ground GND 3 Intermediate Latch Bit#0 Non-inverted IN 1 NIL0 4 Intermediate Latch Bit#0 Inverted IN 2 IIL0 5 Intermediate Latch Bit#1 Non-inverted IN 1 NIL1 6 Intermediate Latch Bit#1 Inverted IN 2 IIL1 7 Intermediate Latch Bit#2 Non-inverted IN 1 NIL2 8 Intermediate Latch Bit#2 Inverted IN 2 IIL2 9 Intermediate Latch Bit#3 Non-inverted IN 1 NIL3 10 Intermediate Latch Bit#3 Inverted IN 2 IIL3 11 Intermediate Latch Bit#4 Non-inverted IN 1 NIL4 12 Intermediate Latch Bit#4 Inverted IN 2 IIL4 13 Intermediate Latch Bit#5 Non-inverted IN 1 NIL5 14 Intermediate Latch Bit#5 Inverted IN 2 IIL5 15 Intermediate Latch Bit#6 Non-inverted IN 1 NIL6 16 Intermediate Latch Bit#6 Inverted IN 2 III6 17 Intermediate Latch Bit#7 Non-inverted IN 1 NIL7 18 Intermediate Latch Bit#7 Inverted IN 2 IIL7 19 Intermediate Latch Bit#8 Non-inverted IN 1 NIL8 20 Intermediate Latch Bit#8 Inverted IN 2 IIL8 21 Intermediate Latch Bit#9 Non-inverted IN 1 NIL9 22 Intermediate Latch Bit#9 Inverted IN 2 IIL9 23 Intermediate Latch Bit#10 Non-inverted IN 1 NIL10 24 Intermediate Latch Bit#10 Inverted IN 2 IIL10 25 Intermediate Latch Bit#11 Non-inverted IN 1 NIL11 26 Intermediate Latch Bit#11 Inverted IN 2 IIL11 27 Intermediate Latch Bit#12 Non-inverted IN 1 NIL12 28 Intermediate Latch Bit#12 Inverted IN 2 IIL12 29 Intermediate Latch Bit#13 Non-inverted IN 1 NIL13 30 Intermediate Latch Bit#13 Inverted IN 2 IIL13 31 Intermediate Latch Bit#14 Non-inverted IN 1 NIL14 32 Intermediate Latch Bit#14 Inverted IN 2 IIL14 33 Intermediate Latch Bit#15 Non-inverted IN 1 NIL15 34 Intermediate Latch Bit#15 Inverted IN 2 IIL15 35 Intermediate Latch Bit#16 Non-inverted IN 1 NIL16 36 Intermediate Latch Bit#16 Inverted IN 2 IIL16 37 Intermediate Latch Bit#17 Non-inverted IN 1 NIL17 38 Intermediate Latch Bit#17 Inverted IN 2 IIL17 39 Intermediate Latch Bit#18 Non-inverted IN 1 NIL18 40 Intermediate Latch Bit#18 Inverted IN 2 IIL18 41 Intermediate Latch Bit#19 Non-inverted IN 1 NIL19 42 Intermediate Latch Bit#19 Inverted IN 2 IIL19 43 Intermediate Latch Bit#20 Non-inverted IN 1 NIL20 44 Intermediate Latch Bit#20 Inverted IN 2 IIL20 45 Intermediate Latch Bit#21 Non-inverted IN 1 NIL21 46 Intermediate Latch Bit#21 Inverted IN 2 IIL21 47 Intermediate Latch Bit#22 Non-inverted IN 1 NIL22 48 Intermediate Latch Bit#22 Inverted IN 2 IIL22 49 Intermediate Latch Bit#23 Non-inverted IN 1 NIL23 50 Intermediate Latch Bit#23 Inverted IN 2 IIL23 51 Intermediate Latch Bit#24 Non-inverted IN 1 NIL24 52 Intermediate Latch Bit#24 Inverted IN 2 IIL24 53 Intermediate Latch Bit#25 Non-inverted IN 1 NIL25 54 Intermediate Latch Bit#25 Inverted IN 2 IIL25 55 Intermediate Latch Bit#26 Non-inverted IN 1 NIL26 56 Intermediate Latch Bit#26 Inverted IN 2 IIL26 57 Intermediate Latch Bit#27 Non-inverted IN 1 NIL27 58 Intermediate Latch Bit#27 Inverted IN 2 IIL27 59 Intermediate Latch Bit#28 Non-inverted IN 1 NIL28 60 Intermediate Latch Bit#28 Inverted IN 2 IIL28 61 Intermediate Latch Bit#29 Non-inverted IN 1 NIL29 62 Intermediate Latch Bit#29 Inverted IN 2 IIL29 63 Intermediate Latch Bit#30 Non-inverted IN 1 NIL30 64 Intermediate Latch Bit#30 Inverted IN 2 IIL30 65 Intermediate Latch Bit#31 Non-inverted IN 1 NIL31 66 Intermediate Latch Bit#31 Inverted IN 2 IIL31 67 Ground GND 68 Ground GND 69 Power +5.0 V VCC 70 Power +5.0 V VCC 71 Power -5.0 V VEE 72 Power -5.0 V VEE 73 Ground GND 74 Ground GND 75 Intermediate Latch Bit#32 Non-inverted IN 1 NIL32 76 Intermediate Latch Bit#32 Inverted IN 2 IIL32 77 Intermediate Latch Bit#33 Non-inverted IN 1 NIL33 78 Intermediate Latch Bit#33 Inverted IN 2 IIL33 79 Intermediate Latch Bit#34 Non-inverted IN 1 NIL34 80 Intermediate Latch Bit#34 Inverted IN 2 IIL34 81 Intermediate Latch Bit#35 Non-inverted IN 1 NIL35 82 Intermediate Latch Bit#35 Inverted IN 2 IIL35 83 Intermediate Latch Bit#36 Non-inverted IN 1 NIL36 84 Intermediate Latch Bit#36 Inverted IN 2 IIL36 85 Intermediate Latch Bit#37 Non-inverted IN 1 NIL37 86 Intermediate Latch Bit#37 Inverted IN 2 IIL37 87 Intermediate Latch Bit#38 Non-inverted IN 1 NIL38 88 Intermediate Latch Bit#38 Inverted IN 2 IIL38 89 Intermediate Latch Bit#39 Non-inverted IN 1 NIL39 90 Intermediate Latch Bit#39 Inverted IN 2 IIL39 91 Intermediate Latch Bit#40 Non-inverted IN 1 NIL40 92 Intermediate Latch Bit#40 Inverted IN 2 IIL40 93 Intermediate Latch Bit#41 Non-inverted IN 1 NIL41 94 Intermediate Latch Bit#41 Inverted IN 2 IIL41 95 Intermediate Latch Bit#42 Non-inverted IN 1 NIL42 96 Intermediate Latch Bit#42 Inverted IN 2 IIL42 97 Intermediate Latch Bit#43 Non-inverted IN 1 NIL43 98 Intermediate Latch Bit#43 Inverted IN 2 IIL43 99 Intermediate Latch Bit#44 Non-inverted IN 1 NIL44 100 Intermediate Latch Bit#44 Inverted IN 2 IIL44 101 Intermediate Latch Bit#45 Non-inverted IN 1 NIL45 102 Intermediate Latch Bit#45 Inverted IN 2 IIL45 103 Intermediate Latch Bit#46 Non-inverted IN 1 NIL46 104 Intermediate Latch Bit#46 Inverted IN 2 IIL46 105 Intermediate Latch Bit#47 Non-inverted IN 1 NIL47 106 Intermediate Latch Bit#47 Inverted IN 2 IIL47 107 Intermediate Latch Bit#48 Non-inverted IN 1 NIL48 108 Intermediate Latch Bit#48 Inverted IN 2 IIL48 109 Intermediate Latch Bit#49 Non-inverted IN 1 NIL49 110 Intermediate Latch Bit#49 Inverted IN 2 IIL49 111 Intermediate Latch Bit#50 Non-inverted IN 1 NIL50 112 Intermediate Latch Bit#50 Inverted IN 2 IIL50 113 Intermediate Latch Bit#51 Non-inverted IN 1 NIL51 114 Intermediate Latch Bit#51 Inverted IN 2 IIL51 115 Intermediate Latch Bit#52 Non-inverted IN 1 NIL52 116 Intermediate Latch Bit#52 Inverted IN 2 IIL52 117 Intermediate Latch Bit#53 Non-inverted IN 1 NIL53 118 Intermediate Latch Bit#53 Inverted IN 2 IIL53 119 Intermediate Latch Bit#54 Non-inverted IN 1 NIL54 120 Intermediate Latch Bit#54 Inverted IN 2 IIL54 121 Intermediate Latch Bit#55 Non-inverted IN 1 NIL55 122 Intermediate Latch Bit#55 Inverted IN 2 IIL55 123 Intermediate Latch Bit#56 Non-inverted IN 1 NIL56 124 Intermediate Latch Bit#56 Inverted IN 2 IIL56 125 Intermediate Latch Bit#57 Non-inverted IN 1 NIL57 126 Intermediate Latch Bit#57 Inverted IN 2 IIL57 127 Intermediate Latch Bit#58 Non-inverted IN 1 NIL58 128 Intermediate Latch Bit#58 Inverted IN 2 IIL58 129 Intermediate Latch Bit#59 Non-inverted IN 1 NIL59 130 Intermediate Latch Bit#59 Inverted IN 2 IIL59 131 Intermediate Latch Bit#60 Non-inverted IN 1 NIL60 132 Intermediate Latch Bit#60 Inverted IN 2 IIL60 133 Intermediate Latch Bit#61 Non-inverted IN 1 NIL61 134 Intermediate Latch Bit#61 Inverted IN 2 IIL61 135 Intermediate Latch Bit#62 Non-inverted IN 1 NIL62 136 Intermediate Latch Bit#62 Inverted IN 2 IIL62 137 Intermediate Latch Bit#63 Non-inverted IN 1 NIL63 138 Intermediate Latch Bit#63 Inverted IN 2 IIL63 139 Ground GND 140 Ground GND ----------------------------------------------------------------------------- J2 : FIRST LEVEL TRIGGER CONTROL COMPUTER BUS 140 PIN CONNECTOR ------------------------------------------------------------------------------ Plug & Pin Function Wire # Mnemonic # on cable ------------------------------------------------------------------------------ 1 Ground GND 2 Ground GND 3 Intermediate Latch Bit#64 Non-inverted IN 1 NIL64 4 Intermediate Latch Bit#64 Inverted IN 2 IIL64 5 Intermediate Latch Bit#65 Non-inverted IN 1 NIL65 6 Intermediate Latch Bit#65 Inverted IN 2 IIL65 7 Intermediate Latch Bit#66 Non-inverted IN 1 NIL66 8 Intermediate Latch Bit#66 Inverted IN 2 IIL66 9 Intermediate Latch Bit#67 Non-inverted IN 1 NIL67 10 Intermediate Latch Bit#67 Inverted IN 2 IIL67 11 Intermediate Latch Bit#68 Non-inverted IN 1 NIL68 12 Intermediate Latch Bit#68 Inverted IN 2 IIL68 13 Intermediate Latch Bit#69 Non-inverted IN 1 NIL69 14 Intermediate Latch Bit#69 Inverted IN 2 IIL69 15 Intermediate Latch Bit#70 Non-inverted IN 1 NIL70 16 Intermediate Latch Bit#70 Inverted IN 2 IIL70 17 Intermediate Latch Bit#71 Non-inverted IN 1 NIL71 18 Intermediate Latch Bit#71 Inverted IN 2 IIL71 19 Intermediate Latch Bit#72 Non-inverted IN 1 NIL72 20 Intermediate Latch Bit#72 Inverted IN 2 IIL72 21 Intermediate Latch Bit#73 Non-inverted IN 1 NIL73 22 Intermediate Latch Bit#73 Inverted IN 2 IIL73 23 Intermediate Latch Bit#74 Non-inverted IN 1 NIL74 24 Intermediate Latch Bit#74 Inverted IN 2 IIL74 25 Intermediate Latch Bit#75 Non-inverted IN 1 NIL75 26 Intermediate Latch Bit#75 Inverted IN 2 IIL75 27 Intermediate Latch Bit#76 Non-inverted IN 1 NIL76 28 Intermediate Latch Bit#76 Inverted IN 2 IIL76 29 Intermediate Latch Bit#77 Non-inverted IN 1 NIL77 30 Intermediate Latch Bit#77 Inverted IN 2 IIL77 31 Intermediate Latch Bit#78 Non-inverted IN 1 NIL78 32 Intermediate Latch Bit#78 Inverted IN 2 IIL78 33 Intermediate Latch Bit#79 Non-inverted IN 1 NIL79 34 Intermediate Latch Bit#79 Inverted IN 2 IIL79 35 Intermediate Latch Bit#80 Non-inverted IN 1 NIL80 36 Intermediate Latch Bit#80 Inverted IN 2 IIL80 37 Intermediate Latch Bit#81 Non-inverted IN 1 NIL81 38 Intermediate Latch Bit#81 Inverted IN 2 IIL81 39 Intermediate Latch Bit#82 Non-inverted IN 1 NIL82 40 Intermediate Latch Bit#82 Inverted IN 2 IIL82 41 Intermediate Latch Bit#83 Non-inverted IN 1 NIL83 42 Intermediate Latch Bit#83 Inverted IN 2 IIL83 43 Intermediate Latch Bit#84 Non-inverted IN 1 NIL84 44 Intermediate Latch Bit#84 Inverted IN 2 IIL84 45 Intermediate Latch Bit#85 Non-inverted IN 1 NIL85 46 Intermediate Latch Bit#85 Inverted IN 2 IIL85 47 Intermediate Latch Bit#86 Non-inverted IN 1 NIL86 48 Intermediate Latch Bit#86 Inverted IN 2 IIL86 49 Intermediate Latch Bit#87 Non-inverted IN 1 NIL87 50 Intermediate Latch Bit#87 Inverted IN 2 IIL87 51 Intermediate Latch Bit#88 Non-inverted IN 1 NIL88 52 Intermediate Latch Bit#88 Inverted IN 2 IIL88 53 Intermediate Latch Bit#89 Non-inverted IN 1 NIL89 54 Intermediate Latch Bit#89 Inverted IN 2 IIL89 55 Intermediate Latch Bit#90 Non-inverted IN 1 NIL90 56 Intermediate Latch Bit#90 Inverted IN 2 IIL90 57 Intermediate Latch Bit#91 Non-inverted IN 1 NIL91 58 Intermediate Latch Bit#91 Inverted IN 2 IIL91 59 Intermediate Latch Bit#92 Non-inverted IN 1 NIL92 60 Intermediate Latch Bit#92 Inverted IN 2 IIL92 61 Intermediate Latch Bit#93 Non-inverted IN 1 NIL93 62 Intermediate Latch Bit#93 Inverted IN 2 IIL93 63 Intermediate Latch Bit#94 Non-inverted IN 1 NIL94 64 Intermediate Latch Bit#94 Inverted IN 2 IIL94 65 Intermediate Latch Bit#95 Non-inverted IN 1 NIL95 66 Intermediate Latch Bit#95 Inverted IN 2 IIL95 67 Ground GND 68 Ground GND 69 Power +5.0 V VCC 70 Power +5.0 V VCC 71 Power -5.0 V VEE 72 Power -5.0 V VEE 73 Ground GND 74 Ground GND 75 Intermediate Latch Bit#96 Non-inverted IN 1 NIL96 76 Intermediate Latch Bit#96 Inverted IN 2 IIL96 77 Intermediate Latch Bit#97 Non-inverted IN 1 NIL97 78 Intermediate Latch Bit#97 Inverted IN 2 IIL97 79 Intermediate Latch Bit#98 Non-inverted IN 1 NIL98 80 Intermediate Latch Bit#98 Inverted IN 2 IIL98 81 Intermediate Latch Bit#99 Non-inverted IN 1 NIL99 82 Intermediate Latch Bit#99 Inverted IN 2 IIL99 83 Intermediate Latch Bit#100 Non-inverted IN 1 NIL100 84 Intermediate Latch Bit#100 Inverted IN 2 IIL100 85 Intermediate Latch Bit#101 Non-inverted IN 1 NIL101 86 Intermediate Latch Bit#101 Inverted IN 2 IIL101 87 Intermediate Latch Bit#102 Non-inverted IN 1 NIL102 88 Intermediate Latch Bit#102 Inverted IN 2 IIL102 89 Intermediate Latch Bit#103 Non-inverted IN 1 NIL103 90 Intermediate Latch Bit#103 Inverted IN 2 IIL103 91 Intermediate Latch Bit#104 Non-inverted IN 1 NIL104 92 Intermediate Latch Bit#104 Inverted IN 2 IIL104 93 Intermediate Latch Bit#105 Non-inverted IN 1 NIL105 94 Intermediate Latch Bit#105 Inverted IN 2 IIL105 95 Intermediate Latch Bit#106 Non-inverted IN 1 NIL106 96 Intermediate Latch Bit#106 Inverted IN 2 IIL106 97 Intermediate Latch Bit#107 Non-inverted IN 1 NIL107 98 Intermediate Latch Bit#107 Inverted IN 2 IIL107 99 Intermediate Latch Bit#108 Non-inverted IN 1 NIL108 100 Intermediate Latch Bit#108 Inverted IN 2 IIL108 101 Intermediate Latch Bit#109 Non-inverted IN 1 NIL109 102 Intermediate Latch Bit#109 Inverted IN 2 IIL109 103 Intermediate Latch Bit#110 Non-inverted IN 1 NIL110 104 Intermediate Latch Bit#110 Inverted IN 2 IIL110 105 Intermediate Latch Bit#111 Non-inverted IN 1 NIL111 106 Intermediate Latch Bit#111 Inverted IN 2 IIL111 107 Intermediate Latch Bit#112 Non-inverted IN 1 NIL112 108 Intermediate Latch Bit#112 Inverted IN 2 IIL112 109 Intermediate Latch Bit#113 Non-inverted IN 1 NIL113 110 Intermediate Latch Bit#113 Inverted IN 2 IIL113 111 Intermediate Latch Bit#114 Non-inverted IN 1 NIL114 112 Intermediate Latch Bit#114 Inverted IN 2 IIL114 113 Intermediate Latch Bit#115 Non-inverted IN 1 NIL115 114 Intermediate Latch Bit#115 Inverted IN 2 IIL115 115 Intermediate Latch Bit#116 Non-inverted IN 1 NIL116 116 Intermediate Latch Bit#116 Inverted IN 2 IIL116 117 Intermediate Latch Bit#117 Non-inverted IN 1 NIL117 118 Intermediate Latch Bit#117 Inverted IN 2 IIL117 119 Intermediate Latch Bit#118 Non-inverted IN 1 NIL118 120 Intermediate Latch Bit#118 Inverted IN 2 IIL118 121 Intermediate Latch Bit#119 Non-inverted IN 1 NIL119 122 Intermediate Latch Bit#119 Inverted IN 2 IIL119 123 Intermediate Latch Bit#120 Non-inverted IN 1 NIL120 124 Intermediate Latch Bit#120 Inverted IN 2 IIL120 125 Intermediate Latch Bit#121 Non-inverted IN 1 NIL121 126 Intermediate Latch Bit#121 Inverted IN 2 IIL121 127 Intermediate Latch Bit#122 Non-inverted IN 1 NIL122 128 Intermediate Latch Bit#122 Inverted IN 2 IIL122 129 Intermediate Latch Bit#123 Non-inverted IN 1 NIL123 130 Intermediate Latch Bit#123 Inverted IN 2 IIL123 131 Intermediate Latch Bit#124 Non-inverted IN 1 NIL124 132 Intermediate Latch Bit#124 Inverted IN 2 IIL124 133 Intermediate Latch Bit#125 Non-inverted IN 1 NIL125 134 Intermediate Latch Bit#125 Inverted IN 2 IIL125 135 Intermediate Latch Bit#126 Non-inverted IN 1 NIL126 136 Intermediate Latch Bit#126 Inverted IN 2 IIL126 137 Intermediate Latch Bit#127 Non-inverted IN 1 NIL127 138 Intermediate Latch Bit#127 Inverted IN 2 IIL127 139 Ground GND 140 Ground GND Plug & PIN Color Function Wire # Mnemonic # on cable on cable ------------------------------------------------------------------------------ J4 : COMPUTER BUS CONNECTOR ------------------------------------------------------------------------------ Pin # Color on on cable Function Mnemonic Cable ---------------------------------------------------------------------------- 1 Brown Bidirectional Data Bit#8 Non-inverted NDB8 2 Tan Bidirectional Data Bit#8 Inverted IDB8 3 Red Bidirectional Data Bit#7 Non-inverted NDB7 4 Tan Bidirectional Data Bit#7 Inverted IDB7 5 Orange Bidirectional Data Bit#6 Non-inverted NDB6 6 Tan Bidirectional Data Bit#6 Inverted IDB6 7 Yellow Bidirectional Data Bit#5 Non-inverted NDB5 8 Tan Bidirectional Data Bit#5 Inverted IDB5 9 Green Bidirectional Data Bit#4 Non-inverted NDB4 0 Tan Bidirectional Data Bit#4 Inverted IDB4 11 Blue Bidirectional Data Bit#3 Non-inverted NDB3 12 Tan Bidirectional Data Bit#3 Inverted IDB3 13 Violet Bidirectional Data Bit#2 Non-inverted NDB2 14 Tan Bidirectional Data Bit#2 Inverted IDB2 15 Grey Bidirectional Data Bit#1 Non-inverted NDB1 16 Tan Bidirectional Data Bit#1 Inverted IDB1 17 White Direction Non-inverted NDIR 18 Tan Direction Inverted IDIR 19 Black Strobe Non-inverted NSTB 20 Tan Strobe Inverted ISTB 21 Brown Function Address Bit#8 Non-inverted NAF8 22 Tan Function Address Bit#8 Inverted IAF8 23 Red Function Address Bit#7 Non-inverted NAF7 24 Tan Function Address Bit#7 Inverted IAF7 25 Orange Function Address Bit#6 Non-inverted NAF6 26 Tan Function Address Bit#6 Inverted IAF6 27 Yellow Function Address Bit#5 Non-inverted NAF5 28 Tan Function Address Bit#5 Inverted IAF5 29 Green Function Address Bit#4 Non-inverted NAF4 30 Tan Function Address Bit#4 Inverted IAF4 31 Blue Function Address Bit#3 Non-inverted NAF3 32 Tan Function Address Bit#3 Inverted NAF3 33 Violet Function Address Bit#2 Non-inverted NAF2 34 Tan Function Address Bit#2 Inverted IAF2 35 Grey Function Address Bit#1 Non-inverted NAF1 36 Tan Function Address Bit#1 Inverted IAF1 37 White Card Address Bit#6 Non-inverted NAC6 38 Tan Card Address Bit#6 Inverted IAC6 33 Black Card Address Bit#5 Non-inverted NAC5 40 Tan Card Address Bit#5 Inverted IAC5 41 Brown Card Address Bit#4 Non-inverted NAC4 42 Tan Card Address Bit#4 Inverted IAC4 43 Red Card Address Bit#3 Non-inverted NAC3 44 Tan Card Address Bit#3 Inverted IAC3 45 Orange Card Address Bit#2 Non-inverted NAC2 46 Tan Card Address Bit#2 Inverted IAC2 47 Yellow Card Address Bit#1 Non-inverted NAC1 48 Tan Card Address Bit#1 Inverted IAC1 49 Green Timing & Sync. Signal H Non-inverted NTSH 50 Tan Timing & Sync. Signal H Inverted ITSH 51 Blue Timing & Sync. Signal G Non-inverted NTSG 52 Tan Timing & Sync. Signal G Inverted ITSG 53 Violet Timing & Sync. Signal F Non-inverted NTSF 54 Tan Timing & Sync. Signal F Inverted ITSF 55 Grey Timing & Sync. Signal E Non-inverted NTSE 56 Tan Timing & Sync. Signal E Inverted ITSE 57 White Timing & Sync. Signal D Non-inverted NTSD 58 Tan Timing & Sync. Signal D Inverted ITSD 59 Black Timing & Sync. Signal C Non-inverted NTSC 60 Tan Timing & Sync. Signal C Inverted ITSC 61 Brown Timing & Sync. Signal B Non-inverted NTSB 62 Tan Timing & Sync. Signal B Inverted ITSB 63 Red Timing & Sync. Signal A Non-inverted NTSA 64 Tan Timing & Sync. Signal A Inverted ITSA ----------------------------------------------------------------------------- J3 : ANDOR HIT CONNECTOR ----------------------------------------------------------------------------- Pin # Color on on cable Function Mnemonic Cable ---------------------------------------------------------------------------- 1 Brown Andor Hit Bit#1 Non-inverted NHT1 2 Tan Andor Hit Bit#1 Inverted IHT1 3 Red Andor Hit Bit#2 Non-inverted NHT2 4 Tan Andor Hit Bit#2 Inverted IHT2 5 Orange Andor Hit Bit#3 Non-inverted NHT3 6 Tan Andor Hit Bit#3 Inverted IHT3 7 Yellow Andor Hit Bit#4 Non-inverted NHT4 8 Tan Andor Hit Bit#4 Inverted IHT4 9 Green Andor Hit Bit#5 Non-inverted NHT5 0 Tan Andor Hit Bit#5 Inverted IHT5 11 Blue Andor Hit Bit#6 Non-inverted NHT6 12 Tan Andor Hit Bit#6 Inverted IHT6 13 Violet Andor Hit Bit#7 Non-inverted NHT7 14 Tan Andor Hit Bit#7 Inverted IHT7 15 Grey Andor Hit Bit#8 Non-inverted NHT8 16 Tan Andor Hit Bit#8 Inverted IHT8 17 White Andor Hit Bit#9 Non-inverted NHT9 18 Tan Andor Hit Bit#9 Inverted IHT9 19 Black Andor Hit Bit#10 Non-inverted NHT10 20 Tan Andor Hit Bit#10 Inverted IHT10 21 Brown Andor Hit Bit#11 Non-inverted NHT11 22 Tan Andor Hit Bit#11 Inverted IHT11 23 Red Andor Hit Bit#12 Non-inverted NHT12 24 Tan Andor Hit Bit#12 Inverted IHT12 25 Orange Andor Hit Bit#13 Non-inverted NHT13 26 Tan Andor Hit Bit#13 Inverted IHT13 27 Yellow Andor Hit Bit#14 Non-inverted NHT14 28 Tan Andor Hit Bit#14 Inverted IHT14 29 Green Andor Hit Bit#15 Non-inverted NHT15 30 Tan Andor Hit Bit#15 Inverted IHT15 31 Blue Andor Hit Bit#16 Non-inverted NHT16 32 Tan Andor Hit Bit#16 Inverted NHT16 33 Violet unused 34 Tan unused ----------------------------------------------------------------------------- DRAWINGS - List of all the drawings produced with drawing numbers. List of every paper written about this board. BOARD HISTORY - the revision history of the First Level Trigger ANDOR CARD is : REVISION A - Number of printed circuit boards ordered & Date - list of the serial numbers of the card built for this revision. - List of all the Engineering Changes Order (ECO) valid for this revision. - Special assembly recommendations and handling precautions. - Parts used : TYPE QUANTITY -------------------------------- 10H101 1 10H115 1 10H124 3 10H125 38 10H188 3 74ALS02 5 74ALS138 8 74AS139 1 74ALS245 4 74ALS30 17 74ALS32 32 74ALS520 1 74ALS541 33 74ALS574 32 74ALS86 32 RBM140 2 EBY64 1 DIALCO2001 4 MONOCAP 252 MSP08 8 SWDIP 1 3MR4 1 34 PIN POST 1 2 PIN POST 1 POWER REQUIREMENTS: The AOC uses VCC (+5V), VEE (-5.2V) and GROUND power supply connections. The calculated power consumption is: VCC: maximum ------- 74x chips 2.5 A 10KH chips: 2.5 A ------- 5.0 A VEE: maximum ------- 10KH chips: 1.9 A VEE pulldown 0.5 A ------- 2.4 A