-------------------------------------------------------- ! ! ! D0 FIRST LEVEL TRIGGER SYSTEM IMLRO CARD ! ! ! -------------------------------------------------------- Michigan State University - 29-Jun-1987 Rev 2-JUNE-1992 GENERAL DESCRIPTION The Intermediate Latch Readout (IMLRO) Card is used in the Trigger Framework. Four of these cards will be used in the four Intermediate Latch crates to allow computer readout of the IML card and the IML card history. For testing purposes the 128 Intermediate Latch signals are also displayed on LED's which may be disabled under computer control. The IMLRO Card also terminates the computer bus and the Intermediate Latch bus. One IMLRO Card occupies the top slot ( slot number 20 ) in each of the four Intermediate Latch crates. The IMLRO Card receives and terminates 128 differential ECL signals which are the experiment triggers supplied by the IML card. These signals are received from the backplane through connectors J1 and J2. J1 and J2 also bring power onto the board supplying ground and +5 Volts and -5 Volts. The computer bus is received and terminated through connector J3 on the front of the card. The computer bus is 32 differential signals containing data, address, function code, and timing signals. There are three Connectors on the IMLRO card. Connector Function -------------- --------------------------------- J1 Intermediate Latch Backplane J2 Intermediate Latch Backplane J3 Trigger Control Computer Bus The IMLRO card uses two power supplies. A power supply of +5.0 Volts is used for the bulk of the logic on the board. A power supply of -5.2 Volts is used for the differential ECL driver and receiver circuits in the I/O section. These supply voltages are brought onto the card through backplane the connectors J1 and J2. PROGRAMMING The IMLRO card has no programable registers, it is a read only card. There are 64 readable registers each 8 bits wide which allow reading of the 128 bits of the intermediate backplane. These registers are arranged as pairs of registers at function address's 0 through 15 and 128 Through 143. Function Address's 0 Through 15 are selected when function address bit 8 is low. These function address's correspond to previous data. Function address's 128 through 143 are selected when function address bit 8 is a one. These function address's correspond to current data. At each function address are two registers which are selected according to the state of timing signal C. This information is summarized in the table below. register selected function address timing signal C=0 timing signal C=1 ------------------------------------------------------------------ function address 0 U33 register B2 U33 register A2 function address 1 U34 register B2 U34 register A2 function address 2 U35 register B2 U35 register A2 function address 3 U36 register B2 U36 register A2 function address 4 U37 register B2 U37 register A2 function address 5 U38 register B2 U38 register A2 function address 6 U39 register B2 U39 register A2 function address 7 U40 register B2 U40 register A2 function address 8 U41 register B2 U41 register A2 function address 9 U42 register B2 U42 register A2 function address 10 U43 register B2 U43 register A2 function address 11 U44 register B2 U44 register A2 function address 12 U45 register B2 U45 register A2 function address 13 U46 register B2 U46 register A2 function address 14 U47 register B2 U47 register A2 function address 15 U48 register B2 U48 register A2 function address 128 U33 register B1 U33 register A1 function address 129 U34 register B1 U34 register A1 function address 130 U35 register B1 U35 register A1 function address 131 U36 register B1 U36 register A1 function address 132 U37 register B1 U37 register A1 function address 133 U38 register B1 U38 register A1 function address 134 U39 register B1 U39 register A1 function address 135 U40 register B1 U40 register A1 function address 136 U41 register B1 U41 register A1 function address 137 U42 register B1 U42 register A1 function address 138 U43 register B1 U43 register A1 function address 139 U44 register B1 U44 register A1 function address 140 U45 register B1 U45 register A1 function address 141 U46 register B1 U46 register A1 function address 142 U47 register B1 U47 register A1 function address 143 U48 register B1 U48 register A1 The data at each function address corresponds to data received from 8 of the 128 backplane backplane bits. The mapping of backplane bit to function address is summarized in the table below. function address backplane bits selected ------------------------------------------------------------------ function address 0 IML1 through IML8 on data bits 0 - 8 function address 1 IML9 through IML16 on data bits 0 - 8 function address 2 IML17 through IML24 on data bits 0 - 8 function address 3 IML25 through IML32 on data bits 0 - 8 function address 4 IML33 through IML40 on data bits 0 - 8 function address 5 IML41 through IML48 on data bits 0 - 8 function address 6 IML49 through IML56 on data bits 0 - 8 function address 7 IML57 through IML64 on data bits 0 - 8 function address 8 IML65 through IML72 on data bits 0 - 8 function address 9 IML73 through IML80 on data bits 0 - 8 function address 10 IML81 through IML88 on data bits 0 - 8 function address 11 IML89 through IML96 on data bits 0 - 8 function address 12 IML97 through IML104 on data bits 0 - 8 function address 13 IML105 through IML112 on data bits 0 - 8 function address 14 IML113 through IML120 on data bits 0 - 8 function address 15 IML121 through IML128 on data bits 0 - 8 These registers are the Am29520 multilevel pipeline registers whose operation is dependent on function address bit 8 and timing signals A through C as shown in the table below. control bit function performed ------------------------------------------ function address 8 current / previous timing signal C read A/B timing signal B latch / shift timing signal A write A/B There are no wire wrap posts or jumpers on the IMLRO card. There is one 8 switch DIP switch used to set the card address. Bits one through six of this switch are used to select the card address as shown in the table below. Bits seven and eight are unused. Switch Number Function Action ----------------- -------------- ---------- 1 Card Address 6 On=0 2 Card Address 5 On=0 3 Card Address 4 On=0 4 Card Address 3 On=0 5 Card Address 2 On=0 6 Card Address 1 On=0 7 Unused 8 Unused There are 136 LED's on the IMLRO card. 128 of these LEDs are used to display the state of the differential signals on the intermediate latch backplane. 8 of these LED's are used to display computer bus control signals and multilevel pipeline register control signals. These LED's may be turned off by the computer bus signal LED OFF. The following table list the LED reference designator number vrs signal displayed. LED Signal LED Signal LED Signal LED Signal ----- -------- ----- -------- ----- -------- ----- ------- D1 WAKE UP D35 IML123 D69 IML93 D103 IML63 D2 SEL A BAR D36 IML124 D70 IML94 D104 IML64 D3 SEL B BAR D37 IML125 D71 IML95 D105 IML1 D4 SEL WRT BUF A D38 IML126 D72 IML96 D106 IML2 D5 SEL WRT BUF B D39 IML127 D73 IML33 D107 IML3 D6 LATCH / SHIFT D40 IML128 D74 IML34 D108 IML4 D7 SEL BUF READ D41 IML65 D75 IML35 D109 IML4 D8 CURR / PREV D42 IML66 D76 IML36 D110 IML5 D9 IML97 D43 IML67 D77 IML37 D111 IML6 D10 IML98 D44 IML68 D78 IML38 D112 IML7 D11 IML99 D45 IML69 D79 IML39 D113 IML9 D12 IML100 D46 IML70 D80 IML40 D114 IML10 D13 IML101 D47 IML71 D81 IML41 D115 IML11 D14 IML102 D48 IML72 D82 IML42 D116 IML12 D15 IML103 D49 IML73 D83 IML43 D117 IML13 D16 IML104 D50 IML74 D84 IML44 D118 IML14 D17 IML105 D51 IML75 D85 IML45 D119 IML15 D18 IML106 D52 IML76 D86 IML46 D120 IML16 D19 IML107 D53 IML77 D87 IML47 D121 IML17 D20 IML108 D54 IML78 D88 IML48 D122 IML18 D21 IML109 D55 IML79 D89 IML49 D123 IML19 D22 IML110 D56 IML80 D90 IML50 D124 IML20 D23 IML111 D57 IML81 D91 IML51 D125 IML21 D24 IML112 D58 IML82 D92 IML52 D126 IML22 D25 IML113 D59 IML83 D93 IML53 D127 IML23 D26 IML114 D60 IML84 D94 IML54 D128 IML24 D27 IML115 D61 IML85 D95 IML55 D129 IML25 D28 IML116 D62 IML86 D96 IML56 D130 IML26 D29 IML117 D63 IML87 D97 IML57 D131 IML27 D30 IML118 D64 IML88 D98 IML58 D132 IML28 D31 IML119 D65 IML89 D99 IML59 D133 IML29 D32 IML120 D66 IML90 D100 IML60 D134 IML30 D33 IML121 D67 IML91 D101 IML61 D135 IML31 D34 IML122 D68 IML92 D102 IML62 D136 IML32 CONNECTORS J1 : FIRST LEVEL TRIGGER CONTROL COMPUTER BUS 140 PIN CONNECTOR ------------------------------------------------------------------------------ Plug & Pin Function Wire # Mnemonic # on cable ----------------------------------------------------------------------------- 1 Ground GND 2 Ground GND 3 Intermediate Latch Bit#1 Non-inverted IN 1 NIL1 4 Intermediate Latch Bit#1 Inverted IN 2 IIL1 5 Intermediate Latch Bit#2 Non-inverted IN 1 NIL2 6 Intermediate Latch Bit#2 Inverted IN 2 IIL2 7 Intermediate Latch Bit#3 Non-inverted IN 1 NIL3 8 Intermediate Latch Bit#3 Inverted IN 2 IIL3 9 Intermediate Latch Bit#4 Non-inverted IN 1 NIL4 10 Intermediate Latch Bit#4 Inverted IN 2 IIL4 11 Intermediate Latch Bit#5 Non-inverted IN 1 NIL5 12 Intermediate Latch Bit#5 Inverted IN 2 IIL5 13 Intermediate Latch Bit#6 Non-inverted IN 1 NIL6 14 Intermediate Latch Bit#6 Inverted IN 2 IIL6 15 Intermediate Latch Bit#7 Non-inverted IN 1 NIL7 16 Intermediate Latch Bit#7 Inverted IN 2 III7 17 Intermediate Latch Bit#8 Non-inverted IN 1 NIL8 18 Intermediate Latch Bit#8 Inverted IN 2 IIL8 19 Intermediate Latch Bit#9 Non-inverted IN 1 NIL9 20 Intermediate Latch Bit#9 Inverted IN 2 IIL9 21 Intermediate Latch Bit#10 Non-inverted IN 1 NIL10 22 Intermediate Latch Bit#10 Inverted IN 2 IIL10 23 Intermediate Latch Bit#11 Non-inverted IN 1 NIL10 24 Intermediate Latch Bit#11 Inverted IN 2 IIL11 25 Intermediate Latch Bit#12 Non-inverted IN 1 NIL12 26 Intermediate Latch Bit#12 Inverted IN 2 IIL12 27 Intermediate Latch Bit#13 Non-inverted IN 1 NIL13 28 Intermediate Latch Bit#13 Inverted IN 2 IIL13 29 Intermediate Latch Bit#14 Non-inverted IN 1 NIL14 30 Intermediate Latch Bit#14 Inverted IN 2 IIL14 31 Intermediate Latch Bit#15 Non-inverted IN 1 NIL15 32 Intermediate Latch Bit#15 Inverted IN 2 IIL15 33 Intermediate Latch Bit#16 Non-inverted IN 1 NIL16 34 Intermediate Latch Bit#16 Inverted IN 2 IIL16 35 Intermediate Latch Bit#17 Non-inverted IN 1 NIL17 36 Intermediate Latch Bit#17 Inverted IN 2 IIL17 37 Intermediate Latch Bit#18 Non-inverted IN 1 NIL18 38 Intermediate Latch Bit#18 Inverted IN 2 IIL18 39 Intermediate Latch Bit#19 Non-inverted IN 1 NIL19 40 Intermediate Latch Bit#19 Inverted IN 2 IIL19 41 Intermediate Latch Bit#20 Non-inverted IN 1 NIL20 42 Intermediate Latch Bit#20 Inverted IN 2 IIL20 43 Intermediate Latch Bit#21 Non-inverted IN 1 NIL21 44 Intermediate Latch Bit#21 Inverted IN 2 IIL21 45 Intermediate Latch Bit#22 Non-inverted IN 1 NIL22 46 Intermediate Latch Bit#22 Inverted IN 2 IIL22 47 Intermediate Latch Bit#23 Non-inverted IN 1 NIL23 48 Intermediate Latch Bit#23 Inverted IN 2 IIL23 49 Intermediate Latch Bit#24 Non-inverted IN 1 NIL24 50 Intermediate Latch Bit#24 Inverted IN 2 IIL24 51 Intermediate Latch Bit#25 Non-inverted IN 1 NIL25 52 Intermediate Latch Bit#25 Inverted IN 2 IIL25 53 Intermediate Latch Bit#26 Non-inverted IN 1 NIL26 54 Intermediate Latch Bit#26 Inverted IN 2 IIL26 55 Intermediate Latch Bit#27 Non-inverted IN 1 NIL27 56 Intermediate Latch Bit#27 Inverted IN 2 IIL27 57 Intermediate Latch Bit#28 Non-inverted IN 1 NIL28 58 Intermediate Latch Bit#28 Inverted IN 2 IIL28 59 Intermediate Latch Bit#29 Non-inverted IN 1 NIL29 60 Intermediate Latch Bit#29 Inverted IN 2 IIL29 61 Intermediate Latch Bit#30 Non-inverted IN 1 NIL30 62 Intermediate Latch Bit#30 Inverted IN 2 IIL30 63 Intermediate Latch Bit#31 Non-inverted IN 1 NIL31 64 Intermediate Latch Bit#31 Inverted IN 2 IIL31 65 Intermediate Latch Bit#32 Non-inverted IN 1 NIL32 66 Intermediate Latch Bit#32 Inverted IN 2 IIL32 67 Ground GND 68 Ground GND 69 Power +5.0 V VCC 70 Power +5.0 V VCC 71 Power -5.0 V VEE 72 Power -5.0 V VEE 73 Ground GND 74 Ground GND 75 Intermediate Latch Bit#33 Non-inverted IN 1 NIL33 76 Intermediate Latch Bit#33 Inverted IN 2 IIL33 77 Intermediate Latch Bit#34 Non-inverted IN 1 NIL34 78 Intermediate Latch Bit#34 Inverted IN 2 IIL34 79 Intermediate Latch Bit#35 Non-inverted IN 1 NIL35 80 Intermediate Latch Bit#35 Inverted IN 2 IIL35 81 Intermediate Latch Bit#36 Non-inverted IN 1 NIL36 82 Intermediate Latch Bit#36 Inverted IN 2 IIL36 83 Intermediate Latch Bit#37 Non-inverted IN 1 NIL37 84 Intermediate Latch Bit#37 Inverted IN 2 IIL37 85 Intermediate Latch Bit#38 Non-inverted IN 1 NIL38 86 Intermediate Latch Bit#38 Inverted IN 2 IIL38 87 Intermediate Latch Bit#39 Non-inverted IN 1 NIL39 88 Intermediate Latch Bit#39 Inverted IN 2 IIL39 89 Intermediate Latch Bit#40 Non-inverted IN 1 NIL40 90 Intermediate Latch Bit#40 Inverted IN 2 IIL40 91 Intermediate Latch Bit#41 Non-inverted IN 1 NIL41 92 Intermediate Latch Bit#41 Inverted IN 2 IIL41 93 Intermediate Latch Bit#42 Non-inverted IN 1 NIL42 94 Intermediate Latch Bit#42 Inverted IN 2 IIL42 95 Intermediate Latch Bit#43 Non-inverted IN 1 NIL42 96 Intermediate Latch Bit#43 Inverted IN 2 IIL43 97 Intermediate Latch Bit#44 Non-inverted IN 1 NIL44 98 Intermediate Latch Bit#44 Inverted IN 2 IIL44 99 Intermediate Latch Bit#45 Non-inverted IN 1 NIL45 100 Intermediate Latch Bit#45 Inverted IN 2 IIL45 101 Intermediate Latch Bit#46 Non-inverted IN 1 NIL46 102 Intermediate Latch Bit#46 Inverted IN 2 IIL46 103 Intermediate Latch Bit#47 Non-inverted IN 1 NIL47 104 Intermediate Latch Bit#47 Inverted IN 2 IIL47 105 Intermediate Latch Bit#48 Non-inverted IN 1 NIL48 106 Intermediate Latch Bit#48 Inverted IN 2 IIL48 107 Intermediate Latch Bit#49 Non-inverted IN 1 NIL49 108 Intermediate Latch Bit#49 Inverted IN 2 IIL49 109 Intermediate Latch Bit#50 Non-inverted IN 1 NIL50 110 Intermediate Latch Bit#50 Inverted IN 2 IIL50 111 Intermediate Latch Bit#51 Non-inverted IN 1 NIL51 112 Intermediate Latch Bit#51 Inverted IN 2 IIL51 113 Intermediate Latch Bit#52 Non-inverted IN 1 NIL52 114 Intermediate Latch Bit#52 Inverted IN 2 IIL52 115 Intermediate Latch Bit#53 Non-inverted IN 1 NIL53 116 Intermediate Latch Bit#53 Inverted IN 2 IIL53 117 Intermediate Latch Bit#54 Non-inverted IN 1 NIL54 118 Intermediate Latch Bit#54 Inverted IN 2 IIL54 119 Intermediate Latch Bit#55 Non-inverted IN 1 NIL55 120 Intermediate Latch Bit#55 Inverted IN 2 IIL55 121 Intermediate Latch Bit#56 Non-inverted IN 1 NIL56 122 Intermediate Latch Bit#56 Inverted IN 2 IIL56 123 Intermediate Latch Bit#57 Non-inverted IN 1 NIL57 124 Intermediate Latch Bit#57 Inverted IN 2 IIL57 125 Intermediate Latch Bit#58 Non-inverted IN 1 NIL58 126 Intermediate Latch Bit#58 Inverted IN 2 IIL58 127 Intermediate Latch Bit#59 Non-inverted IN 1 NIL59 128 Intermediate Latch Bit#59 Inverted IN 2 IIL59 129 Intermediate Latch Bit#60 Non-inverted IN 1 NIL60 130 Intermediate Latch Bit#60 Inverted IN 2 IIL60 131 Intermediate Latch Bit#61 Non-inverted IN 1 NIL61 132 Intermediate Latch Bit#61 Inverted IN 2 IIL61 133 Intermediate Latch Bit#62 Non-inverted IN 1 NIL62 134 Intermediate Latch Bit#62 Inverted IN 2 IIL62 135 Intermediate Latch Bit#63 Non-inverted IN 1 NIL63 136 Intermediate Latch Bit#63 Inverted IN 2 IIL63 137 Intermediate Latch Bit#64 Non-inverted IN 1 NIL64 138 Intermediate Latch Bit#64 Inverted IN 2 IIL64 139 Ground GND 140 Ground GND ----------------------------------------------------------------------------- J2 : FIRST LEVEL TRIGGER CONTROL COMPUTER BUS 140 PIN CONNECTOR ------------------------------------------------------------------------------ Plug & Pin Function Wire # Mnemonic # on cable ------------------------------------------------------------------------------ 1 Ground GND 2 Ground GND 3 Intermediate Latch Bit#65 Non-inverted IN 1 NIL65 4 Intermediate Latch Bit#65 Inverted IN 2 IIL65 5 Intermediate Latch Bit#66 Non-inverted IN 1 NIL66 6 Intermediate Latch Bit#66 Inverted IN 2 IIL66 7 Intermediate Latch Bit#67 Non-inverted IN 1 NIL67 8 Intermediate Latch Bit#67 Inverted IN 2 IIL67 9 Intermediate Latch Bit#68 Non-inverted IN 1 NIL68 10 Intermediate Latch Bit#68 Inverted IN 2 IIL68 11 Intermediate Latch Bit#69 Non-inverted IN 1 NIL69 12 Intermediate Latch Bit#69 Inverted IN 2 IIL69 13 Intermediate Latch Bit#70 Non-inverted IN 1 NIL70 14 Intermediate Latch Bit#70 Inverted IN 2 IIL70 15 Intermediate Latch Bit#71 Non-inverted IN 1 NIL71 16 Intermediate Latch Bit#71 Inverted IN 2 IIL71 17 Intermediate Latch Bit#72 Non-inverted IN 1 NIL72 18 Intermediate Latch Bit#72 Inverted IN 2 IIL72 19 Intermediate Latch Bit#73 Non-inverted IN 1 NIL73 20 Intermediate Latch Bit#73 Inverted IN 2 IIL73 21 Intermediate Latch Bit#74 Non-inverted IN 1 NIL74 22 Intermediate Latch Bit#74 Inverted IN 2 IIL74 23 Intermediate Latch Bit#75 Non-inverted IN 1 NIL75 24 Intermediate Latch Bit#75 Inverted IN 2 IIL75 25 Intermediate Latch Bit#76 Non-inverted IN 1 NIL76 26 Intermediate Latch Bit#76 Inverted IN 2 IIL76 27 Intermediate Latch Bit#77 Non-inverted IN 1 NIL77 28 Intermediate Latch Bit#77 Inverted IN 2 IIL77 29 Intermediate Latch Bit#78 Non-inverted IN 1 NIL78 30 Intermediate Latch Bit#78 Inverted IN 2 IIL78 31 Intermediate Latch Bit#79 Non-inverted IN 1 NIL79 32 Intermediate Latch Bit#79 Inverted IN 2 IIL79 33 Intermediate Latch Bit#80 Non-inverted IN 1 NIL80 34 Intermediate Latch Bit#80 Inverted IN 2 IIL80 35 Intermediate Latch Bit#81 Non-inverted IN 1 NIL81 36 Intermediate Latch Bit#81 Inverted IN 2 IIL81 37 Intermediate Latch Bit#82 Non-inverted IN 1 NIL82 38 Intermediate Latch Bit#82 Inverted IN 2 IIL82 39 Intermediate Latch Bit#83 Non-inverted IN 1 NIL83 40 Intermediate Latch Bit#83 Inverted IN 2 IIL83 41 Intermediate Latch Bit#84 Non-inverted IN 1 NIL84 42 Intermediate Latch Bit#84 Inverted IN 2 IIL84 43 Intermediate Latch Bit#85 Non-inverted IN 1 NIL85 44 Intermediate Latch Bit#85 Inverted IN 2 IIL85 45 Intermediate Latch Bit#86 Non-inverted IN 1 NIL86 46 Intermediate Latch Bit#86 Inverted IN 2 IIL86 47 Intermediate Latch Bit#87 Non-inverted IN 1 NIL87 48 Intermediate Latch Bit#87 Inverted IN 2 IIL87 49 Intermediate Latch Bit#88 Non-inverted IN 1 NIL88 50 Intermediate Latch Bit#88 Inverted IN 2 IIL88 51 Intermediate Latch Bit#89 Non-inverted IN 1 NIL89 52 Intermediate Latch Bit#89 Inverted IN 2 IIL89 53 Intermediate Latch Bit#90 Non-inverted IN 1 NIL90 54 Intermediate Latch Bit#90 Inverted IN 2 IIL90 55 Intermediate Latch Bit#91 Non-inverted IN 1 NIL91 56 Intermediate Latch Bit#91 Inverted IN 2 IIL91 57 Intermediate Latch Bit#92 Non-inverted IN 1 NIL92 58 Intermediate Latch Bit#92 Inverted IN 2 IIL92 59 Intermediate Latch Bit#93 Non-inverted IN 1 NIL93 60 Intermediate Latch Bit#93 Inverted IN 2 IIL93 61 Intermediate Latch Bit#94 Non-inverted IN 1 NIL94 62 Intermediate Latch Bit#94 Inverted IN 2 IIL94 63 Intermediate Latch Bit#95 Non-inverted IN 1 NIL95 64 Intermediate Latch Bit#95 Inverted IN 2 IIL95 65 Intermediate Latch Bit#96 Non-inverted IN 1 NIL96 66 Intermediate Latch Bit#96 Inverted IN 2 IIL96 67 Ground GND 68 Ground GND 69 Power +5.0 V VCC 70 Power +5.0 V VCC 71 Power -5.0 V VEE 72 Power -5.0 V VEE 73 Ground GND 74 Ground GND 75 Intermediate Latch Bit#97 Non-inverted IN 1 NIL97 76 Intermediate Latch Bit#97 Inverted IN 2 IIL97 77 Intermediate Latch Bit#98 Non-inverted IN 1 NIL98 78 Intermediate Latch Bit#98 Inverted IN 2 IIL98 79 Intermediate Latch Bit#99 Non-inverted IN 1 NIL99 80 Intermediate Latch Bit#99 Inverted IN 2 IIL99 81 Intermediate Latch Bit#100 Non-inverted IN 1 NIL100 82 Intermediate Latch Bit#100 Inverted IN 2 IIL100 83 Intermediate Latch Bit#101 Non-inverted IN 1 NIL101 84 Intermediate Latch Bit#101 Inverted IN 2 IIL101 85 Intermediate Latch Bit#102 Non-inverted IN 1 NIL102 86 Intermediate Latch Bit#102 Inverted IN 2 IIL102 87 Intermediate Latch Bit#103 Non-inverted IN 1 NIL103 88 Intermediate Latch Bit#103 Inverted IN 2 IIL103 89 Intermediate Latch Bit#104 Non-inverted IN 1 NIL104 90 Intermediate Latch Bit#104 Inverted IN 2 IIL104 91 Intermediate Latch Bit#105 Non-inverted IN 1 NIL105 92 Intermediate Latch Bit#105 Inverted IN 2 IIL105 93 Intermediate Latch Bit#106 Non-inverted IN 1 NIL106 94 Intermediate Latch Bit#106 Inverted IN 2 IIL106 95 Intermediate Latch Bit#107 Non-inverted IN 1 NIL107 96 Intermediate Latch Bit#107 Inverted IN 2 IIL107 97 Intermediate Latch Bit#108 Non-inverted IN 1 NIL108 98 Intermediate Latch Bit#108 Inverted IN 2 IIL108 99 Intermediate Latch Bit#109 Non-inverted IN 1 NIL109 100 Intermediate Latch Bit#109 Inverted IN 2 IIL109 101 Intermediate Latch Bit#110 Non-inverted IN 1 NIL110 102 Intermediate Latch Bit#110 Inverted IN 2 IIL110 103 Intermediate Latch Bit#111 Non-inverted IN 1 NIL111 104 Intermediate Latch Bit#111 Inverted IN 2 IIL111 105 Intermediate Latch Bit#112 Non-inverted IN 1 NIL112 106 Intermediate Latch Bit#112 Inverted IN 2 IIL112 107 Intermediate Latch Bit#113 Non-inverted IN 1 NIL113 108 Intermediate Latch Bit#113 Inverted IN 2 IIL113 109 Intermediate Latch Bit#114 Non-inverted IN 1 NIL114 110 Intermediate Latch Bit#114 Inverted IN 2 IIL114 111 Intermediate Latch Bit#115 Non-inverted IN 1 NIL115 112 Intermediate Latch Bit#115 Inverted IN 2 IIL115 113 Intermediate Latch Bit#116 Non-inverted IN 1 NIL116 114 Intermediate Latch Bit#116 Inverted IN 2 IIL116 115 Intermediate Latch Bit#117 Non-inverted IN 1 NIL117 116 Intermediate Latch Bit#117 Inverted IN 2 IIL117 117 Intermediate Latch Bit#118 Non-inverted IN 1 NIL118 118 Intermediate Latch Bit#118 Inverted IN 2 IIL118 119 Intermediate Latch Bit#119 Non-inverted IN 1 NIL119 120 Intermediate Latch Bit#119 Inverted IN 2 IIL119 121 Intermediate Latch Bit#120 Non-inverted IN 1 NIL120 122 Intermediate Latch Bit#120 Inverted IN 2 IIL120 123 Intermediate Latch Bit#121 Non-inverted IN 1 NIL121 124 Intermediate Latch Bit#121 Inverted IN 2 IIL121 125 Intermediate Latch Bit#122 Non-inverted IN 1 NIL122 126 Intermediate Latch Bit#122 Inverted IN 2 IIL122 127 Intermediate Latch Bit#123 Non-inverted IN 1 NIL123 128 Intermediate Latch Bit#123 Inverted IN 2 IIL123 129 Intermediate Latch Bit#124 Non-inverted IN 1 NIL124 130 Intermediate Latch Bit#124 Inverted IN 2 IIL124 131 Intermediate Latch Bit#125 Non-inverted IN 1 NIL125 132 Intermediate Latch Bit#125 Inverted IN 2 IIL125 133 Intermediate Latch Bit#126 Non-inverted IN 1 NIL126 134 Intermediate Latch Bit#126 Inverted IN 2 IIL126 135 Intermediate Latch Bit#127 Non-inverted IN 1 NIL127 136 Intermediate Latch Bit#127 Inverted IN 2 IIL127 137 Intermediate Latch Bit#128 Non-inverted IN 1 NIL128 138 Intermediate Latch Bit#128 Inverted IN 2 IIL128 139 Ground GND 140 Ground GND ----------------------------------------------------------------------------- J3 : COMPUTER BUS CONNECTOR ------------------------------------------------------------------------------ Pin # Color on on cable Function Mnemonic Cable ---------------------------------------------------------------------------- 1 Brown Bidirectional Data Bit#8 Non-inverted NDB8 2 Tan Bidirectional Data Bit#8 Inverted IDB8 3 Red Bidirectional Data Bit#7 Non-inverted NDB7 4 Tan Bidirectional Data Bit#7 Inverted IDB7 5 Orange Bidirectional Data Bit#6 Non-inverted NDB6 6 Tan Bidirectional Data Bit#6 Inverted IDB6 7 Yellow Bidirectional Data Bit#5 Non-inverted NDB5 8 Tan Bidirectional Data Bit#5 Inverted IDB5 9 Green Bidirectional Data Bit#4 Non-inverted NDB4 0 Tan Bidirectional Data Bit#4 Inverted IDB4 11 Blue Bidirectional Data Bit#3 Non-inverted NDB3 12 Tan Bidirectional Data Bit#3 Inverted IDB3 13 Violet Bidirectional Data Bit#2 Non-inverted NDB2 14 Tan Bidirectional Data Bit#2 Inverted IDB2 15 Grey Bidirectional Data Bit#1 Non-inverted NDB1 16 Tan Bidirectional Data Bit#1 Inverted IDB1 17 White Direction Non-inverted NDIR 18 Tan Direction Inverted IDIR 19 Black Strobe Non-inverted NSTB 20 Tan Strobe Inverted ISTB 21 Brown Function Address Bit#8 Non-inverted NAF8 22 Tan Function Address Bit#8 Inverted IAF8 23 Red Function Address Bit#7 Non-inverted NAF7 24 Tan Function Address Bit#7 Inverted IAF7 25 Orange Function Address Bit#6 Non-inverted NAF6 26 Tan Function Address Bit#6 Inverted IAF6 27 Yellow Function Address Bit#5 Non-inverted NAF5 28 Tan Function Address Bit#5 Inverted IAF5 29 Green Function Address Bit#4 Non-inverted NAF4 30 Tan Function Address Bit#4 Inverted IAF4 31 Blue Function Address Bit#3 Non-inverted NAF3 32 Tan Function Address Bit#3 Inverted NAF3 33 Violet Function Address Bit#2 Non-inverted NAF2 34 Tan Function Address Bit#2 Inverted IAF2 35 Grey Function Address Bit#1 Non-inverted NAF1 36 Tan Function Address Bit#1 Inverted IAF1 37 White Card Address Bit#6 Non-inverted NAC6 38 Tan Card Address Bit#6 Inverted IAC6 33 Black Card Address Bit#5 Non-inverted NAC5 40 Tan Card Address Bit#5 Inverted IAC5 41 Brown Card Address Bit#4 Non-inverted NAC4 42 Tan Card Address Bit#4 Inverted IAC4 43 Red Card Address Bit#3 Non-inverted NAC3 44 Tan Card Address Bit#3 Inverted IAC3 45 Orange Card Address Bit#2 Non-inverted NAC2 46 Tan Card Address Bit#2 Inverted IAC2 47 Yellow Card Address Bit#1 Non-inverted NAC1 48 Tan Card Address Bit#1 Inverted IAC1 49 Green TS&S H LED's Off Non-inverted NTSH 50 Tan TS&S H LED's Off Inverted ITSH 51 Blue Timing & Sync. Signal G Non-inverted NTSG 52 Tan Timing & Sync. Signal G Inverted ITSG 53 Violet Timing & Sync. Signal F Non-inverted NTSF 54 Tan Timing & Sync. Signal F Inverted ITSF 55 Grey Timing & Sync. Signal E Non-inverted NTSE 56 Tan Timing & Sync. Signal E Inverted ITSE 57 White Timing & Sync. Signal D Non-inverted NTSD 58 Tan Timing & Sync. Signal D Inverted ITSD 59 Black TS&S C Read 29520 A/B Non-inverted NTSC 60 Tan TS&S C Read 29520 A/B Inverted ITSC 61 Brown TS&S B Latch/Shift 29520 Non-inverted NTSB 62 Tan TS&S B Latch/Shift 29520 Inverted ITSB 63 Red TS&S A Write 29520 A/B Non-inverted NTSA 64 Tan TS&S A Write 29520 A/B Inverted ITSA ----------------------------------------------------------------------------- DRAWINGS - List of all the drawings produced with drawing numbers. List of every paper written about this board. BOARD HISTORY REVISION A - Number of printed circuit boards ordered & Date - list of the serial numbers of the card built for this revision. - List of all the Engineering Changes Order (ECO) valid for this revision. - Special assembly recommendations and handling precautions. - Parts used : Quantity Item ----------- ---------- 3 10H124 38 10H125 3 10H188 1 74ALS04 1 74ALS32 2 74ALS138 1 74ALS520 17 74ALS540 3 74ALS541 16 Am29520 136 DIALCO2001 19 110A471 20 316B101 1 DIP SWITCH 2 RBM140 1 3MR64 123 BYPASS CAPACITORS Revision - Modification History IMLRO Modification to Use Separate 29520 Latch-Shift Signals for Different Sections of the IML Input Bits -------------------------------------------------------- Bill Walz Rev. 2-JUN-1992 This modification will divide the 128 IML Input Bits into 4 sections; each section will receive a separate 29520 Latch-Shift Signal. These 4 new Latch-Shift signals are received on the card by 4 of the existing IML Bit diferential ECL receivers. The 29520 Latch-Shift signal received from the front CBus connecter is not used once the modification is installed. The front CBus still provides the other control signals for the 29520's (e.g. read write A/B control, address select). This modification will provide the following sections of IML input bits and 29520 Latch-Shift signals. Latch-Shift Signal IML Input that IML Bits Received on rear Receives the in a Section Latch-Shift Signal Connector pins Latch-Shift ------------ ------------------ ---------------- -------------- 0:15 Latch-Shift #1 pins 43,44 IML-20 16:31 Latch-Shift #2 pins 45,46 IML-21 32:95 Latch-Shift #3 pins 47,48 IML-22 96:127 Latch-Shift #4 pins 49,50 IML-23 Numbered 0:127 A detailed description of this modification is given in the following: 1. Cut trace between U34 & U35 on component side that is connected to U35 pin 11. 2. Cut trace between U36 & U37 on component side that is connected to U37 pin 11. 3. Cut trace between U44 & U45 on component side that is connected to U45 pin 11. 4. Cut trace from U40 pin 11 to via on solder side. 5. Cut trace from U48 pin 11 to via on solder side. 6. Solder wire-wrap wire from U40 pin 11 to U41 pin 11 on solder side. 7. Solder wire-wrap wire from 3rd via from front of card between U34 and U35 to U34 pin 11. 8. Solder wire-wrap wire from 2nd via from front of card between U34 and U35 to U35 pin 11. 9. Solder wire-wrap wire from 1st via from front of card between U34 and U35 to U37 pin 11. 10. Solder wire-wrap wire from U35 pin 10 to U45 pin 11.