MTG REVISION B FEB 1990 -------------------------------- 1. 2k x 8 PROMS CY7C245A-25 2. The ROM Address Counter needs to be extended from 8 bits to 10 (12) bits. 3. The Terminal Count Comparator for the ROM Address Counter needs to be extended from 8 bits to 10 (10) bits. 4. Extend the register(s) that allow the ROM Address Counter to be read over the C-Bus from 8 bits to 11 (16) bits. 5. Rework the ROM Address Counter clock input and reset input to do the following: Remove the clock selection PAL. Make the Reset selection section straight through and no extra junk. From C-Bus one should be able to select the Reset to be caused by either the external input, or the Terminal Count comparator, or to force a reset by setting a bit in a register. Reset is not a forced reset to zero, but a load from a preset register. The software reset IS a forced reset to zero. The terminal address count register should be a software register, not a dip-switch. Make the ROM Adress Counter Clock Input selectable from a C-Bus register to be either the External Input, or the on board crystal or one bit at a time increment via a bit in a register. Monitor outputs for the clock signal and the reset signal as they appear to the PROM Address Counter chips should be provided. These are differential ECL signals. 6. Multi layer; Vee, Vcc and GND planes.