Card Addresses D0 First Level Trigger Framework and Calorimeter Trigger --------------------------------------------------------------------------- 16-APRIL-1991 Latest Version 27-JUN-1995 **************************** * * * RACK NUMBER M103 * * ---------------- * **************************** TOP BACKPLANE - Framework Expansion: Cal Trig Final Sums, L1.5 ------------------------------------------------------------------------- 20. TLM CA = 40 Level 1.5 Term Done/Answer Fanout 19. DGM CA = 37 Level 1.5 Specific Trigger 12..15 18. DGM CA = 34 Level 1.5 Specific Trigger 8..11 17. DGM CA = 31 Level 1.5 Specific Trigger 4..7 16. DGM CA = 28 Level 1.5 Specific Trigger 0..3 15. IMLRO CA = 25 Level 1.5 Readout 14. DGM CA = 1 Level 1.5 Control 13. MTG CA = 19 Level 1.5 Veto/Confirm Spec Trig 0..15 12. MTG CA = 22 Receive Level 1.5 Term 0..31 11. MTG CA = 4 Level 1.5 Control 10. DBSC CA = 7 Level 1.5 Dead Crossings/Accept/Reject/Timeout 9. SBSC CA = 16 Level 1.5 Confirm/Veto per Spec Trig 8. SBSC CA = 13 Level 1.5 Dead Crossings/Timeout per Spec Trig 7. SBSC CA = 10 Level 1.5 Cycle/Skip per Spec Trig 6. CTMBD Level 1.5 MBA = 57 CBUS = 2 FWTSS -------- -------- ----- 5. IMLRO CA = 9 L0-L1, MPt, Auxiliary 4. IMLRO CA = 12 Cal Trig Counts 3. CTMBD Cal Trig Readout MBA = 154 CBUS = 2 CTTSS 2. IMLRO CA = 11 Cal Trig TOTEt,2LU:EM,HD,TOT --------- -------- ----- 1. IMLRO CA = 10 Cal Trig EMEt,HDEt,Px,Py See the end of this file for details of the inputs to the IMLRO's. MIDDLE BACKPLANE - Tier 1 Calorimeter Trigger Eta +1...+4 Phi 1...16 ------------------------------------------------------------------------- CARD FILE CARD BOARD SLOT ADDRESS TYPE ---- ------- ---------------------------------- 27 16 CAT2 HD SUM for Phi 1 through 8 TOP 26 20 CAT2 +PY SUM for Phi 1 through 8 25 24 CAT2 +PX SUM for Phi 1 through 8 24 28 CAT2 EM SUM for Phi 1 through 8 23 32-33 CTFE Phi 1 Eta +1 through +4 22 34-35 CTFE Phi 2 Eta +1 through +4 21 36-37 CTFE Phi 3 Eta +1 through +4 20 38-39 CTFE Phi 4 Eta +1 through +4 19 40-41 CTFE Phi 5 Eta +1 through +4 18 42-43 CTFE Phi 6 Eta +1 through +4 17 44-45 CTFE Phi 7 Eta +1 through +4 16 46-47 CTFE Phi 8 Eta +1 through +4 15 2-3 CHTCR for EM and HD Phi 1 through 8 14 -- CTMBD MOTHER BOARD MBA = 169 CBus = 0 --------------------- 13 17 CAT2 HD SUM for Phi 9 through 16 12 21 CAT2 +PY SUM for Phi 9 through 16 11 25 CAT2 -PX SUM for Phi 9 through 16 10 29 CAT2 EM SUM for Phi 9 through 16 9 48-49 CTFE Phi 9 Eta +1 through +4 8 50-51 CTFE Phi 10 Eta +1 through +4 7 52-53 CTFE Phi 11 Eta +1 through +4 6 54-55 CTFE Phi 12 Eta +1 through +4 5 56-57 CTFE Phi 13 Eta +1 through +4 4 58-59 CTFE Phi 14 Eta +1 through +4 3 60-61 CTFE Phi 15 Eta +1 through +4 2 62-63 CTFE Phi 16 Eta +1 through +4 1 4-5 CHTCR for EM and HD Phi 9 through 16 BOTTOM BOTTOM BACKPLANE - Tier 1 Calorimeter Trigger Eta +1...+4 Phi 17...32 -------------------------------------------------------------------------- CARD FILE CARD BOARD SLOT ADDRESS TYPE ---- ------- ---------------------------------- 27 16 CAT2 HD SUM for Phi 17 through 24 TOP 26 20 CAT2 -PY SUM for Phi 17 through 24 25 24 CAT2 -PX SUM for Phi 17 through 24 24 28 CAT2 EM SUM For phi 17 through 24 23 32-33 CTFE Phi 17 Eta +1 through +4 22 34-35 CTFE Phi 18 Eta +1 through +4 21 36-37 CTFE Phi 19 Eta +1 through +4 20 38-39 CTFE Phi 20 Eta +1 through +4 19 40-41 CTFE Phi 21 Eta +1 through +4 18 42-43 CTFE Phi 22 Eta +1 through +4 17 44-45 CTFE Phi 23 Eta +1 through +4 16 46-47 CTFE Phi 24 Eta +1 through +4 15 2-3 CHTCR for EM and HD Phi 17 through 24 14 -- CTMBD MOTHER BOARD MBA = 169 CBus = 1 --------------------- 13 17 CAT2 HD SUM for Phi 25 through 32 12 21 CAT2 -PY SUM for Phi 25 through 32 11 25 CAT2 +PX SUM for Phi 25 through 32 10 29 CAT2 EM SUM for Phi 25 through 32 9 48-49 CTFE Phi 25 Eta +1 through +4 8 50-51 CTFE Phi 26 Eta +1 through +4 7 52-53 CTFE Phi 27 Eta +1 through +4 6 54-55 CTFE Phi 28 Eta +1 through +4 5 56-57 CTFE Phi 29 Eta +1 through +4 4 58-59 CTFE Phi 30 Eta +1 through +4 3 60-61 CTFE Phi 31 Eta +1 through +4 2 62-63 CTFE Phi 32 Eta +1 through +4 1 4-5 CHTCR for EM and HD Phi 25 through 32 BOTTOM Notes about Top Backplane in M103 Framework Expansion: Connections to the inputs of the IMLRO cards in M103 that are used to readout the Calorimeter Trigger Final Sums. ---------------------------------------------------------------- Recall how the IMLRO is addressed: The IMLRO can handle up to 128 bits numbered IML0 through IML127. IML0 ... IML7 are read at Function Address 0 as data bits Data1...Data8 IML120...IML127 are read at Function Address 15 as data bits Data1...Data8 The Cal Trig "Final Sum IMLRO's" are connected in the following way: Card Address 12 is the "CHTCR Counts IMLRO" EM Ref Set 0 final count is connected to IMLRO bits 0 through 15 which are readout at FA's 0 and 1 with FA 1 being the MSByte. EM Ref Set 1 final count is connected to IMLRO bits 16 through 31 which are readout at FA's 2 and 3 with FA 3 being the MSByte. EM Ref Set 2 final count is connected to IMLRO bits 32 through 47 which are readout at FA's 4 and 5 with FA 5 being the MSByte. EM Ref Set 3 final count is connected to IMLRO bits 48 through 63 which are readout at FA's 6 and 7 with FA 7 being the MSByte. HD Ref Set 0 final count is connected to IMLRO bits 64 through 79 which are readout at FA's 8 and 9 with FA 9 being the MSByte. HD Ref Set 1 final count is connected to IMLRO bits 80 through 95 which are readout at FA's 10 and 11 with FA 11 being the MSByte. HD Ref Set 2 final count is connected to IMLRO bits 96 through 111 which are readout at FA's 12 and 13 with FA 13 being the MSByte. HD Ref Set 3 final count is connected to IMLRO bits 112 through 127 which are readout at FA's 14 and 15 with FA 15 being the MSByte. Card Address 11 is the "Total Et, L2 EM, L2 HD, L2 Total Final Sums IMLRO" Lookup 2 EM final sum is connected to IMLRO bits 0 through 23 which are readout at FA's 0, 1, and 2 with FA 2 being the MSByte. No Connection to IMLRO bits 24...31 read at FA=3. Lookup 2 HD final sum is connected to IMLRO bits 32 through 55 which are readout at FA's 4, 5, and 6 with FA 6 being the MSByte. No Connection to IMLRO bits 56...63 read at FA=7. Total Et final sum is connected to IMLRO bits 64 through 87 which are readout at FA's 8, 9, and 10 with FA 10 being the MSByte. No Connection to IMLRO bits 88...95 read at FA=11. Lookup 2 Total final sum is connected to IMLRO bits 96 through 119 which are readout at FA's 12, 13, and 14 with FA 14 being the MSByte. No Connection to IMLRO bits 120...127 read at FA=15. Card Address 10 is the "EM Et, HD Et, Px, Py Final Sum IMLRO" EM Et final sum is connected to IMLRO bits 0 through 23 which are readout at FA's 0, 1, and 2 with FA 2 being the MSByte. No Connection to IMLRO bits 24...31 read at FA=3. HD Et final sum is connected to IMLRO bits 32 through 55 which are readout at FA's 4, 5, and 6 with FA 6 being the MSByte. No Connection to IMLRO bits 56...63 read at FA=7. Px final sum is connected to IMLRO bits 64 through 87 which are readout at FA's 8, 9, and 10 with FA 10 being the MSByte. No Connection to IMLRO bits 88...95 read at FA=11. Py final sum is connected to IMLRO bits 96 through 119 which are readout at FA's 12, 13, and 14 with FA 14 being the MSByte. No Connection to IMLRO bits 120...127 read at FA=15. Card Address 9 is the "L0 Vertex and L1.5 IMLRO"