CARD ADDRESSES D0 FIRST LEVEL TRIGGER FRAMEWORK AND CALORIMETER TRIGGER ------------------------------------------------- 16-APRIL-1991 Latest Rev. 25-MAY-1994 **************************** * * * RACK NUMBER M114 * * ---------------- * **************************** ============= TOP BACKPLANE ============= Slot Description CBUS CA BBA/MBA ------------------------------------------------------------------------- 20. Bus Buffer Board, Tier 1 M111..M112 CBUS 1 BBA 224 19. Bus Buffer Board, Tier 1 M107..M110 CBUS 1 BBA 200 18. Bus Buffer Board, Tier 1 M103..M106 CBUS 1 BBA 168 17. Bus Buffer Board, Tier 1 M111..M112 CBUS 0 BBA 224 16. Bus Buffer Board, Tier 1 M107..M110 CBUS 0 BBA 200 15. Bus Buffer Board, Tier 1 M103..M106 CBUS 0 BBA 168 14. Bus Buffer Board, Tier 2 M111 CBUS 2 BBA 248 13. Bus Buffer Board, Tier 2 M109 CBUS 2 BBA 208 12. Bus Buffer Board, Tier 2 M105 CBUS 2 BBA 176 11. Bus Buffer Board, Tier 3 M107 CBUS 2 BBA 152 10. Master Timing Generator, Cal Trigger CA 53 9. Special I/O MTG Rev. A CA 8 FA=0,8,16,24 8. Mother Board Driver, Timing Backplane CBUS 2 MBA 105 7. Master Timing Generator, Framework CA 35 6. Bus Buffer Board, Timing Backplane CBUS 2 BBA 104 5. Bus Buffer Board, FW Expansion M103 CBUS 2 BBA 56 4. Bus Buffer Board, Framework M101 CBUS 2 BBA 128 3. Bus Buffer Board, Framework M102 CBUS 2 BBA 64 2. Pilot COMINT CBUS 0..1 1. Assistant COMINT CBUS 2..3 Note: The Cal Trig MTG, Framework MTG, and 4 Byte MTG are all on CBUS 2, MBA 105. The Data Buffer And-Or cards for Trigger Tower Reference Sets and Large Tile Reference Sets are both on CBUS 2, MBA 106. The length of the TSSBUS cable exiting each Tier 1 (Tier 2) BBB should be roughly the same. In this way, timing skew will not accumulate (this is most important for Tier 2). ================ BOTTOM BACKPLANE ================ Slot Card Address Card Type ------------------------------------------------------------------------- 20 OPEN 11 56 DBSC Foreign # 4.. 1: MR Phase, Spare, Spare, Spare 12 53 DBSC Foreign # 8.. 5: 13 50 DBSC Foreign #12.. 9: 14 47 DBSC Foreign #16..13: 15 44 DBSC Foreign #20..17: 16 41 DBSC Foreign #24..21: 17 38 DBSC Foreign #28..25: 18 35 DBSC Foreign #32..29: 19 32 DBSC Foreign #36..33: 10 29 DBSC Foreign #40..37: 9 26 DBSC Foreign #44..41: 8 23 DBSC read twice: L1.5 Cycle, L1.5 Potential, L0, Spare 7 20 DBSC L0*P5, L0*P6, L1.5 Skip, DBlock Cycle 6 17 DBSC L0*P1, L0*P2, L0*P3, L0*P4 5 CTMBD with CCCP MBA = 106 CBUS = 2 4 14 ANDOR Ref Set vs Spec Trig -------------------- 3 11 ANDOR Large Tile RS vs ST 2 (open) 1 (open)