TITLE Cable Receiver Card Strobe Clipper PATTERN CRC Strobe Clipper Revision 2 REVISION 2.06 AUTHOR Level 1.5 Calorimeter Trigger (Steve Gross) COMPANY MSU HEP DATE 14-MAR-1994 ; The detailed description of this device is at the end of this file. CHIP CRCStrob PAL16V8 ;PINS ;1 2 3 4 5 6 7 8 NC_In_0 /CRDY_1 /CRDY_2 /CRDY_3 /CRDY_4 NC_In_5 /STMSIn_1 STROBEIN ;9 10 11 12 13 14 15 16 VMERESET GND /NC_OE /STBMSK_1 /STBMSK_2 /STBMSK_3 /STBMSK_4 /CSTRB_4 ;17 18 19 20 /CSTRB_3 /CSTRB_2 /CSTRB_1 Vcc ; This device has active-low outputs. It simulates programmable ; output polarity by allowing the latch "D" input to be inverted. ; For both latched and unlatched outputs, this is equivalent to ; programmable polarity (since the 16V8 does not have SET and RESET ; inputs on the D-latches in the macrocells). EQUATIONS ;/NC_OE = GND ; This term is pin #11 on this ; ; 16V8 PAL. Since we are not ; ; using registers in this part, ; ; the pin #11 is used as the ; ; "Input_9" pin (NOT as an output ; ; enable). This term is not used ; ; in this PAL. This pin is wired ; ; low on the CRC circuit board. ;NC_In_0 = Vcc ; This term is the "Input_0" pin ; ; which is not used in this PAL ; ; design. This pin is wired high ; ; on the CRC circuit board. STBMSK_1 = VMERESET ; This term is the Mask for + CRDY_1 ; the /CSTRB_1 output. It goes + /STROBEIN * STMSIn_1 ; high when VMERESET goes high. ; If STROBEIN is low and /CRDY_1 ; is high when VMERESET goes low, ; then it remains high until ; STROBEIN goes high (at which ; point this term goes low). ; This term remains low until ; /CRDY goes low (at which point ; this term goes high). It will ; not go low again until ; STROBEIN goes high again. ; This term is used to Mask the ; /CSTRB_1 output between the ; rising edge of /CRDY_1 and the ; rising edge of STROBEIN ; NOTE FOR STBMSK_1 ONLY: ; Note that the "feedback ; term" for STBMSK_1 actually ; comes from the STMSIn_1 pin ; (not the "normal" internal ; feedback path). The ; /STMSIn_1 input is wired to ; the /STBMSK_1 output on the ; CRC circuit board. This is ; done because the 16V8 PAL ; cannot use the internal ; feedback path on pin #12 ; in a non-registered design. STBMSK_2 = VMERESET ; This term is the Mask for + CRDY_2 ; the /CSTRB_2 output. It goes + /STROBEIN * STBMSK_2 ; high when VMERESET goes high. ; If STROBEIN is low and /CRDY_2 ; is high when VMERESET goes low, ; then it remains high until ; STROBEIN goes high (at which ; point this term goes low). ; This term remains low until ; /CRDY goes low (at which point ; this term goes high). It will ; not go low again until ; STROBEIN goes high again. ; This term is used to Mask the ; /CSTRB_2 output between the ; rising edge of /CRDY_2 and the ; rising edge of STROBEIN STBMSK_3 = VMERESET ; This term is the Mask for + CRDY_3 ; the /CSTRB_3 output. It goes + /STROBEIN * STBMSK_3 ; high when VMERESET goes high. ; If STROBEIN is low and /CRDY_3 ; is high when VMERESET goes low, ; then it remains high until ; STROBEIN goes high (at which ; point this term goes low). ; This term remains low until ; /CRDY goes low (at which point ; this term goes high). It will ; not go low again until ; STROBEIN goes high again. ; This term is used to Mask the ; /CSTRB_3 output between the ; rising edge of /CRDY_3 and the ; rising edge of STROBEIN STBMSK_4 = VMERESET ; This term is the Mask for + CRDY_4 ; the /CSTRB_4 output. It goes + /STROBEIN * STBMSK_4 ; high when VMERESET goes high. ; If STROBEIN is low and /CRDY_4 ; is high when VMERESET goes low, ; then it remains high until ; STROBEIN goes high (at which ; point this term goes low). ; This term remains low until ; /CRDY goes low (at which point ; this term goes high). It will ; not go low again until ; STROBEIN goes high again. ; This term is used to Mask the ; /CSTRB_4 output between the ; rising edge of /CRDY_4 and the ; rising edge of STROBEIN CSTRB_1 = /STROBEIN * /CRDY_1 * /STMSIn_1 ; This term is the CSTRB_1 term. It ; goes high when STROBEIN is low and ; /CRDY_1 is high if STBMSK_1 is ; low. That is (including the ; operation of STBMSK and /CRDY), ; it will go high after the falling ; edge of STROBEIN and remain high ; until the falling edge of /CRDY). ; This term is inverted and driven ; off-card as the /CSTRB_1 output ; to the C40 Comm Port. ; NOTE FOR CSTRB_1 ONLY: ; Note that the "latched" term ; for CSTRB_1 actually comes ; from the STMSIn_1 pin (not ; the "normal" internal feedback ; path from STBMSK_1). The ; /STMSIn_1 input is wired to the ; /STBMSK_1 output on the CRC ; circuit board. This is done ; because the 16V8 PAL cannot use ; the internal feedback path on ; pin #12 in a non-registered ; design. ; NOTE FOR STBMSK_1 ONLY: ; Note that the "feedback ; term" for STBMSK_1 actually ; comes from the STMSIn_1 pin ; (not the "normal" internal ; feedback path). The ; /STMSIn_1 input is wired to ; the /STBMSK_1 output on the ; CRC circuit board. This is ; done because the 16V8 PAL ; cannot use the internal ; feedback path on pin #12 ; in a non-registered design. CSTRB_2 = /STROBEIN * /CRDY_2 * /STBMSK_2 ; This term is the CSTRB_2 term. It ; goes high when STROBEIN is low and ; /CRDY_2 is high if STBMSK_2 is ; low. That is (including the ; operation of STBMSK and /CRDY), ; it will go high after the falling ; edge of STROBEIN and remain high ; until the falling edge of /CRDY). ; This term is inverted and driven ; off-card as the /CSTRB_2 output ; to the C40 Comm Port. CSTRB_3 = /STROBEIN * /CRDY_3 * /STBMSK_3 ; This term is the CSTRB_3 term. It ; goes high when STROBEIN is low and ; /CRDY_3 is high if STBMSK_3 is ; low. That is (including the ; operation of STBMSK and /CRDY), ; it will go high after the falling ; edge of STROBEIN and remain high ; until the falling edge of /CRDY). ; This term is inverted and driven ; off-card as the /CSTRB_3 output ; to the C40 Comm Port. CSTRB_4 = /STROBEIN * /CRDY_4 * /STBMSK_4 ; This term is the CSTRB_4 term. It ; goes high when STROBEIN is low and ; /CRDY_4 is high if STBMSK_4 is ; low. That is (including the ; operation of STBMSK and /CRDY), ; it will go high after the falling ; edge of STROBEIN and remain high ; until the falling edge of /CRDY). ; This term is inverted and driven ; off-card as the /CSTRB_4 output ; to the C40 Comm Port. ; Description of this CRC Strobe Clipper PAL Revision 2 ; ; This circuit uses a 16V8 type of PAL. ; ; Pin Signal Description PCB Connection ; --- ---------------------------- ---------------------------------- ; ; 1 NC_In_0 This pin should be tied HIGH. ; It is not used in this PAL design ; ; 2 /CRDY_1 This pin should be tied to the ; /CRDY signal from Comm Port #1 ; ; 3 /CRDY_2 This pin should be tied to the ; /CRDY signal from Comm Port #2 ; ; 4 /CRDY_3 This pin should be tied to the ; /CRDY signal from Comm Port #3 ; ; 5 /CRDY_4 This pin should be tied to the ; /CRDY signal from Comm Port #4 ; ; 6 Not Connected Not connected to any PCB signal ; ; 7 /STMSIn_1 This pin should be connected to ; pin #12 on the CRC PCB. ; ; 8 STROBEIN This pin should be tied to the ; Strobe_In signal from the ERPB ; ; 9 VMERESET This pin should be tied to the ; VME RESET signal from the VME ; backplane through a "jumper wire" ; ; 10 Device GROUND This pin should be tied to the ; PCB GROUND plane ; ; 11 NC_OE This pin should be tied LOW on the ; CRC PCB. It is not used in this ; PAL design. ; ; 12 /STBMSK_1 This pin should be connected to ; pin #7 on the CRC PCB. ; ; 13 /STBMSK_2 Not connected to any PCB signal ; ; 14 /STBMSK_3 Not connected to any PCB signal ; ; 15 /STBMSK_4 Not connected to any PCB signal ; ; 16 /CSTRB_4 This pin should be tied to the ; /CSTRB signal for EM Copy #1 via ; a series-terminating resistor ; ; 17 /CSTRB_3 This pin should be tied to the ; /CSTRB signal for EM Copy #2 via ; a series-terminating resistor ; ; 18 /CSTRB_2 This pin should be tied to the ; /CSTRB signal for Tot Copy #1 via ; a series-terminating resistor ; ; 19 /CSTRB_1 This pin should be tied to the ; /CSTRB signal for Tot Copy #2 via ; a series-terminating resistor ; ; 20 Device Vcc This pin should be tied to the ; PCB VCC plane ; ; ; The logic of one "Channel" of this PAL is illustrated below: ; ; ; ; |\ +-------+ +-------+ ; STROBEIN >---| >O------+------| | | | |\ ; |/ +- | -----| AND |-----| OR |--| >O-----> /CSTRB_x ; from the | | +---| | | | |/ ; DC card | | | +-------+ +-------+ to a ; +-------+ | | C40 Comm ; | | +----------------------------------+ Port ; | | | ; | | +-------+ | ; | | | | | ; VMERESET >- | -------- | ---| AND |----+ | ; | | | | | | ; | | +-------+ | | ; | | | | ; | | +-------+ | +-------+ | ; | |\ | | | | | | | ; /CDRY_x >--+---| >O-- | ---| AND |--+ +--| | | ; |/ | | | | | OR | | ; from a | +-------+ +----| | |\ | ; C40 Comm | | |--| >O--++-> /STBMSK_x ; Port | +-------+ +---| | |/ | ; +----| | | +-------+ | This Term ; |\ | AND |---+ | remembers ; +---| >O-------| | | that ; | |/ +-------+ | /C40RDY ; | | has gone ; +------------------------------------------------+ low. It ; (note: for channel #1, the feedback forgets this when ; from /STBMSK_1 comes via an /DCSTRB goes high. ; external wire from pin #12 to ; pin #7 (the /STMSIn_1 input pin) ; ; This PAL performs the Level 1.5 Cal Trig CRC Strobe Clipper logic. ; ; A timing diagram of the functionality required from one "channel" of ; this device (which is composed of 4 identical "channels") is shown ; below: ; ; _____ ; VMERESET ___/ \___________________________________________________ ; ; ________ ________ ; STROBEIN XXXXXXX______/ \________________/ \____________ ; ; ____________ ____________ ; /STBMSK_n XXX\_________/ \____________/ \_______ ; ; ____________________ _____________________ ______ ; /CSTRB_n XXXX \___/ \___/ ; ; ___________________ _____________________ ____ ; /CRDY_n XXXXXXX \___/ \___/ ; ; SIMULATION ; --------Enable tracing of several signals TRACE_ON VMERESET STROBEIN /CSTRB_1 /STBMSK_1 /STMSIn_1 /CRDY_1 /CSTRB_2 /STBMSK_2 /CRDY_2 /CSTRB_3 /STBMSK_3 /CRDY_3 /CSTRB_4 /STBMSK_4 /CRDY_4 ; --------Set NC_In_0 high and /NC_OE low (done in wiring on PCB) SETF NC_In_0 NC_OE ; --------Set the inputs to the normal "quiescent" state SETF /VMERESET /STROBEIN /CRDY_1 /CRDY_2 /CRDY_3 /CRDY_4 ; The outputs should all be "unknown" at this time because the "psuedo- ; latch" on the STBMSK_x terms has not been forced to a known state. ; The test vectors created by the simulator may not be correctly able ; to handle this situation. Check these test vectors carefully. ; --------Initialize the "pseudo-latch" on the STBMSK_x terms by ; activating the VMERESET signal SETF VMERESET ; Since VMERESET has gone high, we need to manually force /STMSIn_1 low ; (since it follows /STBMSK_1) SETF STMSIn_1 ; Now all of the STBMSK signals should be high, and all of the /CSTRB ; signals should be high. CHECK STBMSK_1 STBMSK_2 STBMSK_3 STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ; Now deactivate VMERESET SETF /VMERESET ; Now check that nothing changes CHECK STBMSK_1 STBMSK_2 STBMSK_3 STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ; --------Now cause all /CSTRB outputs to go low simultaneously ; by providing a LOW-to-HIGH-to-LOW pulse on STROBEIN ; First activate STROBEIN: This should clear the STBMSK_x signals SETF STROBEIN ; Since STROBEIN has gone high, we need to manually force /STMSIn_1 high ; (since it follows /STBMSK_1) ; SETF /STMSIn_1 ; The STBMSK signals should go low, but the /CSTRB outputs should remain high CHECK /STBMSK_1 /STBMSK_2 /STBMSK_3 /STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ; Now deactivate STROBEIN: This should cause all /CSTRB outputs to go low SETF /STROBEIN ; The STBMSK signals should stay low, and the /CSTRB outputs should go low CHECK /STBMSK_1 /STBMSK_2 /STBMSK_3 /STBMSK_4 CSTRB_1 CSTRB_2 CSTRB_3 CSTRB_4 ; --------Now cause the /CSTRB outputs and STBMSK signals to go high ; individually by setting the respective /CRDY input low ; Channel #1 SETF CRDY_1 ; Since /CRDY_1 has gone low, we need to manually force /STMSIn_1 low ; (since it follows /STBMSK_1) SETF STMSIn_1 CHECK STBMSK_1 /STBMSK_2 /STBMSK_3 /STBMSK_4 /CSTRB_1 CSTRB_2 CSTRB_3 CSTRB_4 ; Channel #2 SETF CRDY_2 CHECK STBMSK_1 STBMSK_2 /STBMSK_3 /STBMSK_4 /CSTRB_1 /CSTRB_2 CSTRB_3 CSTRB_4 ;Channel #3 SETF CRDY_3 CHECK STBMSK_1 STBMSK_2 STBMSK_3 /STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 CSTRB_4 ;Channel #4 SETF CRDY_4 CHECK STBMSK_1 STBMSK_2 STBMSK_3 STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ; --------Now return the /CRDY inputs to their quiescent HIGH state, ; checking the /CSTRB outputs and STBMSK signals at each step. ; The /CSTRB outputs and STBMSK signals should not change. ;Channel #1 SETF /CRDY_1 CHECK STBMSK_1 STBMSK_2 STBMSK_3 STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ;Channel #2 SETF /CRDY_2 CHECK STBMSK_1 STBMSK_2 STBMSK_3 STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ;Channel #3 SETF /CRDY_3 CHECK STBMSK_1 STBMSK_2 STBMSK_3 STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ;Channel #4 SETF /CRDY_4 CHECK STBMSK_1 STBMSK_2 STBMSK_3 STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ; --------Now check that the /CSTRBs can be "clipped" by STROBEIN ; First activate STROBEIN: This should clear the STBMSK_x signals SETF STROBEIN ; Since STROBEIN has gone high, we need to manually force /STMSIn_1 high ; (since it follows /STBMSK_1) ; SETF /STMSIn_1 ; The STBMSK signals should go low, but the /CSTRB outputs should remain high CHECK /STBMSK_1 /STBMSK_2 /STBMSK_3 /STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ; Now deactivate STROBEIN: This should cause all /CSTRB outputs to go low SETF /STROBEIN ; The STBMSK signals should stay low, and the /CSTRB outputs should go low CHECK /STBMSK_1 /STBMSK_2 /STBMSK_3 /STBMSK_4 CSTRB_1 CSTRB_2 CSTRB_3 CSTRB_4 ; Do not allow any /CRDY signals to go low, instead provide another rising ; edge on STROBEIN SETF STROBEIN ; Since STROBEIN has gone high, we need to manually force /STMSIn_1 high ; (since it follows /STBMSK_1) ; SETF /STMSIn_1 ; Now check that all /CSTRBs have gone back high, and that all /STBMSKs have ; remained high CHECK /STBMSK_1 /STBMSK_2 /STBMSK_3 /STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ; Now finish up by de-activating STROBEIN to force a third group of ; /CSTRBs SETF /STROBEIN ; The STBMSK signals should stay low, and the /CSTRB outputs should go low CHECK /STBMSK_1 /STBMSK_2 /STBMSK_3 /STBMSK_4 CSTRB_1 CSTRB_2 CSTRB_3 CSTRB_4 ; --------Now cause the /CSTRB outputs and STBMSK signals to go high ; individually by setting the respective /CRDY input low ; Channel #1 SETF CRDY_1 ; Since /CRDY_1 has gone low, we need to manually force /STMSIn_1 low ; (since it follows /STBMSK_1) SETF STMSIn_1 CHECK STBMSK_1 /STBMSK_2 /STBMSK_3 /STBMSK_4 /CSTRB_1 CSTRB_2 CSTRB_3 CSTRB_4 ; Channel #2 SETF CRDY_2 CHECK STBMSK_1 STBMSK_2 /STBMSK_3 /STBMSK_4 /CSTRB_1 /CSTRB_2 CSTRB_3 CSTRB_4 ;Channel #3 SETF CRDY_3 CHECK STBMSK_1 STBMSK_2 STBMSK_3 /STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 CSTRB_4 ;Channel #4 SETF CRDY_4 CHECK STBMSK_1 STBMSK_2 STBMSK_3 STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ; --------Now return the /CRDY inputs to their quiescent HIGH state, ; checking the /CSTRB outputs and STBMSK signals at each step. ; The /CSTRB outputs and STBMSK signals should not change. ;Channel #1 SETF /CRDY_1 CHECK STBMSK_1 STBMSK_2 STBMSK_3 STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ;Channel #2 SETF /CRDY_2 CHECK STBMSK_1 STBMSK_2 STBMSK_3 STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ;Channel #3 SETF /CRDY_3 CHECK STBMSK_1 STBMSK_2 STBMSK_3 STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ;Channel #4 SETF /CRDY_4 CHECK STBMSK_1 STBMSK_2 STBMSK_3 STBMSK_4 /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ; --------Finally check that the VMERESET signal can force all ; /CSTRB outputs high ; First activate STROBEIN SETF STROBEIN ; Since STROBEIN has gone high, we need to manually force /STMSIn_1 high SETF /STMSIn_1 ; The /CSTRB outputs should still be HIGH CHECK /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ; Now deactivate STROBEIN. SETF /STROBEIN ; This falling edge on STROBEIN should have caused all /CSTRB outputs to ; become LOW CHECK CSTRB_1 CSTRB_2 CSTRB_3 CSTRB_4 ; Now apply a VMERESET signal SETF VMERESET ; Since VMERESET has gone high, we need to manually force /STMSIn_1 low SETF STMSIn_1 ; Check to see that all /CSTRB outputs have become HIGH CHECK /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 ; Now remove the VMERESET and verify that all /CSTRB outputs remain HIGH SETF /VMERESET CHECK /CSTRB_1 /CSTRB_2 /CSTRB_3 /CSTRB_4 TRACE_OFF