ADF-2 Circuit Board Check-In
                  --------------------------------

                                                 Original Rev.  2-Mar-2005
                                              Most Recent Rev. 12-Apr-2005

This is checklist for the checks described in 

http://www.pa.msu.edu/hep/d0/ftp/run2b/l1cal/hardware/adf_2/cards_and_crates/
                                        adf_2_circuit_board_check_in_instructions.txt

List of the basic steps:

1. Start the Trailer Sheet for this card.  

     Final Assebly/Check-in date  ____-________-________

     Serial Number (S/N)  ______

     Gain species:         A     B      C      D
     Color  on top edge:  Red  Green  Yellow  Blue 
                                                  
                     EM:  4.0   5.5    4.0    5.5 
                     HD:  2.0   3.5    4.0    5.5 

2. Mechanical Inspection:   

     missing components
     backwards components
     tombstoned components
     damaged components
     component to pads alignment problem
     solder problems:  bridges, leads not soldered, excess solder (especially along
                                                     the sides of 0603 capacitors)
     pcb problems:  damaged corners,  de-lamination,  missing pads
     Solder on swipes on the bottom side of P1 and P2
     Confirm that P3 was properly inserted
     Check for connector damage that causes holes to be closed on the face of P3.
     Cleaning problems:  Flux, white residue

















3. Final Assembly:

     __ MSU S/N on P0 connector 
     __ Install the front panel and its mounting brackets 
     __ Check backplane connector screws and nuts 
     __ MSU S/N label on front panel
     __ Gain species label on front panel 
     __ "Maestro" label to the front panel (ONLY IF THIS IS A MAESTRO ADF-2 CARD)
     __ Install jumpers W1021 - W1027 (ONLY IF THIS IS A MAESTRO ADF-2 CARD) 


4. Ohm Meter Tests:

    "+" PROBE                           COMMON PROBE (BLACK)
    (RED)  
   +------------+--------+--------+--------+--------+--------+--------+--------+
   |            |        |  VCC_  | VDD_   | VCC_   | VEE_   |  VDD_  |        | 
   |            | GROUND |  LOGIC | ANALOG | ANALOG | ANALOG |  LOGIC | VCCINT |
   +------------+--------+--------+--------+--------+--------+--------+--------+
   |            |  3.3K  |        |        |        |        |        |        |
   |            |        |        |        |        |        |        |        |
   | VCC_LOGIC  |        |XXXXXXXX|XXXXXXXX|XXXXXXXX|XXXXXXXX|XXXXXXXX|XXXXXXXX|
   |            |        |        |        |        |        |        |        |
   |            |c 2.7K  |        |        |        |        |        |        |
   +------------+--------+--------+--------+--------+--------+--------+--------+
   |            |   80   |  3.4K  |        |        |        |        |        |
   |            |        |        |        |        |        |        |        |
   | VDD_ANALOG |        |        |XXXXXXXX|XXXXXXXX|XXXXXXXX|XXXXXXXX|XXXXXXXX|
   |            |        |        |        |        |        |        |        |
   |            |c  60   |c 2.8K  |        |        |        |        |        |
   +------------+--------+--------+--------+--------+--------+--------+--------+
   |            | 1030   |  4.4K  | 1060   |        |        |        |        |
   |            |        |        |        |        |        |        |        |
   | VCC_ANALOG |        |        |        |XXXXXXXX|XXXXXXXX|XXXXXXXX|XXXXXXXX|
   |            |        |        |        |        |        |        |        |
   |            |c 830   |c 3.6K  |c 860   |        |        |        |        |
   +------------+--------+--------+--------+--------+--------+--------+--------+
   |            | 1030   |  4.4K  | 1060   |  1.9K  |        |        |        |
   |            |        |        |        |        |        |        |        |
   | VEE_ANALOG |        |        |        |        |XXXXXXXX|XXXXXXXX|XXXXXXXX|
   |            |        |        |        |        |        |        |        |
   |            |c 830   |c 3.6K  |c 860   |c 1.5K  |        |        |        |
   +------------+--------+--------+--------+--------+--------+--------+--------+
   |            |  2.5K  |  5.7K  |  2.4K  |  3.4K  |  3.3K  |        |        |
   |            |        |        |        |        |        |        |        |
   | VDD_LOGIC  |        |        |        |        |        |XXXXXXXX|XXXXXXXX|
   |            |        |        |        |        |        |        |        |
   |            |c 1.5K  |c 4.7K  |c 2.0K  |c 2.8K  |c 2.7K  |        |        |
   +------------+--------+--------+--------+--------+--------+--------+--------+
   |            |  190   |  3.5K  |  260   |  1.1K  |  1.1K  |  770   |        |
   |            |        |        |        |        |        |        |        |
   | VCCINT     |        |        |        |        |        |        |XXXXXXXX|
   |            |        |        |        |        |        |        |        |
   |            |c 160   |c 2.9K  |c 220   |c 0.9K  |c 0.9K  |b 630   |        |
   +------------+--------+--------+--------+--------+--------+--------+--------+

5. Initial Power Up:

     __ Insert card under test in slot 10
     __ Insert Maestro card in slot 20
     __ Plug in Monitor PLL cable 
     __ Insert JTAG Cable
     __ Turn on Crate Power 
        Time 
            ______:______:______

     __ Current checks on the 4 external supplies

        Power ________W

        U5    ________V  ________A
             
        +3v3  ________V  ________A
             
        U1    ________V  ________A
             
        +5v0  ________V  ________A

     __ Check (feel) for hot spots
     __ Check the output from the on-board DC/DC Converters (EXPERTS ONLY!)

        VDD_LOGIC DC ________V AC ________V

        VCCINT    DC ________V AC ________V

6. JTAG Configuration:

     __ Program Board Control PAL
     __ Fill in trailer sheet 

        ____-_______-________ BC_PAL Firmware Version 

        ____-_______-________ Program date 


7. PLL Operation

   __ Record multimeter value for PLL

        Time ____:____:____  ________V

        Time ____:____:____  ________V

        Time ____:____:____  ________V

        Time ____:____:____  ________V

        Time ____:____:____  ________V

        Time ____:____:____  ________V


8. Simple VME IO to PAL and FPGAs

     __ Run the command file "Step0_PalFpgaIo.cmd


9. VME Geographic line test

     __ Run the command file "Step1_AddressAllSlots.cmd"
  
 
10. Random Register Test

     __ Run the command file "Step2_RandomRegister.cmd"


11. DAC/ADC Gain

     __ Run the command file "Step3_DacToAdcRatio.cmd"


12. FIND DAC

     __ Run the command file "Step4_FindDac.cmd"


13. Frequency Response

     __ Run the command file "Step5_FreqResp.cmd"


14. FFT Analysis

     __ Run the command file "Step6_FFT_Analysis.cmd"


15. Channel Link Test

     __ Run the command file "Step7_Channel_Link_Test.cmd"

        __ Channel Link 0

        __ Channel Link 1

        __ Channel Link 2