ADF-2 Crate Notes --------------------- original : 10-Jan-2005 Revision : 2-June-2005 The VIPA Crates use logic on the backplane to daisy chain the four Bus-Grant signals (#0:3) from slot to slot. This is to avoid needing to add jumpers onto the VME backplane for propagating the Bus Grant signal across open slots. For each slot and for each Bus Grant level, there is a 2-input OR-gate taking the active-low BGIN* and BGOUT* and driving the BGIN of the next slot. cf vipa_crate_notes.txt in http://www.pa.msu.edu/hep/d0/ftp/l1/framework/hsro/ On the VIPA crates the Bus Grant In #1 pin (BG1IN*) for Slot #1 is also pulled to ground via 82kOhm. The Wiener Crate backplane seems to leave BGIN1* un-connected on Slot #1, and the default state with no card driving this signal is high. So we need to modify the Crate Controller to actively drive BGIN1* of Slot #2 (the first ADF card) Low for the proper operation of the ADF-2 DC/DC converters. cf. adf_2_design_layout.txt in http://www.pa.msu.edu/hep/d0/ftp/run2b/l1cal/hardware/adf_2/general/ The ADF-2 cards start their DC/DC converters one at a time, with the sequence propagating left to right, from slot to slot, using the Bus Grant 1 backplane lines. How to modify a Bit3 Model 618 to drive its BG1OUT* low. ------------------------------ On the bit3 Model 618 VME module, the set of jumper pins called "J2", which is located near the VME P1 connector P1, allows the user to select which Bus Grant Level (0:3) is passed through and which Bus Grant Level is controlled by the Bit3 Bus Adaptor. This block of jumper J2 also has two more optional jumpers: the jumper location labeled "ARB" allows the card to be the VME crate arbitrer and the jumper "P/R" is related to the arbitration mode (see doc for details). The setting of the Bit3 card used to control the L1FW Communication Crate or the L2 Crates is shown below. The 618 is told to be the VME Bus Arbitrer, operates on Bus Grant Level 3, and passes through Levels 0,1,2. +---------------------------- | | VME P1 connector +---------------------------- 0 1 2 3 +---------------+ | X X X X X | A Jumper settings for L1FW usage BGI | | | | R | X X X X X | B X | | | | | | <-- Jumper installed | X X X X X | P X BGO | | | / <-- Jumper removed | X X X X X | R X +---------------+ The modification used to control the ADF-2 crate will be to remove the Bus Grant Level 1 passthru jumper and wirewrap a piece of wire from the BGO1 pin to the grounded post of the unused "P/R" jumper. These two pins are shown below with a "(@)" symbol. This modification will drive Bus Grant Out Level 1 on the Slot#1 VME P1 connector pin B7 to ground, and with it Bus Grant In Level 1 of Slot #2 will now be Low to initiate the daisy chain initialization of the ADF-2 DC/DC converters. 0 1 2 3 +---------------+ | X X X X X | A BGI | | | | R Jumper settings for ADF-2 Crate | X X X X X | B | | | | | X (@) X X (@)| P (@) = connect these two pins BGO | | | / with wire wrap. | X X X X X | R +---------------+ How to setup a Vertical Interconnect Slave for use in an ADF Crate ------------------------------------------------------------------ A general description of how we setup the Vertical Interconnects for use in our systems can be found in: www.pa.msu.edu/hep/d0/ftp/l1/framework/hardware/vertical/ For the ADF-2 Crates we will setup the VI Slave just as described in the VI Slave document in the directory listed above with the following two exceptions: - We need to have the Bus_Grant_1_Out signal coming out of the VI Slave be tied LOW all of the time. This is what tells the ADF-2 card in slot #2 that it may start up its DC/DC converters. Bus_Grant_1_Out is on P1 pin B7. To tie this to Ground do the following: > Remove the jumper cap from J9 pins 11 to 12. > Run a wire wrap wire from J9 pin 11 (which is the Bus_Grant_1_Out signal) to J13 pin closest to U25 (which is a Ground pin) - The VI Slave used in the ADF-2 Crate must have its Mizar chip installed at location U20. For our other applications the Mizar chip could be installed or removed. For use with the Wiener backplanes it appears that the Mizar chip must be installed. - We have no use for the 10 MHz "System Clock" signal on the backplane. So on the VI Slave cards, remove jumper cap J10 to keep the System Clock signal from reaching the backplane. The Wiener Crate has Grounding Wipers on its plastic card guides. These MUST be removed from the Slot #1 lower and upper card guides or else they will short out to traces on the VI Slave card. You can pop the plastic card guides out of the crate to remove these metal Grounding Wiper clips. The Wiener Crate has a front panel LED labeled "System Fail". This LED indicates the state of the VME SYSFAIL* line. This LED is not the state of some power supply condition or fan condition or something like that. When a Vertical Interconnect Slave is installed in slot #1 this LED will illuminate. It comes ON because P1 pin C10 on the VI Slave is tied to Ground on the VI card. P1 pin C10 is the VME SYSFAIL* pin and should not have been wired to Ground on the VI pcb. On some VI's you will see that P1 pin C10 has been cut.