# bcp.ucf # Original Rev. 06-Jul-2004 # Most Recent Rev. 16-Feb-2004 # This file includes all the nets for the Board Control PAL # which is a Xilinx XC95144XL. # UCF file for the design bcp in the device XC95144XL-tq144 # --- Function Block 1 --- 15 User I/O --- NET 'CNFG_PROG_B_out_stdlv(1)' LOC=P142; # Out Block 2 Macrocell 1 NET 'VME_SYSRESET_B_in_stdl' LOC=P143; # In Block 2 Macrocell 2 NET 'CNFG_CS_B_reg_stdlv(1)' LOC=P2; # Out Block 2 Macrocell 5 NET 'CNFG_INIT_B_in_stdlv(1)' LOC=P3; # In Block 2 Macrocell 6 NET 'CNFG_BUSY_in_stdlv(1)' LOC=P4; # In Block 2 Macrocell 4 NET 'DATA_BUF_DIR_out_stdl' LOC=P5; # Out Block 2 Macrocell 8 NET 'OCB_DIRECTION_out_stdl' LOC=P6; # Out Block 2 Macrocell 9 NET 'CNFG_DONE_in_stdlv(1)' LOC=P7; # In Block 2 Macrocell 10 NET 'CNFG_CCLK_out_stdl' LOC=P9; # Out Block 2 Macrocell 11 NET 'CNFG_RDWR_B_reg_stdl' LOC=P10; # Out Block 2 Macrocell 12 NET 'CNFG_PROG_B_out_stdlv(0)' LOC=P11; # Out Block 2 Macrocell 14 NET 'CNFG_CS_B_reg_stdlv(0)' LOC=P12; # Out Block 2 Macrocell 13 NET 'CNFG_INIT_B_in_stdlv(0)' LOC=P13; # In Block 2 Macrocell 15 NET 'CNFG_BUSY_in_stdlv(0)' LOC=P14; # In Block 2 Macrocell 16 NET 'CNFG_DONE_in_stdlv(0)' LOC=P15; # In Block 2 Macrocell 17 # --- Function Block 1 --- 15 User I/O --- NET 'FPGA_1_STATUS_in_stdlv(0)' LOC=P16; # In Block 1 Macrocell 2 NET 'FPGA_1_STATUS_in_stdlv(1)' LOC=P17; # In Block 1 Macrocell 3 NET 'FPGA_1_STATUS_in_stdlv(2)' LOC=P19; # In Block 1 Macrocell 5 NET 'FPGA_1_STATUS_in_stdlv(3)' LOC=P20; # In Block 1 Macrocell 6 NET 'FPGA_0_STATUS_in_stdlv(0)' LOC=P21; # In Block 1 Macrocell 8 NET 'FPGA_0_STATUS_in_stdlv(1)' LOC=P22; # In Block 1 Macrocell 9 NET 'FPGA_0_STATUS_in_stdlv(2)' LOC=P23; # In Block 1 Macrocell 1 NET 'FPGA_0_STATUS_in_stdlv(3)' LOC=P24; # In Block 1 Macrocell 11 NET 'PAL_ACCESS_out_stdlv(0)' LOC=P25; # I/O Block 1 Macrocell 4 NET 'ADC_ENABLE_reg_stdl' LOC=P26; # Out Block 1 Macrocell 12 NET 'SER_DC_BALANCE_reg_stdl' LOC=P27; # Out Block 1 Macrocell 14 NET 'SER_DESKEW_B_reg_stdl' LOC=P28; # Out Block 1 Macrocell 15 NET 'PAL_BX_CLOCK_in_stdl' LOC=P30; # In Block 1 Macrocell 17 NET 'DRV_CRATE_TO_SCLD_reg_stdlv(0)' LOC=P31; # Out Block 1 Macrocell 10 NET 'DRV_CRATE_TO_SCLD_reg_stdlv(1)' LOC=P35; # Out Block 1 Macrocell 16 # --- Function Block 3 --- 15 User I/O --- NET 'RCVD_BX_CLOCK_inout_stdl' LOC=P32; # In Block 3 Macrocell 2 NET 'CNT_BIT_VAL_4_inout_stdl' LOC=P33; # Out Block 3 Macrocell 5 NET 'PAL_FIRST_X8_EDGE_out_stdl' LOC=P34; # Out Block 3 Macrocell 6 NET 'PAL_BX_X8_CLOCK_in_stdl' LOC=P38; # In Block 3 Macrocell 8 NET 'LOOP_FILTER_REF_inout_stdl' LOC=P39; # Out Block 3 Macrocell 1 NET 'PHASE_DET_OUT_out_stdl' LOC=P40; # Out Block 3 Macrocell 9 NET 'PAL_ACCESS_out_stdlv(1)' LOC=P41; # I/O Block 3 Macrocell 3 NET 'PAL_ACCESS_out_stdlv(2)' LOC=P43; # I/O Block 3 Macrocell 11 NET 'PAL_ACCESS_out_stdlv(3)' LOC=P44; # I/O Block 3 Macrocell 4 NET 'PAL_ACCESS_out_stdlv(4)' LOC=P45; # I/O Block 3 Macrocell 12 NET 'PAL_ACCESS_out_stdlv(5)' LOC=P46; # I/O Block 3 Macrocell 7 NET 'PAL_ACCESS_out_stdlv(6)' LOC=P48; # I/O Block 3 Macrocell 10 NET 'PAL_ACCESS_out_stdlv(7)' LOC=P49; # I/O Block 3 Macrocell 14 NET 'PAL_ACCESS_out_stdlv(8)' LOC=P50; # I/O Block 3 Macrocell 15 NET 'PAL_ACCESS_out_stdlv(9)' LOC=P51; # I/O Block 3 Macrocell 17 # --- Function Block 5 --- 14 User I/O --- NET 'DATA_BUF_ENB_B_out_stdl' LOC=P52; # Out Block 5 Macrocell 2 NET 'VME_LTCH_CLK_out_stdl' LOC=P53; # Out Block 5 Macrocell 5 NET 'DRV_DTACK_out_stdl' LOC=P54; # Out Block 5 Macrocell 6 NET 'RCVD_DS1_in_stdl' LOC=P56; # In Block 5 Macrocell 8 NET 'PAL_ACCESS_out_stdlv(10)' LOC=P57; # I/O Block 5 Macrocell 9 NET 'PAL_ACCESS_out_stdlv(11)' LOC=P58; # I/O Block 5 Macrocell 11 NET 'LTCHD_AM_in_stdlv(4)' LOC=P59; # In Block 5 Macrocell 3 NET 'LTCHD_IACK_B_in_stdl' LOC=P60; # In Block 5 Macrocell 12 NET 'LTCHD_AM_in_stdlv(3)' LOC=P61; # In Block 5 Macrocell 14 NET 'LTCHD_AM_in_stdlv(2)' LOC=P64; # In Block 5 Macrocell 15 NET 'LTCHD_AM_in_stdlv(1)' LOC=P66; # In Block 5 Macrocell 7 NET 'LTCHD_AM_in_stdlv(0)' LOC=P68; # In Block 5 Macrocell 10 NET 'LTCHD_WRITE_B_in_stdl' LOC=P69; # In Block 5 Macrocell 17 NET 'LTCHD_AM_in_stdlv(5)' LOC=P70; # In Block 5 Macrocell 13 # --- Function Block 7 --- 15 User I/O --- NET 'OCB_ADRS_in_stdlv(23)' LOC=P71; # In Block 7 Macrocell 2 NET 'OCB_DATA_inout_stdlv(7)' LOC=P75; # I/O Block 7 Macrocell 3 NET 'OCB_ADRS_in_stdlv(22)' LOC=P74; # In Block 7 Macrocell 5 NET 'OCB_ADRS_in_stdlv(21)' LOC=P76; # In Block 7 Macrocell 6 NET 'OCB_DATA_inout_stdlv(6)' LOC=P77; # I/O Block 7 Macrocell 7 NET 'OCB_ADRS_in_stdlv(20)' LOC=P78; # In Block 7 Macrocell 8 NET 'OCB_ADRS_in_stdlv(18)' LOC=P80; # In Block 7 Macrocell 9 NET 'OCB_ADRS_in_stdlv(19)' LOC=P79; # In Block 7 Macrocell 10 NET 'OCB_ADRS_in_stdlv(16)' LOC=P82; # In Block 7 Macrocell 11 NET 'OCB_DATA_inout_stdlv(4)' LOC=P85; # I/O Block 7 Macrocell 12 NET 'OCB_ADRS_in_stdlv(17)' LOC=P81; # In Block 7 Macrocell 13 NET 'OCB_ADRS_in_stdlv(15)' LOC=P86; # In Block 7 Macrocell 14 NET 'OCB_ADRS_in_stdlv(14)' LOC=P87; # In Block 7 Macrocell 15 NET 'OCB_DATA_inout_stdlv(5)' LOC=P83; # I/O Block 7 Macrocell 16 NET 'OCB_ADRS_in_stdlv(13)' LOC=P88; # In Block 7 Macrocell 17 # --- Function Block 8 --- 15 User I/O --- NET 'OCB_ADRS_in_stdlv(12)' LOC=P91; # In Block 8 Macrocell 2 NET 'OCB_DATA_inout_stdlv(2)' LOC=P95; # I/O Block 8 Macrocell 3 NET 'OCB_ADRS_in_stdlv(8)' LOC=P97; # In Block 8 Macrocell 4 NET 'OCB_ADRS_in_stdlv(11)' LOC=P92; # In Block 8 Macrocell 5 NET 'OCB_ADRS_in_stdlv(10)' LOC=P93; # In Block 8 Macrocell 6 NET 'OCB_DATA_inout_stdlv(3)' LOC=P94; # I/O Block 8 Macrocell 8 NET 'OCB_ADRS_in_stdlv(9)' LOC=P96; # In Block 8 Macrocell 9 NET 'OCB_ADRS_in_stdlv(6)' LOC=P101; # In Block 8 Macrocell 10 NET 'OCB_ADRS_in_stdlv(7)' LOC=P98; # In Block 8 Macrocell 11 NET 'OCB_DATA_inout_stdlv(1)' LOC=P100; # I/O Block 8 Macrocell 12 NET 'OCB_ADRS_in_stdlv(4)' LOC=P103; # In Block 8 Macrocell 13 NET 'OCB_ADRS_in_stdlv(5)' LOC=P102; # In Block 8 Macrocell 14 NET 'OCB_ADRS_in_stdlv(3)' LOC=P104; # In Block 8 Macrocell 15 NET 'OCB_DATA_inout_stdlv(0)' LOC=P107; # I/O Block 8 Macrocell 16 NET 'OCB_ADRS_in_stdlv(2)' LOC=P105; # In Block 8 Macrocell 17 # --- Function Block 6 --- 13 User I/O --- NET 'OCB_ADRS_in_stdlv(1)' LOC=P106; # In Block 6 Macrocell 2 NET 'PAL_ACCESS_out_stdlv(12)' LOC=P110; # I/O Block 6 Macrocell 5 NET 'PAL_ACCESS_out_stdlv(13)' LOC=P111; # I/O Block 6 Macrocell 4 NET 'PAL_ACCESS_out_stdlv(14)' LOC=P112; # I/O Block 6 Macrocell 6 NET 'PAL_ACCESS_out_stdlv(15)' LOC=P113; # I/O Block 6 Macrocell 8 NET 'PAL_ACCESS_out_stdlv(16)' LOC=P115; # I/O Block 6 Macrocell 10 NET 'DRV_PAL_LED_out_stdlv(0)' LOC=P116; # Out Block 6 Macrocell 9 NET 'DRV_CRATE_STATUS_reg_stdlv(0)' LOC=P117; # Out Block 6 Macrocell 16 NET 'DRV_CRATE_STATUS_reg_stdlv(1)' LOC=P119; # Out Block 6 Macrocell 11 NET 'DRV_CRATE_STATUS_reg_stdlv(2)' LOC=P120; # Out Block 6 Macrocell 12 NET 'DRV_CRATE_STATUS_reg_stdlv(3)' LOC=P121; # Out Block 6 Macrocell 14 NET 'CRATE_STATUS_B_in_stdlv(0)' LOC=P124; # In Block 6 Macrocell 15 NET 'CRATE_STATUS_B_in_stdlv(1)' LOC=P125; # In Block 6 Macrocell 17 # --- Function Block 4 --- 15 User I/O --- NET 'CRATE_STATUS_B_in_stdlv(2)' LOC=P118; # In Block 4 Macrocell 1 NET 'CRATE_STATUS_B_in_stdlv(3)' LOC=P126; # In Block 4 Macrocell 2 NET 'DRV_PAL_LED_out_stdlv(1)' LOC=P128; # Out Block 4 Macrocell 5 NET 'VME_GEO_B_in_stdlv(0)' LOC=P129; # In Block 4 Macrocell 6 NET 'VME_GEO_B_in_stdlv(1)' LOC=P130; # In Block 4 Macrocell 8 NET 'VME_GEO_B_in_stdlv(2)' LOC=P131; # In Block 4 Macrocell 9 NET 'VME_GEO_B_in_stdlv(3)' LOC=P132; # In Block 4 Macrocell 11 NET 'VME_GEO_B_in_stdlv(4)' LOC=P133; # In Block 4 Macrocell 3 NET 'DATA_TO_FIRST_DAC_INPUT_out_stdl' LOC=P134; # Out Block 4 Macrocell 12 NET 'DAC_SERIAL_DATA_CLOCK_out_stdl' LOC=P135; # Out Block 4 Macrocell 10 NET 'DAC_CHIP_SELECT_B_out_stdl' LOC=P136; # Out Block 4 Macrocell 14 NET 'LAST_DAC_OUTPUT_DATA_in_stdl' LOC=P137; # In Block 4 Macrocell 13 NET 'OCB_CHIP_SEL_B_out_stdlv(1)' LOC=P138; # Out Block 4 Macrocell 15 NET 'OCB_CHIP_SEL_B_out_stdlv(0)' LOC=P139; # Out Block 4 Macrocell 16 NET 'OCB_WRITE_STRB_B_inout_stdl' LOC=P140; # Out Block 4 Macrocell 17