Date and     |
itteration   | Comment
-------------+------------------------------------------------------------------------
05-Aug-2004_0 Reference. Everything should work. Known OCB_CHIP_SEL_B(2) extra output.
05-Aug-2004_1 Remove extra output OCB_CHIP_SEL_B(2)
05-Aug-2004_2 test build script
05-Aug-2004_3 test makefile change for report generation
07-Aug-2004_4 Add IOBUF for OCB_DATA
07-Aug-2004_5 Add IOBUF for PAL_ACCESS
08-Aug-2004_6 swap OCB_DATA(0:3) and OCB_ADRS(13:16) between FB 7 and FB 8
09-Aug-2004_7 Remove OCB_CHIP_SEL_B(2) and add INIT values to DFF instances
09-Aug-2004_8 changed sense of PAL_LEDs from active high to active low.
09-Aug-2004_9 Rearranged signals in FB7 and FB8 after talking with Dan.
12-Aug-2004_10 Add register control for LED_1. Change PAL_ACCESS from bidirectional to
               outputs only. 

               Change PAL_ACCESS from latched to direct connections. 
               Change PAL_ACCESS signals to ones needed for VME communication 
               debugging. 

               Add stretcher circuit for LED_0.
13-Aug-2004_11 Make Xilinx_Components library and Conter package and move counter for 
               LED stretcher to xilinx_components.counter package
13-Aug-2004_12 Fixed unconnected TC port to CBCE counter. 
               Added variable width to CBCE and constant COUNTER_WIDTH to control in 
               board_control_pal_firmware.vhd. COUNTER_WIDTH = 16.
13-Aug-2004_13 COUNTER_WIDTH = 8.
13-Aug-2004_14 COUNTER_WIDTH = 14
13-Aug-2004_15 COUNTER_WIDTH = 14. keepio option added to cpldfit
13-Aug-2004_16 COUNTER_WIDTH = 14. exhaust option added to cpldfit
13-Aug-2004_17 remove cpldfit option exhaust and add cpldfit option nomlopt
24-Aug-2004_18 change makefile and build script so that all archiving is done in the 
               build script and none in the makefile (coping reports to _doc and jed 
               file to _bin).
24-Aug-2004_19 add attribute keep = true to all signals.
24-Aug-2004_20 add attribute keep = true to all signals. fix signal names in vhdl file
               for attribute assignments.
24-Aug-2004_21 comment out keep attribute = true for PAL_REGISTER_int_stdlv.
24-Aug-2004_22 uncomment attribute keep for PAL_REGISTER_int and change case from keep
               to KEEP.
24-Aug-2004_23 remove attribute KEEP: string; line. VHDL case sensitive but attribute 
               names are not? Same as attribute keep: string; ?
24-Aug-2004_24 remove attribute KEEP: string; line. VHDL case sensitive but attribute 
               names are not? Same as attribute keep: string; ?
24-Aug-2004_25 comment out keep attributes for register signals (SINGAL_NAME_reg).
24-Aug-2004_26 comment out keep attributes for all signals but VALID_CYCLE_int, 
               VALID_CYCLE_int, WRITE_TO_PAL, OCB_CHIP_SEL, OCB_CHIP_SEL_B, 
               NEXT_STATE_QUIESCENT_int, NEXT_STATE_QUIESCENT_int_B.
25-Aug-2004_27 Make changes to XST options file.
25-Aug-2004_28 move Xilinx_components.vhd to ../COMMON/_source. Change 
               board_control_pal_firmware.ngdbuild.
25-Aug-2004_29 Change board_control_pal_firmware.cpldfit option unused from float to 
               ground.
25-Aug-2004_30 change board_control_pal_firmware.hprep6. add -intstyle ise.
26-Aug-2004_31 Change board_control_pal_firmware.ucf and .vhd files. Remove JTAG and 
               POWER commented out regions of ucf file. Add comments and add 
               CNFG_PROG_B_REQ signal to vhd file.
26-Aug-2004_32 test added comments for config files dont affect build process.
26-Aug-2004_33 test added comments for config files dont affect build process. 
               Remove comments from .lso.
26-Aug-2004_34 test added comments for config files dont affect build process. Remove 
               comments from .prj.
26-Aug-2004_35 changes made to report and jed file names to be spun to web.
29-Aug-2004_36 testing 1 2 3
21-Sep-2004_37 Make changes to source to fix problem discovered in simulation. Many changes. Diff source files.
21-Sep-2004_38 testing....1.2.3....
21-Sep-2004_39 Added tsim and netgen steps to make process.
21-Sep-2004_40 Added tsim and netgen steps to make process.
25-Sep-2004_41 Change LED_STRETCHER Signal names.
17-Dec-2004_42 Compare web jed file to reviesion 40 build (Does not match)
****revision 41 is the latest working version.
****board_control_pal_firmware.vhd.cur fixes a signal connection problem with the LED stretcher but causes the 
    design not to fit into the device.  Revision 41 is board_control_pal_firmware.vhd for the time being.
17-Dec-2004_43 confirm that revision 41 matches bcp.jed on the web and the design that was simulated.