# DS1.do
#
# The function of this stimulis file is to test if RCVD_DS1 properly
# triggers DS1.  RCVD_DS1 is a positive logic signal (asserted when high)
# because VME_DS1_B goes through an inverting buffer before it becomes 
# RCVD_DS1.  First, the rcvd_ds1 signal is asserted and should propogate 
# through to ds1_tmp on the next rising edge of the clock and to ds1 on the 
# next falling edge of the clock.  RCVD_DS1 is deasserted and reasserted and
# DS1 should follow 1.5 cycles later.  Sysreset_debounced should force the 
# flip flops to 0.

# restart simulation without confirming and clearing wave window.
restart -force -nowave

# Add signals to wave window.
do ds1_waves.do


force /bcp/pal_bx_clock_in_stdl 0
force /bcp/rcvd_ds1_in_stdl 0
force /bcp/vme_sysreset_b_in_stdl 1

force /bcp/pal_bx_clock_in_stdl 1 66ns, 0 132ns -r 132ns

run 600ns

force /bcp/rcvd_ds1_in_stdl 1
run 264ns
force /bcp/rcvd_ds1_in_stdl 0
run 528ns
force /bcp/rcvd_ds1_in_stdl 1
run 264ns
force /bcp/vme_sysreset_b_in_stdl 0
run 528ns