Board Control PAL (BCP) Firmware Design Created: 06-Jul-2004 Last Edited: 17-Dec-2004 Files and Directory Hierarchy ============================= The source and configuration files for the BCP design are separated into separate directories to make finding them easy. Directories have a "_" prefix to make them stand out from all of the files that litter the top level design directory from the synthesis and implementation process. The design also contains other user created directories that are used to segregate files from different programs in the design and implementation process. \Firmware_root_directory\ board_control_pal_firmware.tar.gz \COMMON\ \_source\ Xilinx_Components.vhd \BCP\ board_control_pal_firmware_build board_control_pal_firmware_makefile board_control_pal_firmware_readme.txt \_bin\ bcp.cmd bcp.jed xc2v1000_fg456.bsd \_config\ board_control_pal_firmware.cpldfit board_control_pal_firmware.hprep6 board_control_pal_firmware.lso board_control_pal_firmware.netgen board_control_pal_firmware.ngdbuild board_control_pal_firmware.prj board_control_pal_firmware.ucf board_control_pal_firmware.xst \_doc\ \ARCHIVE\ bcp.mfd bcp.vm6 board_control_pal_cpldfit_report.txt make_output_ mfd_08- report_ report_summary.txt revision vhd_21- \_ngo\ \_sim\ modelsim_setup.txt \_do_files\ \_source\ \_wave_diagrams\ \_source\ \_tmp\ \_xst\ Suffix ====== is defined as _. It is set in the build script. Design Files ============ Individual source and configuration files can be viewed from the _source and _config directories. The entire design can be down loaded and unzipped to create the correct directory structure from http://www.pa.msu.edu/hep/d0/ftp/run2b/l1cal/hardware/adf_2/firmware/ board_control_pal_firmware.tar.gz COMMON/_source Directory ======================= See _source Directory below. Makefile and Build script ========================= There is a makefile and a build script to implement the design. The makefile can be used to run individual steps in the implementation process, run the whole process, or delete files generated by programs during the process. See board_control_pal_firmware_makefile. The build script is used to build the design and archive the revision of the design in the _doc and _bin directories. See board_control_pal_firmware_build. There are two intended ways to build the design. In order to test changes made to the design, running the make file is the most efficient way. When all of the errors have been resolved in the design changes, running the build script will archive the design source code, implementation output and feedback, and configuration data file with the new changes. _bin Directory ============== The _bin directory contains the .jed files and the impact command script that are used to configure the PAL. For configuration instructions see /hep/d0/ftp/run2b/l1cal/hardware/adf_2/general/board_control_pal_configuration.txt. File Comment ------------------ ------------------------------------------------------------- bcp.cmd impact command script bcp.jed copy of most recent version on the configuration data file bcp_.jed configuration data file xc2v1000_fg456.bsd fpga "dummy" configuration file for jtag (this needs a better explanation) _config Directory ================= The _config directory contains the configuration files for the implementation process. File Comment ------------------------------------ -------------------------------------------- board_control_pal_firmware.cpldfit input arguments to cpldfit board_control_pal_firmware.hprep6 input arguments to hprep6 board_control_pal_firmware.lso library search order file for xst board_control_pal_firmware.netgen input arguments to netgen board_control_pal_firmware.ngdbuild input arguments to ngdbuild board_control_pal_firmware.prj project file for xst board_control_pal_firmware.ucf user constraints file for xst board_control_pal_firmware.xst input arguments for xst _doc Directory ============== The _doc directory contains output/feedback from the synthesis and implementation process. The report_summary.txt file in that directory contains a summary of the revision history. The file report_ contains the ASCII report from cpldfit. board_control_pal_cpldfit_report.txt is a copy of the latest version of this. The file revision contains the current revision number. Do not edit, delete, rename, look at or even think about this file because the build script does not check the validity of this file but simply trusts that it is the only entity changing it. The files vm6_ and mfd_ are the vm6 and mfd files from cpldfit. The report file can be viewed with a text editor. The VM6 and MFD files are ASCII text but are best viewed with the program ChipViewer (Unix case sensitive command ChipView). bcp.mfd and bcp.vm6 are copies of the latest version of these files. !!!NOTE!!! ChipViewer does not display bi-directional pins correctly. It color codes them as input signals. There is a discrepancy between net names in Chipviewer and the cpldfit report file. Intermediate signal names appear in Chipviewer but not in the cpldfit report file. The file make_output_ is the output to the console from running make. This file is created from within the build script. The file vhd_ is a copy of the source file board_control_pal_firmware.vhd. File Comment ------------------------------------------- ----------------------------------- ARCHIVE Obsolete _doc files bcp.mfd Copy of current mfd_ bcp.vm6 Copy of current vm6_ board_control_pal_cpldfit_report.txt Copy of current report_ make_output_ Output of make run from build script mfd_ cpldfit output data report_ ASCII report from cpldfit vm6_ cpldfit output data report_summary.txt Revision history revision Current revision number (Don't Touch!) vhd_ board_control_pal_firmware.vhd archive _sim Directory ============== The _sim directory contains simulation stimulus files for Modelsim (do files) and output from the simulations. The "do" files are in the directory _sim/_do_files. The output is in the directory _sim/_wave_diagrams. A back annotated design created from the vm6 file is in _source. All simulations have been done on the original source code in _source and not on the back annotated design in _sim/_source because of internal signals being optimized out of the design. File Comment ----------------------------------- ----------------------------------- modelsim_setup.txt How to setup design for modelsim Other files Files generated by modelsim \_do_files\ Directory containing "do" stimulus files addressing.do address_waves.do DAC_LOADING.do DAC_LOAD_waves.do ds1.do ds1_waves.do FPGA_CONFIG.do FPGA_CONFIG_waves.do OCB_IO.do OCB_IO_waves.do REGISTER_IO.do REGISTER_IO_waves.do state_machine.do state_machine_waves.do sysreset.do sysreset_waves.do \_source\ bcp.nlf bcp.sdf bcp.vhd \_wave_diagrams\ addressing.bmp addressing.ps DAC_LOADING.bmp DAC_LOADING.ps ds1.bmp ds1.ps FPGA_CNFG.bmp FPGA_CNFG.ps OCB_IO.bmp OCB_IO.ps REGISTER_IO.bmp REGISTER_IO.ps state_machine.bmp state_machine.ps sysreset.bmp sysreset.ps \work\ Directory created by modelsim \xilinx_components\ Directory created by modelsim _source Directory ================= The _source directory contains the VHDL source code board_control_pal_firmware.vhd. The file /COMMON/_source/Xilinx_Components.vhd contains code to infer Xilinx library components. _ngo, _tmp, and _xst Directories ================================ The directories are for temporary files from Xilinx programs. Archiving ========= The design has been archived for changes that have been made. The files in the _doc and _bin directory have a suffix associating the files with the design revision. The report_summary.txt file in the _doc directory contains the revision history. The files without a suffix are copies of the latest versions of the files.